Negative voltage output device

By setting capacitors and diodes at the switching nodes of the DC-DC control chip, negative voltage output is achieved, which solves the problem of complex structure and high cost of negative voltage output devices in the prior art, and is suitable for consumer products.

CN222582292UActive Publication Date: 2025-03-07广州市品众电子科技有限公司
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Patent Information

Application Number
CN202420566339.7
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-03-22
Publication Date
2025-03-07
Estimated Expiration
2034-03-22

AI Technical Summary

Technical Problem

The existing negative voltage output devices have complex structures and are expensive, making them difficult to apply in consumer products with limited volume.

Method used

A negative voltage output device is designed, and the combination of DC-DC control chip, capacitor and diode is used to realize negative voltage output by setting capacitors and diodes at the switching nodes, reducing the complexity and cost of the circuit structure.

Benefits of technology

While achieving negative voltage output, it reduces the complexity and cost of the circuit and is suitable for consumer products with limited volume.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model discloses a negative voltage output device which comprises a DC-DC control chip, a second capacitor C2, a third capacitor C3, a second diode D2 and a third diode D3. One end of the second capacitor C2 is electrically connected with a switch node SW of the DC-DC control chip; the other end of the second capacitor C2 is electrically connected with the positive electrode of the second diode D2; the negative electrode of the second diode D2 is grounded; the negative electrode of the third diode D3 is electrically connected with the other end of the second capacitor C2; the positive electrode of the third diode D3 is connected with a negative voltage output port Vo-; one end of the third capacitor C3 is electrically connected with the other end of the third diode D3; the other end of the third capacitor C3 is grounded; according to the utility model, the negative voltage output is realized, the complexity of the circuit structure is reduced, and the cost is reduced.
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Description

Technical Field

[0001] The utility model relates to the technical field of Boost converter circuits, in particular to a negative voltage output device. Background Art

[0002] In consumer electronics and industrial applications, some components are powered by negative voltage. Currently, the circuits that generate negative voltage are relatively complex. There are two mainstream methods. One is to use a dedicated DC-DC control chip to build a negative voltage output circuit, such as a Cuk converter; the other is to use a transformer-isolated dual-winding output method to form a negative voltage output circuit. The DC-DC control chip of the Cuk converter is not commonly used in the market and is relatively expensive. Currently, the commonly used DC-DC control chips on the market are Buck converters and Boost converters. There are many manufacturers and the prices are very low. In addition, because the transfer function of the small signal output of the Cuk converter to the control is increased to the fourth order and becomes quite complex, the design and optimization of the compensation network is very difficult, which also limits its use.

[0003] Although the dual-winding output method with transformer isolation can generate negative voltage, it requires the use of a transformer, which is large in size. This is almost unacceptable, especially in consumer products with limited size, and the cost is also high.

[0004] The Cuk converter is less used due to its complex circuit, loop compensation and optimization, and there are few manufacturers that develop the corresponding DC-DC control chip, which makes its control chip expensive. Although the transformer-isolated dual-winding output method can generate negative voltage, it requires the use of a transformer, which is large in size, especially in consumer products with limited size, which is almost unacceptable and the cost is also high. Utility Model Content

[0005] In order to solve the problems of complicated structure and high cost of negative voltage output devices in the above prior art, the utility model proposes a negative voltage output device, which reduces the complexity of the circuit structure and reduces the cost while achieving negative voltage output.

[0006] In order to solve the above technical problems, the technical solution of the utility model is as follows:

[0007] A negative voltage output device comprises a DC-DC control chip, a second capacitor C2, a third capacitor C3, a second diode D2, and a third diode D3.

[0008] One end of the second capacitor C2 is electrically connected to the switch node SW of the DC-DC control chip; the other end of the second capacitor C2 is electrically connected to the anode of the second diode D2; and the cathode of the second diode D2 is grounded.

[0009] The cathode of the third diode D3 is electrically connected to the other end of the second capacitor C2; the anode of the third diode D3 is connected to the negative voltage output port Vo-.

[0010] One end of the third capacitor C3 is electrically connected to the other end of the third diode D3; the other end of the third capacitor C3 is grounded.

[0011] The working principle of this utility model:

[0012] When the DC-DC control chip is working, when the switch is turned off, the voltage at the switch node SW is approximately equal to Vo+, the second diode D2 is turned on, the second capacitor C2 is charged, and the voltage across the capacitor C2 is charged to Vo+ in a steady state; when the switch is turned on, the voltage at the switch node SW is pulled down to GND, and the voltage at the switch node SW is approximately zero, but because the voltage across the second capacitor C2 cannot change suddenly, a negative voltage -Vo+ appears at the anode of the second diode D2, and the third diode D3 is forward-conducted to start charging the third capacitor C3, and the voltage across the third capacitor C3 is also charged to Vo+ in a steady state; a negative voltage output is obtained at the upper end of the third capacitor C3.

[0013] Preferably, the negative voltage output device further includes a fourth capacitor C4, a fifth capacitor C5, a fourth diode D4, and a fifth diode D5.

[0014] One end of the fourth capacitor C4 is electrically connected to one end of the third diode D3; the other end of the fourth capacitor C4 is electrically connected to the other end of the second capacitor C2.

[0015] One end of the fifth capacitor C5 is electrically connected to the negative voltage output port Vo-; the other end of the fifth capacitor C5 is electrically connected to one end of the third capacitor C3.

[0016] The anode of the fourth diode D4 is electrically connected to one end of the third capacitor C3; the cathode of the fourth diode D4 is electrically connected to the anode of the second diode.

[0017] The anode of the fifth diode D5 is electrically connected to the cathode of the third diode D3; the cathode of the fifth diode D5 is electrically connected to one end of the third capacitor C3.

[0018] Furthermore, the DC-DC control chip adopts a Boost converter, a buck converter or a Sepic converter.

[0019] The DC-DC control chip adopts a Boost converter.

[0020] The Boost converter includes a startup circuit, a main control IC, a drive circuit, and a MOS tube Q1.

[0021] The source of the MOS transistor Q1 is grounded; the drain of the MOS transistor Q1 serves as a switch node SW.

[0022] One end of the startup circuit is electrically connected to the Vin port; the other end of the startup circuit is electrically connected to the first port of the main control IC;

[0023] One end of the driving circuit is electrically connected to the gate of the MOS tube Q1; the other end of the driving circuit is electrically connected to the second port of the main control IC.

[0024] Furthermore, the Boost converter further includes a first capacitor C1, a first diode D1, a first inductor L1, and a first resistor R1.

[0025] One end of the first inductor L1 is electrically connected to the Vin port; the other end of the first inductor L1 is electrically connected to the drain of the MOS tube Q1.

[0026] The anode of the first diode D1 is electrically connected to the drain of the MOS transistor Q1; the cathode of the first diode D1 is electrically connected to the anode of the first capacitor C1; and the cathode of the first capacitor C1 is grounded.

[0027] The first resistor R1 is connected in parallel across the first capacitor C1.

[0028] The Boost converter also includes a current sampling circuit.

[0029] The first port of the current sampling circuit is electrically connected to the source of the MOS tube Q1; the second port of the current sampling circuit is electrically connected to the third port of the main control IC; and the third port of the current sampling circuit is grounded.

[0030] The current sampling circuit includes an eighth resistor R8, a ninth resistor R9, and a thirteenth capacitor C13.

[0031] One end of the eighth resistor R8 serves as the first port of the current sampling circuit and is electrically connected to the source of the MOS tube Q1 ; the other end of the eighth resistor R8 serves as the other end of the current sampling circuit and is electrically connected to the third port of the main control IC.

[0032] One end of the ninth resistor R9 is electrically connected to one end of the eighth resistor R8; the other end of the ninth resistor R9 serves as the third port of the current sampling circuit and is grounded.

[0033] One end of the thirteenth capacitor C13 is electrically connected to the other end of the eighth resistor R8; the other end of the thirteenth capacitor C13 is electrically connected to the other end of the ninth resistor R9.

[0034] Furthermore, the Boost converter also includes a voltage sampling circuit.

[0035] One end of the voltage sampling circuit is electrically connected to the Vo+ port; the other end of the voltage sampling circuit is electrically connected to the fourth port of the main control IC.

[0036] The voltage sampling circuit includes a third resistor R3 and a seventh resistor R7;

[0037] One end of the third resistor R3 serves as one end of the voltage sampling circuit and is electrically connected to the Vo+ port; the other end of the third resistor R3 serves as the other end of the voltage sampling circuit and is electrically connected to the fourth port of the main control IC;

[0038] One end of the seventh resistor R7 is electrically connected to the other end of the third resistor R3; the other end of the seventh resistor R7 is grounded.

[0039] Furthermore, the startup circuit includes a second resistor R2 and a seventh capacitor C7.

[0040] One end of the second resistor R2 is electrically connected to the Vin port as one end of the startup circuit; the other end of the second resistor R2 is electrically connected to one end of the seventh capacitor C7 and the first port of the main control IC as the other end of the startup circuit.

[0041] The other end of the seventh capacitor C7 is grounded.

[0042] The driving circuit includes a sixth diode D6 and a fifth resistor R5.

[0043] One end of the fifth resistor R5 is electrically connected to the gate of the MOS transistor Q1 as one end of the driving circuit; the other end of the fifth resistor R5 is electrically connected to the second port of the main control IC as the other end of the driving circuit.

[0044] The sixth diode D6 is connected in parallel to both ends of the fifth resistor R5.

[0045] Beneficial effects of the utility model:

[0046] 1. The structure is simple. Based on the DC-DC control chip, negative voltage output is achieved by setting capacitors and diodes at the switch node.

[0047] 2. Low cost, using universal DC-DC control chip, no need to use dedicated control chip, reducing cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0048] Figure 1 A circuit structure diagram of a negative voltage output device provided in an embodiment.

[0049] Figure 2A specific circuit structure diagram of a Boost converter and a negative voltage output device provided in an embodiment.

[0050] Figure 3 A schematic diagram of voltage at a switch node provided in an embodiment.

[0051] Figure 4 A schematic diagram of the current direction when the second capacitor is charged provided in an embodiment.

[0052] Figure 5 A schematic diagram of the current direction when the third capacitor is charged provided in the embodiment.

[0053] Figure 6 A circuit structure diagram for achieving a higher negative voltage output provided in an embodiment. DETAILED DESCRIPTION

[0054] The technical solution of the utility model is further described below in conjunction with the accompanying drawings and embodiments.

[0055] Example 1

[0056] In this embodiment, a negative voltage output device includes a DC-DC control chip, a second capacitor C2, a third capacitor C3, a second diode D2, and a third diode D3.

[0057] One end of the second capacitor C2 is electrically connected to the switch node SW of the DC-DC control chip; the other end of the second capacitor C2 is electrically connected to the anode of the second diode D2; and the cathode of the second diode D2 is grounded.

[0058] The cathode of the third diode D3 is electrically connected to the other end of the second capacitor C2; the anode of the third diode D3 is connected to the negative voltage output port Vo-.

[0059] One end of the third capacitor C3 is electrically connected to the other end of the third diode D3; the other end of the third capacitor C3 is grounded.

[0060] The working principle of this utility model:

[0061] When the DC-DC control chip is working, when the switch is turned off, the voltage at the switch node SW is approximately equal to Vo+, the second diode D2 is turned on, the second capacitor C2 is charged, and the voltage across the capacitor C2 is charged to Vo+ in a steady state; when the switch is turned on, the voltage at the switch node SW is pulled down to GND, and the voltage at the switch node SW is approximately zero, but because the voltage across the second capacitor C2 cannot change suddenly, a negative voltage -Vo+ appears at the anode of the second diode D2, and the third diode D3 is forward-conducted to start charging the third capacitor C3, and the voltage across the third capacitor C3 is also charged to Vo+ in a steady state; a negative voltage output is obtained at the upper end of the third capacitor C3.

[0062] Beneficial effects of the utility model:

[0063] 1. The structure is simple. Based on the DC-DC control chip, negative voltage output is achieved by setting capacitors and diodes at the switch node.

[0064] 2. Low cost, using universal DC-DC control chip, no need to use dedicated control chip, reducing cost.

[0065] The DC-DC control chip adopts a Boost converter, a buck converter or a Sepic converter.

[0066] In this embodiment, if Figure 1 As shown, the DC-DC control chip adopts a Boost converter.

[0067] The Boost converter includes a startup circuit, a main control IC, a drive circuit, and a MOS tube Q1.

[0068] The source of the MOS transistor Q1 is grounded; the drain of the MOS transistor Q1 serves as a switch node SW.

[0069] One end of the startup circuit is electrically connected to the Vin port; the other end of the startup circuit is electrically connected to the first port of the main control IC.

[0070] One end of the driving circuit is electrically connected to the gate of the MOS tube Q1; the other end of the driving circuit is electrically connected to the second port of the main control IC.

[0071] The Boost converter further includes a first capacitor C1, a first diode D1, a first inductor L1, and a first resistor R1.

[0072] One end of the first inductor L1 is electrically connected to the Vin port; the other end of the first inductor L1 is electrically connected to the drain of the MOS tube Q1.

[0073] The anode of the first diode D1 is electrically connected to the drain of the MOS transistor Q1; the cathode of the first diode D1 is electrically connected to the anode of the first capacitor C1; and the cathode of the first capacitor C1 is grounded.

[0074] The first resistor R1 is connected in parallel across the first capacitor C1.

[0075] More specifically, the Boost converter further includes a current sampling circuit.

[0076] The first port of the current sampling circuit is electrically connected to the source of the MOS tube Q1; the second port of the current sampling circuit is electrically connected to the third port of the main control IC; and the third port of the current sampling circuit is grounded.

[0077] More specifically, the Boost converter further includes a voltage sampling circuit.

[0078] One end of the voltage sampling circuit is electrically connected to the Vo+ port; the other end of the voltage sampling circuit is electrically connected to the fourth port of the main control IC.

[0079] The magnitude of the negative voltage output Vo- is approximately equal to the positive output voltage Vo+ of the Boost converter, so the magnitude of the negative voltage output can be easily adjusted by adjusting the resistance value of the voltage sampling circuit. Since the duty cycle is very small when the positive output voltage Vo+ is unloaded, although there is a negative voltage output at this time, it is almost impossible to carry a load. This problem can be solved by an external load resistor R1. After adding the load resistor R1, the duty cycle of the converter increases, and the negative voltage Vo-carrying capacity is enhanced. The value of R1 can be adjusted according to the negative voltage carrying capacity to obtain better negative voltage output performance. Since the DC-DC control chip of the Boost converter is very cheap and there are many manufacturers, the implementation cost of this solution is very low, there are few components, and the circuit reliability is high.

[0080] Example 2

[0081] like Figure 2 As shown, based on a negative voltage output device described in Example 1, in this embodiment, the startup circuit includes a resistor R2 and a seventh capacitor C7.

[0082] One end of the resistor R2 is electrically connected to the Vin port as one end of the startup circuit; the other end of the resistor R2 is electrically connected to one end of the seventh capacitor C7 and the first port of the main control IC as the other end of the startup circuit.

[0083] The other end of the seventh capacitor C7 is grounded.

[0084] The driving circuit includes a sixth diode D6 and a fifth resistor R5.

[0085] One end of the fifth resistor R5 is electrically connected to the gate of the MOS transistor Q1 as one end of the driving circuit; the other end of the fifth resistor R5 is electrically connected to the second port of the main control IC as the other end of the driving circuit.

[0086] The sixth diode D6 is connected in parallel to both ends of the fifth resistor R5.

[0087] The current sampling circuit includes an eighth resistor R8, a ninth resistor R9, and a thirteenth capacitor C13;

[0088] One end of the eighth resistor R8 serves as the first port of the current sampling circuit and is electrically connected to the source of the MOS tube Q1 ; the other end of the eighth resistor R8 serves as the other end of the current sampling circuit and is electrically connected to the third port of the main control IC.

[0089] One end of the ninth resistor R9 is electrically connected to one end of the eighth resistor R8; the other end of the ninth resistor R9 serves as the third port of the current sampling circuit and is grounded.

[0090] One end of the thirteenth capacitor C13 is electrically connected to the other end of the eighth resistor R8; the other end of the thirteenth capacitor C13 is electrically connected to the other end of the ninth resistor R9.

[0091] The voltage sampling circuit includes a third resistor R3 and a seventh resistor R7.

[0092] One end of the third resistor R3 serves as one end of the voltage sampling circuit and is electrically connected to the Vo+ port; the other end of the third resistor R3 serves as the other end of the voltage sampling circuit and is electrically connected to the fourth port of the main control IC.

[0093] One end of the seventh resistor R7 is electrically connected to the other end of the third resistor R3; the other end of the seventh resistor R7 is grounded.

[0094] The main control IC adopts UC2843 control chip.

[0095] The Boost converter further includes: a fourth resistor R4, a sixth resistor R6, a ninth capacitor C9, an eleventh capacitor C11, and a twelfth capacitor C12.

[0096] The UC2843 control chip includes a COMP port, a VFB port, a CS port, a RT / CT port, a VREF port, a VCC port, an OUT port, and a GND port.

[0097] The VCC port serves as the first port of the master control IC; the OUT port serves as the second port of the master control IC; the CS port serves as the third port of the master control IC; and the VFB port serves as the fourth port of the master control IC.

[0098] One end of the fourth resistor R4 is electrically connected to the COMP port; the other end of the fourth resistor R4 is electrically connected to the other end of the third resistor R3; and the ninth capacitor C9 is connected in parallel to both ends of the fourth resistor R4.

[0099] One end of the twelfth capacitor C12 is electrically connected to the RT / CT port; the other end of the twelfth capacitor C12 is grounded; one end of the sixth resistor R6 is electrically connected to the RT / CT port, and the other end is electrically connected to one end of the eleventh capacitor C11; the other end of the eleventh capacitor C11 is electrically connected to the other end of the C12 capacitor; one end of the eleventh capacitor C11 is electrically connected to the VREF port.

[0100] The GND port is grounded.

[0101] The Boost converter further includes a Schottky diode SBD1, a sixth capacitor C6, an eighth capacitor C8, and a tenth capacitor C10.

[0102] The cathode of the Schottky diode SBD1 is electrically connected to the Vo+ port, and the anode of the Schottky diode SBD1 is electrically connected to the other end of the first inductor L1.

[0103] The sixth capacitor C6 has a positive electrode electrically connected to the Vin port, and a negative electrode grounded.

[0104] One end of the eighth capacitor C8 is electrically connected to the Vin port, and the other end is grounded.

[0105] The tenth capacitor C10 has a positive electrode electrically connected to the Vo+ port, and a negative electrode electrically connected to the switch node SW.

[0106] The startup circuit is used to supply power to the chip when powered on.

[0107] The driving circuit is used to drive the MOS tube Q1 and control the switching state of the MOS tube Q1.

[0108] The voltage sampling circuit is responsible for collecting the output positive voltage Vo+, and together with the current sampling circuit, participates in the on-off control of the MOS tube to achieve the stability of Vo+.

[0109] When the Boost circuit is working, the switch tube Q1 will only be in two states, on and off. The sum of the on and off time is equal to the switching period, so a square wave will be formed at the drain SW of Q1, such as Figure 3 shown.

[0110] When Q1 is turned off, the voltage at SW is approximately equal to Vo+, the second diode D2 is turned on, the second capacitor C2 is charged, the voltage is positive on the left and negative on the right, and the direction of the charging current is as follows: Figure 4As shown, in steady state, the voltage across the second capacitor C2 can be charged to Vo+; when Q1 is turned on, the voltage at SW is pulled down to GND by the MOS tube, and the voltage at SW is approximately zero. However, since the voltage across the second capacitor C2 cannot change suddenly, a negative voltage -Vo+ will appear at the anode of the second diode D2, and the third diode D3 will be forward-conducted to start charging the third capacitor C3. The voltage is positive at the bottom and negative at the top. The direction of the charging current is as follows: Figure 5 As shown, the voltage across the third capacitor C3 can also be charged to Vo+ in steady state. The above working process is repeated in the following cycles. Since the actual reference ground is the lower end of C3, a negative voltage output is obtained at the upper end of C3. In this way, on the basis of the conventional power supply topology, only capacitors and diodes are added to obtain negative voltage, which is used to power components that require negative voltage power supply.

[0111] Example 3

[0112] In this embodiment, if Figure 6 As shown, the negative voltage output device according to Embodiment 1 further includes a fourth capacitor C4, a fifth capacitor C5, a fourth diode D4, and a fifth diode D5.

[0113] One end of the fourth capacitor C4 is electrically connected to one end of the third diode D3; the other end of the fourth capacitor C4 is electrically connected to the other end of the second capacitor C2.

[0114] One end of the fifth capacitor C5 is electrically connected to the negative voltage output port Vo-; the other end of the fifth capacitor C5 is electrically connected to one end of the third capacitor C3.

[0115] The anode of the fourth diode D4 is electrically connected to one end of the third capacitor C3; the cathode of the fourth diode D4 is electrically connected to the anode of the second diode.

[0116] The anode of the fifth diode D5 is electrically connected to the cathode of the third diode D3; the cathode of the fifth diode D5 is electrically connected to one end of the third capacitor C3.

[0117] The DC-DC control chip adopts a Boost converter;

[0118] The Boost converter includes a startup circuit, a main control IC, a drive circuit, and a MOS tube Q1.

[0119] The source of the MOS transistor Q1 is grounded; the drain of the MOS transistor Q1 serves as a switch node SW.

[0120] One end of the startup circuit is electrically connected to the Vin port; the other end of the startup circuit is electrically connected to the first port of the main control IC.

[0121] One end of the driving circuit is electrically connected to the gate of the MOS tube Q1; the other end of the driving circuit is electrically connected to the second port of the main control IC.

[0122] The Boost converter further includes a first capacitor C1, a first diode D1, a first inductor L1, and a first resistor R1.

[0123] One end of the first inductor L1 is electrically connected to the Vin port; the other end of the first inductor L1 is electrically connected to the drain of the MOS tube Q1.

[0124] The anode of the first diode D1 is electrically connected to the drain of the MOS transistor Q1; the cathode of the first diode D1 is electrically connected to the anode of the first capacitor C1; and the cathode of the first capacitor C1 is grounded.

[0125] The first resistor R1 is connected in parallel across the first capacitor C1.

[0126] The Boost converter also includes a current sampling circuit and a voltage sampling circuit.

[0127] The first port of the current sampling circuit is electrically connected to the source of the MOS tube Q1; the second port of the current sampling circuit is electrically connected to the third port of the main control IC; and the third port of the current sampling circuit is grounded.

[0128] One end of the voltage sampling circuit is electrically connected to the cathode of the first diode D1 ; the other end of the voltage sampling circuit is electrically connected to the fourth port of the main control IC.

[0129] In this embodiment, a higher negative voltage output can be achieved, and the negative voltage Vo- is approximately equal to twice the positive voltage Vo+, and the circuit has strong scalability.

[0130] Although this solution is a negative voltage output device built with the help of Boost converter, it is not limited to using Boost converter. Buck converter, Sepic converter, etc. can also be used. You only need to find the switch node of these converters and then Figure 1 ,or Figure 6 The circuit in Figure 1 is connected to the switch node to generate a negative voltage output.

[0131] Obviously, the above embodiments of the utility model are only examples for clearly explaining the utility model, and are not intended to limit the implementation methods of the utility model. For ordinary technicians in the relevant field, other different forms of changes or modifications can be made on the basis of the above description. It is not necessary and impossible to list all the implementation methods here. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the utility model should be included in the protection scope of the claims of the utility model.

Claims

1. A negative voltage output device, characterized in that: It includes a DC-DC control chip, a second capacitor C2, a third capacitor C3, a second diode D2, and a third diode D3; One end of the second capacitor C2 is electrically connected to the switch node SW of the output end of the DC-DC control chip; the other end of the second capacitor C2 is electrically connected to the positive electrode of the second diode D2; the negative electrode of the second diode D2 is grounded; The cathode of the third diode D3 is electrically connected to the other end of the second capacitor C2; the anode of the third diode D3 is connected to the negative voltage output port Vo-; One end of the third capacitor C3 is electrically connected to the other end of the third diode D3; the other end of the third capacitor C3 is grounded.

2. A negative voltage output device according to claim 1, characterized in that: Also includes a fourth capacitor C4, a fifth capacitor C5, a fourth diode D4, and a fifth diode D5; One end of the fourth capacitor C4 is electrically connected to one end of the third diode D3; the other end of the fourth capacitor C4 is electrically connected to the other end of the second capacitor C2; One end of the fifth capacitor C5 is electrically connected to the negative voltage output port Vo-; the other end of the fifth capacitor C5 is electrically connected to one end of the third capacitor C3; The anode of the fourth diode D4 is electrically connected to one end of the third capacitor C3; the cathode of the fourth diode D4 is electrically connected to the anode of the second diode; The anode of the fifth diode D5 is electrically connected to the cathode of the third diode D3; the cathode of the fifth diode D5 is electrically connected to one end of the third capacitor C3.

3. A negative voltage output device according to any one of claims 1 or 2, characterized in that: The DC-DC control chip adopts a Boost converter, a buck converter or a Sepic converter.

4. A negative voltage output device according to claim 3, characterized in that: The DC-DC control chip adopts a Boost converter; The Boost converter includes a startup circuit, a main control IC, a drive circuit, and a MOS tube Q1; The source of the MOS tube Q1 is grounded; the drain of the MOS tube Q1 serves as a switch node SW; One end of the startup circuit is electrically connected to the Vin port; the other end of the startup circuit is electrically connected to the first port of the main control IC; One end of the driving circuit is electrically connected to the gate of the MOS tube Q1; the other end of the driving circuit is electrically connected to the second port of the main control IC.

5. A negative voltage output device according to claim 4, characterized in that: The Boost converter also includes a first capacitor C1, a first diode D1, a first inductor L1, and a first resistor R1; One end of the first inductor L1 is electrically connected to the Vin port; the other end of the first inductor L1 is electrically connected to the drain of the MOS tube Q1; The anode of the first diode D1 is electrically connected to the drain of the MOS transistor Q1; the cathode of the first diode D1 is electrically connected to the anode of the first capacitor C1; the cathode of the first capacitor C1 is grounded; The first resistor R1 is connected in parallel across the first capacitor C1.

6. A negative voltage output device according to claim 4, characterized in that: The Boost converter also includes a current sampling circuit; The first port of the current sampling circuit is electrically connected to the source of the MOS tube Q1; the second port of the current sampling circuit is electrically connected to the third port of the main control IC; and the third port of the current sampling circuit is grounded.

7. A negative voltage output device according to claim 6, characterized in that: The current sampling circuit includes an eighth resistor R8, a ninth resistor R9, and a thirteenth capacitor C13; One end of the eighth resistor R8 serves as the first port of the current sampling circuit and is electrically connected to the source of the MOS tube Q1; the other end of the eighth resistor R8 serves as the other end of the current sampling circuit and is electrically connected to the third port of the main control IC; One end of the ninth resistor R9 is electrically connected to one end of the eighth resistor R8; the other end of the ninth resistor R9 serves as the third port of the current sampling circuit and is grounded; One end of the thirteenth capacitor C13 is electrically connected to the other end of the eighth resistor R8; the other end of the thirteenth capacitor C13 is electrically connected to the other end of the ninth resistor R9.

8. The negative voltage output device according to claim 4, characterized in that: The Boost converter also includes a voltage sampling circuit; One end of the voltage sampling circuit is electrically connected to the Vo+ port; the other end of the voltage sampling circuit is electrically connected to the fourth port of the main control IC.

9. The negative voltage output device according to claim 8, characterized in that: The voltage sampling circuit includes a third resistor R3 and a seventh resistor R7; One end of the third resistor R3 serves as one end of the voltage sampling circuit and is electrically connected to the Vo+ port; the other end of the third resistor R3 serves as the other end of the voltage sampling circuit and is electrically connected to the fourth port of the main control IC; One end of the seventh resistor R7 is electrically connected to the other end of the third resistor R3; the other end of the seventh resistor R7 is grounded.

10. A negative voltage output device according to any one of claims 4 to 9, characterized in that: The starting circuit includes a second resistor R2 and a seventh capacitor C7; One end of the second resistor R2 is electrically connected to the Vin port as one end of the startup circuit; the other end of the second resistor R2 is electrically connected to one end of the seventh capacitor C7 and the first port of the main control IC as the other end of the startup circuit; The other end of the seventh capacitor C7 is grounded; The driving circuit includes a sixth diode D6 and a fifth resistor R5; One end of the fifth resistor R5 is electrically connected to the gate of the MOS transistor Q1 as one end of the driving circuit; the other end of the fifth resistor R5 is electrically connected to the second port of the main control IC as the other end of the driving circuit; The sixth diode D6 is connected in parallel to both ends of the fifth resistor R5.