Multi-channel integrated chip testing device and testing system

Abstract

The utility model relates to the technical field of electronic circuits, in particular to a multi-channel integrated chip testing device and a testing system. The multichannel integrated chip testing device comprises a ballast platform used for bearing and fixing a to-be-tested module; the test module is used for being connected with the to-be-tested module to realize transmission of a test signal; the control module is used for controlling a test signal, the control module is connected with the test module and transmits the test signal to the to-be-tested module through the test module, and the test signal corresponds to the test requirement of the to-be-tested module; and the alignment device is used for realizing alignment control of the to-be-tested module and the test module. According to the testing device, rapid alignment detection can be carried out on different modules to be tested, and the testing efficiency of the modules to be tested is improved.

Description

Technical Field

[0001] The present application relates to the technical field of electronic circuits, and in particular to a multi-channel integrated chip testing device and a testing system. Background Art

[0002] With the development of microelectronics, the chip size continues to decrease, and new packaging forms are increasing. The development direction of new packaging is miniaturization, integration, and "short, light, and thin". The rapid development of new display technologies in the manufacturing process of electronic component modules such as Mini / MicroLED displays, dense integrated circuits, and micro-semiconductors. With the trend of miniaturization and precision of product and chip processes, conduction detection and action characteristic inspection are often required. There is an increasing demand for multi-channel micro-pitch output detection functions.

[0003] Chip test equipment is a device or system used to test the function, performance and quality of integrated circuits (chips). These devices are usually used for chip testing, quality control and troubleshooting on production lines. Chip test equipment usually includes automated equipment for testing integrated circuits, pad testers for testing the connection quality and electrical characteristics of chip pads, package test equipment for testing the integrity of chip packages, power testers for testing the power consumption performance of chips, and RF test equipment for testing the frequency characteristics, gain, bandwidth and other parameters of RF integrated circuits.

[0004] In the related art, the measurement of chip components such as resistors and capacitors is mostly single-channel testing, which cannot meet the test requirements of resistance testing scenarios applied to various wires, etc. On the other hand, even if there are multi-channel resistance measurements, the adapted test equipment has the problem of complex structure and high cost.

[0005] However, the applicant has found that the current chip performance testing device has the following technical problems:

[0006] Existing testing devices have the defects of low testing efficiency and poor equipment applicability. Summary of the invention

[0007] Based on this, it is necessary to provide a multi-channel integrated chip testing device and testing system that can quickly perform alignment detection on different modules to be tested, thereby improving the testing efficiency of the modules to be tested, in order to address the above problems.

[0008] In a first aspect, the present application provides a multi-channel integrated chip testing device, comprising:

[0009] Ballast platform, used to carry and fix the module to be tested;

[0010] A test module, used to connect to the module to be tested to achieve transmission of test signals;

[0011] A control module, used to control the test signal, the control module is connected to the test module, and transmits the test signal to the module to be tested through the test module, the test signal corresponds to the test requirement of the module to be tested;

[0012] The alignment device is used to realize the alignment control between the module to be tested and the test module.

[0013] In one embodiment, the ballast platform comprises:

[0014] A module cavity, used to fix the module to be tested, wherein the module cavity matches the module to be tested;

[0015] The module cover is used to fix the module to be tested, and the module cover is connected to the test module.

[0016] In one of the embodiments, the module cover includes: a transfer substrate and an FPC test board, and the FPC test board abuts against the module to be tested when the module cover is pressed together to be connected with the module to be tested.

[0017] In one embodiment, the ballast platform comprises:

[0018] An alignment mobile platform, on which the module cavity is fixed, and the alignment mobile platform is controlled by the control module to realize the alignment connection of the module to be tested;

[0019] The alignment moving platform comprises a horizontal adjustment unit, a vertical adjustment unit and a rotation adjustment unit.

[0020] In one embodiment, the ballast platform further comprises:

[0021] A conveying unit, wherein the conveying unit is used to convey the module to be tested.

[0022] In one embodiment, the test module includes:

[0023] A channel selection unit includes an input port and an output port, wherein the output port is more than the input port.

[0024] In one embodiment, the test module includes a plurality of the channel selection units, and the plurality of the channel selection units are cascaded.

[0025] In one of the embodiments, the alignment device includes an image alignment unit, and the image alignment unit is used to assist the module to be tested in aligning and connecting based on the image data of the module to be tested.

[0026] In one of the embodiments, the alignment device includes a displacement unit, and the displacement unit is used to adjust the shooting posture of the image alignment unit.

[0027] In a second aspect, the present application provides a testing system, comprising a multi-channel integrated chip testing device according to any one of the embodiments in the first aspect.

[0028] The above-mentioned multi-channel integrated chip testing device, through the derivation of the technical features in the claims, can achieve the following beneficial effects corresponding to the technical problems raised in the background technology:

[0029] The present application provides a multi-channel integrated chip testing device, comprising a ballast platform, a test module, a control module and an alignment device. The ballast platform is used to carry and fix the module to be tested, the test module is used to connect with the module to be tested to achieve the transmission of the test signal, the control module is used to achieve the control of the test signal, the control module is connected with the test module, and transmits the test signal to the module to be tested through the test module, the test signal corresponds to the test requirement of the module to be tested, and the alignment device is used to achieve the alignment control between the module to be tested and the test module. During implementation, after the module to be tested is placed in the ballast platform, the ballast platform carries the module to be tested and is fixed. At this time, the test module and the module to be tested are automatically and accurately aligned and connected under the control of the alignment device. After the connection is achieved, the control module detects whether the open circuit, short circuit, capacitance and impedance characteristics between the pins of the module to be tested meet the design requirements according to the customer's test requirements, and transmits them to the module to be tested, thereby realizing the automatic process of loading, fixing, aligning, connecting, testing and unloading the model to be tested, which helps to improve the efficiency of testing the module to be tested. On the other hand, the control module can adaptively output test signals, which helps to improve the flexibility of the test device. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the conventional technology, the drawings required for use in the embodiments or the conventional technology descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0031] Figure 1 This is a schematic diagram of the device architecture of a multi-channel integrated chip testing device in one embodiment of the present application;

[0032] Figure 2 This is a multi-channel signal control block diagram in one embodiment of the present application. DETAILED DESCRIPTION

[0033] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. Embodiments of the present application are provided in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0034] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0035] It can be understood that the “connection” in the following embodiments should be understood as “electrical connection”, “communication connection”, etc. if the connected circuits, modules, units, etc. have electrical signals or data transmission between each other.

[0036] It can be understood that “at least one” means one or more, “plurality” means two or more, and “at least a portion of an element” means a part or all of an element.

[0037] When used herein, the singular forms "a", "an", and "said / the" may also include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "include / comprise" or "have" and the like specify the presence of stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not exclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. At the same time, the term "and / or" used in this specification includes any and all combinations of the relevant listed items.

[0038] This application is made by the inventor based on the recognition and research of the following issues, specifically:

[0039] Chip test equipment is a device or system used to test the function, performance and quality of integrated circuits (chips). These devices are usually used for chip testing, quality control and troubleshooting on production lines. Chip test equipment usually includes automated equipment for testing integrated circuits, pad testers for testing the connection quality and electrical characteristics of chip pads, package test equipment for testing the integrity of chip packages, power testers for testing the power consumption performance of chips, and RF test equipment for testing the frequency characteristics, gain, bandwidth and other parameters of RF integrated circuits.

[0040] In the related art, the measurement of chip components such as resistors and capacitors is mostly single-channel testing, which cannot meet the test requirements of resistance testing scenarios applied to various wires, etc. On the other hand, even if there are multi-channel resistance measurements, the adapted test equipment has the problem of complex structure and high cost.

[0041] However, the applicant has found that the current chip performance testing device has the following technical problems:

[0042] Existing testing devices have the defects of low testing efficiency and poor equipment applicability.

[0043] Based on this, the embodiment of the present application provides a multi-channel integrated chip testing device, which can be Figure 1 As shown, it includes: a ballast platform, a test module, a control module and an alignment device.

[0044] Among them, the ballast platform is used to carry and fix the module to be tested. The ballast platform includes a module cavity and a module cover. The module cavity is used to fix the module to be tested, and the module cavity matches the size, appearance and shape of the module to be tested. In order to meet the needs of a variety of different modules to be tested, the module cavity can be detachably assembled, which is convenient for disassembly and replacement according to the module to be tested. The module cavity can also be a multi-layer structure cavity that can adapt to different modules to be tested at the same time. The module cover is also used to fix the module to be tested. The module cover is used in conjunction with the module cavity to fix the module to be tested. In addition, the module cover is also connected to the test module.

[0045] The test module is used to connect with the module to be tested to achieve the transmission of the test signal. The test module may include test instruments for different test items, such as a high-precision capacitance and resistance LCR tester.

[0046] The control module is used to control the test signal. The control module is connected to the test module and transmits the test signal to the module to be tested through the test module. The test signal corresponds to the test requirement of the module to be tested. The control module can be a control mainboard, which is equipped with Mac software, and the output control of the test signal is realized through the control software.

[0047] The alignment device is used to realize the alignment control of the module to be tested and the test module, and the alignment device can assist the module to be tested to realize the alignment connection based on the captured alignment image. Specifically, the alignment device is a high-precision macro alignment device with an accuracy of μm.

[0048] By implementing the above-mentioned multi-channel integrated chip testing device, the following beneficial effects can be achieved:

[0049] The present application provides a multi-channel integrated chip testing device, comprising a ballast platform, a test module, a control module and an alignment device. The ballast platform is used to carry and fix the module to be tested, the test module is used to connect with the module to be tested to achieve the transmission of the test signal, the control module is used to achieve the control of the test signal, the control module is connected with the test module, and transmits the test signal to the module to be tested through the test module, the test signal corresponds to the test requirement of the module to be tested, and the alignment device is used to achieve the alignment control between the module to be tested and the test module. During implementation, after the module to be tested is placed in the ballast platform, the ballast platform carries the module to be tested and is fixed. At this time, the test module and the module to be tested are automatically and accurately aligned and connected under the control of the alignment device. After the connection is achieved, the control module detects whether the open circuit, short circuit, capacitance and impedance characteristics between the pins of the module to be tested meet the design requirements according to the customer's test requirements, and transmits them to the module to be tested, thereby realizing the automatic process of loading, fixing, aligning, connecting, testing and unloading the model to be tested, which helps to improve the efficiency of testing the module to be tested. On the other hand, the control module can adaptively output test signals, which helps to improve the flexibility of the test device.

[0050] In one embodiment, the module cover includes a transfer substrate and an FPC test board. The FPC test board contacts the module to be tested when the module cover is pressed together. The connection between the test module and the module to be tested is achieved by pressing the gold fingers of the FPC test board onto the gold fingers with a small pin spacing of the module to be tested. Specifically, the upper end of the FPC test board can be transferred to the transfer substrate through a connector, and then connected to the test module through a coaxial line. In one embodiment, the ballast platform also includes an alignment mobile platform, and the module cavity is fixed on the alignment mobile platform. The alignment mobile platform is controlled by a control module to achieve alignment connection of the module to be tested. The alignment mobile platform includes a horizontal adjustment unit, a vertical adjustment unit, and a rotation adjustment unit. The alignment mobile platform can be a UVW alignment platform, and the UVW alignment platform can generally be composed of three independent axes, respectively marked as U, V, and W axes. These axes can move in different directions, allowing the user to fine-tune and align in three directions to ensure the accurate position of the workpiece or equipment.

[0051] In this embodiment, three-axis movement is achieved through the alignment mobile platform, thereby satisfying the adjustment of different positions and postures of the module to be tested and improving the alignment efficiency of the module to be tested.

[0052] The visual Mark calibration alignment is achieved by automatically adjusting the movement of the UVW alignment platform. After the Mark calibration alignment is completed, the above-mentioned crimping process is performed to complete the signal docking output and prepare for the test process. By adopting the Mark alignment crimping method between the gold fingers, the traditional probe crimping method is replaced, reducing the risk of the probe piercing the module to be tested. In one embodiment, the ballast platform also includes a conveying unit, which is used to convey the module to be tested, thereby realizing automatic loading and unloading of the module to be tested.

[0053] In this embodiment, the conveying unit is used to realize the conveying, loading and unloading of the module to be tested in the testing device, which helps to improve the efficiency of the testing device in testing the module to be tested.

[0054] In one embodiment, it can be Figure 2 As shown, the test module includes a channel selection unit, the channel selection unit includes an input port and an output port, the output port is more than the input port, and the input port and the output port can be a signal transmission port such as a mini USB port. The test module includes a plurality of channel selection units, and the plurality of channel selection units are cascaded. Specifically, the control module can be connected to the Mac via the mini USB port to receive and issue test requirement commands, convert the I2C port communication signal, and select the I2C communication expansion of ADG (analog switch, Analog Devices Gate) by configuring the A0 and A1 addresses of MCP (integrated circuit products, such as analog / digital converters (ADC), digital / analog converters (DAC), operational amplifiers (Op-Amp), power management ICs, etc.) through commands. Through ADG, it can be expanded to 4 I2C lines. Each pair of I2C lines can select different corresponding control chips according to 3 groups of addresses (A0, A1, A2 from 000 to 111), and the high and low bits are fixedly configured through hardware to distinguish each PCAL (PCA953x series digital I / O expanders), and finally realize the high and low level output control of each 16 pairs of I / O ports of multiple PCAL chips.

[0055] Furthermore, the three-level cascade I / O port is selected through the I2C communication method, and the three-level addresses are different, so as to accurately select the required pin port. Through the three-level cascade, the same end can be selected up to 2*8*16=256 test ports, so as to realize the control of 256 ports of the double H end and L end of the LCR. Then the I / O chip controls the 16-bit terminal address line port to open the corresponding relay, and controls the opening and closing of the high-sensitivity relay through high and low levels. One relay controls the opening and closing of the two lines at the same time, and connects to the L and H double ports of the LCR through 4 BNC lines. In this way, each double line of the LCR can be opened through the relay at the end of the gold finger extending to the FPC test board through the coaxial line and the transfer substrate, so as to realize the four-wire method to reach the contact end of the module to be tested, so that the interference in the line can be removed to the maximum extent, so that the capacitance and resistance values ​​and open and short circuit conditions between any two pins of the 256-pin pin module can be tested to obtain more accurate test values ​​and judgment results.

[0056] In one embodiment, the alignment device includes an image alignment unit, which is used to assist the module to be tested in alignment connection based on the image data of the module to be tested. The alignment device includes a displacement unit, which is used to adjust the shooting posture of the image alignment unit.

[0057] In this embodiment, the image data can be acquired with the help of the image alignment unit, thereby assisting in the alignment connection of the module to be tested. On the other hand, the displacement unit in the alignment device can adjust the shooting posture of the image alignment unit, reducing the restrictions brought by the shooting angle.

[0058] It can be understood that the above-mentioned multi-channel integrated chip testing device can also adopt other forms, not limited to the forms mentioned in the above embodiments, as long as it can achieve the functions of improving the test efficiency of the module to be tested, realizing automatic alignment connection, and controlling multiple test signal channels.

[0059] Based on the same inventive concept, the present application also provides a testing system, including a multi-channel integrated chip testing device according to any one of the above embodiments.

[0060] In the description of this specification, the description with reference to the terms "some embodiments", "other embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic description of the above terms does not necessarily refer to the same embodiment or example.

[0061] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0062] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A multi-channel integrated chip testing device, characterized in that: include: Ballast platform, used to carry and fix the module to be tested; A test module, used to connect to the module to be tested to achieve transmission of test signals; A control module, used to control the test signal, the control module is connected to the test module, and transmits the test signal to the module to be tested through the test module, the test signal corresponds to the test requirement of the module to be tested; The alignment device is used to realize the alignment control between the module to be tested and the test module.

2. The multi-channel integrated chip testing device according to claim 1, characterized in that: The ballast platform comprises: A module cavity, used to fix the module to be tested, wherein the module cavity matches the module to be tested; The module cover is used to fix the module to be tested, and the module cover is connected to the test module.

3. The multi-channel integrated chip testing device according to claim 2, characterized in that: The module cover includes: a transfer substrate and an FPC test board. When the module cover is pressed together, the FPC test board abuts against the module to be tested so as to be connected with the module to be tested.

4. The multi-channel integrated chip testing device according to claim 2, characterized in that: The ballast platform comprises: An alignment mobile platform, on which the module cavity is fixed, and the alignment mobile platform is controlled by the control module to realize the alignment connection of the module to be tested; The alignment moving platform comprises a horizontal adjustment unit, a vertical adjustment unit and a rotation adjustment unit.

5. The multi-channel integrated chip testing device according to claim 2, characterized in that: The ballast platform also includes: A conveying unit, wherein the conveying unit is used to convey the module to be tested.

6. The multi-channel integrated chip testing device according to claim 1, characterized in that: The test module includes: A channel selection unit includes an input port and an output port, wherein the output port is more than the input port.

7. The multi-channel integrated chip testing device according to claim 6, characterized in that: The test module includes a plurality of channel selection units, and the plurality of channel selection units are cascaded.

8. The multi-channel integrated chip testing device according to claim 1, characterized in that: The alignment device includes an image alignment unit, and the image alignment unit is used to assist the module to be tested in aligning and connecting based on the image data of the module to be tested.

9. The multi-channel integrated chip testing device according to claim 8, characterized in that: The alignment device comprises a displacement unit, and the displacement unit is used to adjust the shooting posture of the image alignment unit.

10. A testing system, characterized in that: It comprises a multi-channel integrated chip testing device according to any one of claims 1-9.

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