Carrier plate and coating equipment

By designing a disk carrier device for flip-up superconducting quantum chips, the problem of chip structure changes during coating process is solved, signal conduction stability and effective connection of components are achieved, and manufacturing difficulty is reduced.

CN222631539UActive Publication Date: 2025-03-18ORIGIN QUANTUM COMPUTING TECH (HEFEI) CO LTD
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Patent Information

Application Number
CN202420926323.2
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-04-29
Publication Date
2025-03-18
Estimated Expiration
2034-04-29

AI Technical Summary

Technical Problem

When manufacturing flip-flop superconducting quantum chips, the coating process can easily lead to changes in the chip structure, which will affect signal conduction and the effective connection of components, increasing the manufacturing difficulty.

Method used

A disk-carrying device is designed, which includes a body having a surface, an upright column and a support body. The load hole on the column consists of a first hole section, a second hole section and an arc-shaped hole wall. The support column of the support body is removably arranged in the load hole for supporting and protecting the chip to avoid mechanical damage.

Benefits of technology

By using the disk-carrying chip, it is possible to reduce structural changes during the coating process, ensure the stability of signal conduction and the effective connection of components, and reduce the difficulty of manufacturing.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model discloses a carrying disc and coating equipment, and belongs to the field of quantum chip manufacturing. The carrying disc for carrying the chip comprises a body, a stand column and a supporting column. Wherein the stand column is arranged on the body, and the supporting column is removably arranged in a carrying hole of the stand column. The carrying disc can be used for supporting the chip in the film coating operation stage in the chip manufacturing process, so that the quality of a device formed after film coating is kept, and the problem that the chip is damaged in the film coating process is solved.
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Description

Technical Field

[0001] The present application belongs to the field of quantum computers, especially the field of quantum chip manufacturing. In particular, the present application relates to a carrier and a coating device. Background Art

[0002] In pursuit of higher performance, the number of quantum bits in superconducting quantum chips continues to increase, and the various control and reading lines related to the bits are also increasing. Therefore, the planar structure layout can no longer meet the actual needs.

[0003] Therefore, the flip-chip process was introduced into the manufacture of superconducting quantum chips. By adjusting the planar layout structure to a three-dimensional structure, the number of various circuits and components within a single surface can be effectively controlled, thereby facilitating the configuration of various structures.

[0004] In order to suppress signal crosstalk and distortion in the various circuits within the chip, some solutions choose to plate metal on the back of the flip chip and then use wire bonding to ground the back of the chip. This puts forward some higher requirements for manufacturing, making chip manufacturing more difficult. Utility Model Content

[0005] The example of the present application provides a carrier and coating equipment, which can be used to reduce or even avoid damage to the chip caused by operations in the coating stage during the coating process of manufacturing flip chips.

[0006] The solution of this application example is implemented through the following contents.

[0007] In a first aspect, the present application illustratively proposes a carrier for carrying chips.

[0008] The carrier includes:

[0009] The body has a surface;

[0010] A column extending upright from the surface, the column being provided with a carrying hole for carrying a chip along the upright direction, the carrying hole comprising a first hole segment and a second hole segment arranged in sequence, wherein the first hole segment is close to the surface, the second hole segment is far from the surface, and the aperture of the first hole segment is larger than the aperture of the second hole segment; and

[0011] The support body has a base plate and a plurality of support columns connected to the base plate. The plurality of support columns are arranged on the base plate according to a preset pattern. The support body is removably arranged in the first hole section in a manner that the base plate contacts the surface and the support columns extend in an upright direction.

[0012] According to some examples of the present application, the second hole segment has a first preset depth along the vertical direction, and the first preset depth is determined depending on the thickness of the chip and is greater than the thickness of the chip.

[0013] According to some examples of the present application, there are multiple support bodies, and the preset patterns of arrangement of all support columns in each support body are different.

[0014] According to some examples of the present application, the carrier hole has an arc-shaped hole wall, the first hole segment is transitionally connected to the second hole segment through the arc-shaped hole wall, and the aperture of the arc-shaped hole wall gradually decreases from the second hole segment to the first hole segment.

[0015] According to some examples of the present application, the carrier hole also includes a stepped hole segment, which is connected to the second hole segment, and the first hole segment, the second hole segment and the stepped hole segment are arranged in sequence, and the stepped hole segment includes a plurality of sub-hole segments whose apertures decrease in sequence from the first hole segment to the second hole segment.

[0016] According to some examples of the present application, the carrier has an air hole communicating with the carrier hole.

[0017] According to some examples of the present application, the air holes are provided on the pillars.

[0018] According to some examples of the present application, the air hole also penetrates the body.

[0019] According to some examples of the present application, the air hole is provided in the body and is located in a region opposite to the first hole segment.

[0020] In a second aspect, the present application exemplarily proposes a coating device including the aforementioned carrier.

[0021] The above-mentioned carrier of the present application can be used for the coating stage in the manufacturing process of the flip chip. The carrier can be used to support the chip so as to perform surface coating on the chip. For example, the chip can be supported and carried by the carrier. In this way, by carrying the chip on the carrier, one surface of the chip can be exposed to the surface of the carrier, thereby allowing the coating material to be deposited on the one surface. At the same time, most of the area on the other surface of the chip can be protected by the columns of the carrier, isolating the most area. In addition, the support columns in the support body according to the preset pattern are combined to support the most area of ​​the chip carried by the columns (and avoid the components in the most area to prevent the components from being mechanically damaged), so as to avoid possible bending of the chip, and also ensure the coating quality of the aforementioned one surface. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] For a clearer explanation, the following briefly introduces the drawings required for the description.

[0023] Figure 1 It is a schematic diagram of a structure of a double-layer flip chip in the related art, with the back of the top chip being grounded;

[0024] Figure 2This is a schematic diagram of the structure of the carrier plate (excluding the support body) used as an example in this application;

[0025] Figure 3 for Figure 2 A schematic diagram of a cross-sectional view of the structure shown at one viewing angle;

[0026] Figure 4 for Figure 2 A schematic diagram of the structure of the cross-section of the structure shown in the axonometric perspective;

[0027] Figure 5 This is a schematic diagram of the structure in which the support body in the carrier plate of the present application example is arranged in the carrier hole of the column;

[0028] Figure 6 It is a structural schematic diagram of another cross-sectional structure of a carrier in an example of the present application under an axonometric perspective;

[0029] Figure 7 Public Figure 5 The structural schematic diagram of the relative position relationship of the carrier when used to carry the chip;

[0030] Figure 8 A schematic diagram of the structure of the carrier with arc-shaped hole segments and the chip line contact cooperation is shown.

[0031] Description of reference numerals:

[0032] 101-packaging box;

[0033] 102-base chip; 103-interconnection; 104-top chip; 105-metal film; 106-lead;

[0034] 90-carrying plate; 91-body; 92-column; 920-carrying hole;

[0035] 921-first hole section; 922-second hole section; 923-arc-shaped hole wall;

[0036] 93-support body; 931-base plate; 932-support column. DETAILED DESCRIPTION

[0037] Flip chip is an advanced integrated circuit packaging technology. In traditional packaging technology, the chip is packaged at the bottom and connected to the packaging substrate through leads. Flip chip is a three-dimensional packaged chip. Flip chip flips the chip and mounts it on the packaging substrate, and then uses solder joints or other conductive materials such as conductive glue to connect.

[0038] In superconducting quantum chips, the application of flip-chip technology can significantly reduce the difficulty of layout of different elements, devices and circuits in the chip, avoid the over-dense stacking of these structures, and reduce mutual interference between these structures, especially mutual interference between signals - such as signal crosstalk and distortion.

[0039] In order to further reduce the aforementioned mutual interference problem, some attempts have been made to ground the back side of the chip.

[0040] Take a two-layer flip chip as an example, which includes a base chip and a top chip. The base chip and the top chip face each other (front side) and are connected by, for example, indium pillars. In order to further reduce the problem of signal crosstalk and distortion, you can also choose to plate the back side (the surface facing away from the base chip) of the flip chip (top chip) with metal, and then use wire bonding to ground the back side of the chip.

[0041] The double-layer flip chip Figure 1 It includes a package box 101, a base chip 102 and a top chip 104 are connected to the package box 101 through a flip-chip assembly structure connected by an interconnection member 103 (such as an indium column).

[0042] Various superconducting quantum chip components and circuits, such as control lines, read lines, coupling elements, quantum bits, etc., are arranged on the surfaces of the base chip 102 and the top chip 104 facing each other. In order to better suppress signal interference, a metal film 105 is plated on the back of the top chip 104. On this basis, the metal film 105 is grounded to the ground plane of the packaging box 101; that is, the back of the top chip 104 is grounded.

[0043] Therefore, in this structure, the back side of the top chip 104 is plated. And the back side is plated on the premise that various circuits, components, and possibly interconnection components 103 have been manufactured on the front side of the top chip 104, and then the back side is grounded through the lead 106.

[0044] In practice, the inventors found that when this method is used to manufacture superconducting quantum chips, there will be quality problems with flip-chips, such as the inability to effectively control or read signals from the chip, or deviations from expectations, or signal crosstalk and distortion not improving as expected, and may even deteriorate.

[0045] After analysis, it was found that the causes of the above problems were:

[0046] During the coating process on the back side of the top chip 104, the front side of the top chip 104 is against the substrate holder, and the various structures manufactured on the front side of the top chip 104 may interfere (physical contact) with the substrate holder, causing these structures to undergo changes to a greater or lesser extent, such as shape, size, spatial layout, relative position, etc.

[0047] The changes in these structures will cause changes in the performance that depends on the characteristics of these structures (shape, size, spatial layout, relative position, etc.). For example, the coupling strength between the spatially coupled (or out-of-plane coupled) components on the top chip 104 and the base chip 102 may change, or effective coupling may not be formed. Alternatively, the interconnect 103 and the circuits or components on the top chip 104 or the base chip 102 may not be connected as expected, or contact defects may occur.

[0048] In view of such a situation, the applicant has chosen to design a new chip holding structure. By carrying the chip through the holding structure, the chip can maintain its own posture for coating, and the various functional structures on the front of the chip will not physically contact the holding structure, thereby avoiding mechanical damage or adverse effects on these structures.

[0049] In the example, the applicant proposes a carrier and coating equipment, which is used to coat the other surface of a chip that has various components and circuits manufactured on one surface, or to manufacture other components or circuits. In the example of this application, coating is used as an example for explanation.

[0050] See also Figures 1 to 7 , understand the following discussion.

[0051] In the example, a carrier 90 for carrying a chip is disclosed. The chip may be a component or structure having various circuits, components, devices, etc. manufactured on one or both surfaces of a base / substrate. Accordingly, when the chip is carried, one surface of the chip faces the carrier 90, and the other surface faces away from / away from the carrier 90.

[0052] like Figure 2 As shown, the carrier 90 includes a body 91, a column 92 and a support body 93 (such as Figure 5 ).

[0053] The column 92 is arranged on the body 91, and the support body 93 is arranged on the column 92. In particular, the support body 93 is removable, so that when a plurality of support bodies 93 are designed, they can be replaced to select different support bodies 93. Alternatively, the existing support body 93 can be replaced when it is damaged.

[0054] When the carrier 90 is used, the carrier 90 is fixed by the body 91, and the chip to be processed (such as coating) is set on the pillar 92. Figure 7 One surface of the chip is exposed to the outside for processing; at the same time, the other surface of the chip and various structures manufactured on the surface are not subjected to unnecessary physical contact, thereby reducing or avoiding mechanical damage, etc. that may be caused by physical contact.

[0055] The various structures in the carrier plate 90 are described in more detail below.

[0056] The body 91 can be a flat plate structure or a block structure, which can provide at least one area (plane) for configuring the column 92 and the support body 93. As an optional example, the body 91 is a flat plate structure with a relatively small thickness (not specifically limited, such as centimeter size, more specifically 0.2cm-1.0cm, etc.); it has two surfaces distributed in the thickness direction, and can be described as the top surface and the bottom surface respectively. For the convenience of discussion, the body 91 is defined as having a surface (for example, planned in the top surface), and the selected area of ​​the surface is three-dimensionally arranged therein.

[0057] In terms of shape, the body 91 is configured in various appropriate shapes without particular limitation. For example, it can be a cuboid, a prism, or a cylinder, etc. In terms of material, the body 91 can be metal, non-metal, or plastic, resin, etc., which can be selected according to actual needs.

[0058] Considering the fixing method of the carrier 90 in the coating device, the carrier 90 can be fixed by adsorption. For example, a suction cup structure is provided in the coating device to fix the carrier 90 by adsorption with the bottom surface of the body 91. Correspondingly, the bottom surface of the body 91 of the carrier 90 can be smoothed to produce a good adsorption and fixing effect. Alternatively, a clamping mechanism (for example, a clamping claw) can also be constructed in the coating device to fix the carrier 90 by a clamping operation.

[0059] The above mainly discusses the structure of the main body 91 of the carrier 90, and the following discusses the column 92 of the carrier 90.

[0060] In the carrier 90, the pillars 92 are arranged on the surface of the body 91. And the pillars 92 can be fixedly connected to the body 91, or connected in other ways (if necessary, they can be bonded). Advantageously, the body 91 and the pillars 92 are integrally formed. For example, a piece of material is taken, and a combination structure of the body 91 and the pillars 92 is formed by mechanical processing or chemical processing. Constructing the body 91 and the pillars 92 in an integral structure can fix the relative position of the two and avoid unnecessary relative displacement between the two - even if it may be small.

[0061] The pillar 92 extends upright from the surface of the body 91. Based on the upright direction, the pillar 92 is further designed in a more specific manner. For example, the pillar 92 is used to carry a chip, so when the carrier 90 is used, the chip is placed on the pillar 92. In order to improve the stability of the chip when it is placed on the pillar 92 and avoid undesired displacement of the chip, the more specific structural design of the pillar 92 is implemented as a carrier hole 920 configured in the upright direction for carrying the chip, such as Figure 2 As shown. Accordingly, the chip is sunk into the carrier hole 920. The carrier hole 920 can be a cylindrical hole, a prism hole, or a hole in other structural forms; the carrier hole 920 is adapted to (eg, in contact with) the edge contour of the chip.

[0062] For the convenience of discussion, it can be defined according to the extension track of the carrier hole 920. Figure 3 , Figure 4 and Figure 5 As shown, the carrier hole 920 may include a first hole segment 921 and a second hole segment 922 arranged in sequence. Moreover, the first hole segment 921 is close to the surface of the body 91, while the second hole segment 922 is far away from the surface of the body 91. The aperture of the first hole segment 921 is larger than the aperture of the second hole segment 922. Therefore, the chip is placed in the second hole segment 922, and is supported by the interface between the first hole segment 921 and the second hole segment 922, and contacts the decomposition surface. Preferably, the second hole segment 922 has a first preset depth in the vertical direction, and the first preset depth is determined by the thickness of the chip and is greater than the thickness of the chip. In this way, the chip can sink into the second hole segment 922 instead of being exposed above the top surface of the second hole segment 922.

[0063] As a partial example of an improved solution, an arc-shaped hole wall 923 may be configured in the carrier hole 920, such as Figure 6 The first hole segment 921 is transitionally connected to the second hole segment 922 through the arc-shaped hole wall 923, and the aperture of the arc-shaped hole wall 923 gradually decreases from the second hole segment 922 to the first hole segment 921. In other words, the arc-shaped hole wall 923 gradually expands from the surface of the body 91 to the direction away from the surface.

[0064] In this way, the chip can be placed in the arc-shaped hole wall 923. The arc-shaped hole wall 923 contacts the edge of the chip (substrate), and it can be understood that the two can form a line contact (such as Figure 8 As shown). In this way, the contact area between the chip and the arc-shaped hole wall 923 of the carrier 90 can be reduced to a considerable extent, thereby greatly reducing the negative impact of the carrier 90 on the chip during the coating process. In addition, another advantage of this solution is that the arc-shaped hole wall 923 can also adapt to chips of different sizes, such as the diameter of a circular substrate.

[0065] In addition to the above improvements, in other examples, a stepped hole section can be configured in the carrier hole 920 of the column 92. The stepped hole section is connected to the second hole section 922, and the first hole section 921, the second hole section 922 and the stepped hole section are arranged in sequence. That is, the stepped hole section is farther away from the surface of the body 91. The stepped hole section includes a plurality of sub-hole sections whose apertures are successively reduced along the direction from the first hole section 921 to the second hole section 922. In this way, these multiple sub-hole sections can be adapted to chips of different sizes.

[0066] The above mainly discusses how to place the chip in the carrier hole 920 in order to stabilize the posture of the chip and prevent possible displacement of the chip and other undesirable movements. As an optimized option, the chip can also be temporarily fixed by using negative pressure adsorption. For example, in some examples, the carrier 90 is provided with an air hole (not shown) connected to the carrier hole 920. When the chip is placed on the column 92, the chip contacts the area of ​​the air hole, and the chip is squeezed and contacts the surface of the air hole area through the negative pressure.

[0067] The position of the air hole can be realized in many ways, preferably for convenient configuration.

[0068] For example, the air holes can be arranged on the pillar 92. For example, the air holes include a section arranged horizontally and another section arranged vertically. The air holes arranged vertically are at the end and cooperate with the chip; the air holes arranged horizontally can be connected to the exhaust mechanism at the end to generate negative pressure.

[0069] Alternatively, the pores may also penetrate the body 91, and thus, the pores may include a section penetrating the body 91 and another section penetrating the pillars 92 from the surface of the body 91. In such an example, the pores may be arranged vertically relative to the surface of the body 91.

[0070] Alternatively, the air hole may also be provided in the body 91 and located in a region opposite to the first hole section 921 .

[0071] So far, the main body 91 and the pillars 92 in the carrier plate 90 have been fully disclosed above, and the support body 93 in the carrier plate 90 will be discussed below.

[0072] The support body 93 is a structure for being in the loading hole 920 of the pillar 92 and supporting the chip carried on the pillar 92. In particular, the support body 93 is also removable, so it can be replaced by another support body 93 of the same specification, or it can also be replaced by another or other support bodies 93 of different specifications.

[0073] In the example, the support body 93 has a bottom plate 931 and a plurality of support columns 932 connected to the bottom plate 931. The support body 93 is removably placed in the first hole section 921 of the loading hole 920 provided in the column 92 in such a manner that the bottom plate 931 contacts the surface and the support columns 932 extend in the upright direction of the column 92.

[0074] The number of the support columns 932 can be one, two, three, four, etc. The number of the support columns 932 can be set as needed. It can be understood that in order to avoid the support columns 932 from contacting various structures on the surface of the chip when the support body 93 supports the chip, the distribution of the support columns 932 on the bottom plate 931 is limited, that is, it is intentionally designed to avoid various structures on the chip. It can also be understood from this that when using the carrier 90, the chip, the column 92 and the support body 93 are each positioned so that the chip installed in place can be supported by the support body 93 without mechanical damage.

[0075] Then, the plurality of support pillars 932 in the support body 93 may be arranged on the bottom plate 931 according to a preset pattern. It can be understood that the preset pattern is a distribution form that avoids various structures on the chip surface. For example, the chip surface is provided with a coplanar waveguide transmission line distributed in a straight line, so the plurality of support pillars 932 may be arranged in a straight line along the extension track of the coplanar waveguide transmission line, so that the preset pattern may be a straight line, or a long rectangular strip.

[0076] When the chip sizes are the same but the various structures (number, shape, size, spatial arrangement, etc.) configured on the chip surface are different, in order to make the carrier 90 equally adaptable to the loading and support of these chips, multiple support bodies 93 can be configured in the carrier 90. That is, there are multiple support bodies 93, and the preset patterns of the arrangement of all support pillars 932 in each support body 93 are different.

[0077] Through the above discussion, the carrier plate 90 has been discussed in detail and fully. As an example of its application, a coating device is also disclosed in the example, which includes the aforementioned carrier plate 90. It can be known that in some more specific examples, the coating device may also include a vacuum chamber, a vacuum pump, a vacuum gauge, a sample holder, etc. For an electron beam evaporation coating device, the coating device may also include an electron gun, etc. In some more specific examples, the coating device may be an electron beam evaporation coating machine.

[0078] The embodiments described above with reference to the accompanying drawings are exemplary and are only used to explain the present application, but should not be construed as limiting the present application.

[0079] To make the purpose, technical scheme and advantages of the embodiments of the present application clearer, the foregoing describes one or more embodiments with reference to the accompanying drawings. Wherein, similar reference numerals throughout the text are used to refer to similar components. In the above description, for the purpose of explanation, many specific details are set forth in order to provide a more thorough understanding of one or more embodiments. However, it is obvious that in various cases, one or more embodiments can be practiced without these specific details, and each embodiment can be combined with each other and referenced to each other without contradiction.

[0080] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0081] In addition, it should be understood that when a layer (or film), region, pattern or structure is referred to as being "on" a substrate, layer (or film), region and / or pattern, it can be directly on another layer or substrate, and / or there can also be intervening layers. In addition, it should be understood that when a layer is referred to as being "under" another layer, it can be directly under another layer, and / or there can also be one or more intervening layers. In addition, references to being "on" and "under" each layer can be made based on the accompanying drawings.

[0082] The above describes in detail the structure, features and effects of the present application based on the embodiments shown in the drawings. The above are only preferred embodiments of the present application, but the present application does not limit the scope of implementation to what is shown in the drawings. Any changes made in accordance with the concept of the present application, or modifications to equivalent embodiments with equivalent changes, which still do not exceed the spirit covered by the description and drawings, should be within the protection scope of the present application.

Claims

1. A carrier plate for carrying a chip, characterized in that: The carrier plate comprises: The body has a surface; A column extending upright from the surface, the column being provided with a carrying hole for carrying a chip along the upright direction, the carrying hole comprising a first hole segment and a second hole segment arranged in sequence, wherein the first hole segment is close to the surface, the second hole segment is far from the surface, and the aperture of the first hole segment is larger than the aperture of the second hole segment; and The support body comprises a base plate and a plurality of support columns connected to the base plate, wherein the plurality of support columns are arranged on the base plate according to a preset pattern, and the support body is removably arranged in the first hole section in such a manner that the base plate contacts the surface and the support columns extend along the upright direction.

2. The carrier according to claim 1, characterized in that: The second hole segment has a first preset depth along the upright direction, and the first preset depth is determined depending on the thickness of the chip and is greater than the thickness of the chip.

3. The carrier plate according to claim 1, characterized in that: There are multiple support bodies, and the preset patterns of arrangement of all support columns in each support body are different.

4. The carrier according to claim 1, characterized in that: The carrier hole has an arc-shaped hole wall, the first hole section is transitionally connected to the second hole section through the arc-shaped hole wall, and the hole diameter of the arc-shaped hole wall gradually decreases from the second hole section to the first hole section.

5. The carrier plate according to claim 1, characterized in that: The carrier hole also includes a stepped hole section, which is connected to the second hole section, and the first hole section, the second hole section and the stepped hole section are arranged in sequence, and the stepped hole section includes a plurality of sub-hole sections whose apertures decrease in sequence along the direction from the first hole section to the second hole section.

6. The carrier plate according to claim 1, characterized in that: The carrier plate has an air hole communicated with the carrier hole.

7. The carrier plate according to claim 6, characterized in that: The air hole is arranged on the column.

8. The carrier plate according to claim 7, characterized in that: The air hole also penetrates the body.

9. The carrier plate according to claim 6, characterized in that: The air hole is arranged on the body and is located in a region opposite to the first hole section.

10. A coating device, characterized in that: A carrier comprising the carrier according to any one of claims 1 to 9.