Display power supply control circuit

Abstract

The utility model relates to a display power supply control circuit which comprises a display circuit module. The display circuit module is electrically connected with a system power supply module and a meter reading stopping battery G2 respectively; in a normal state, the system power supply supplies power to the display circuit module, and in a power failure state, the meter reading stopping battery G2 supplies power to the display circuit module; the display power supply control circuit comprises filter capacitors CQ6 and CQ7, divider resistors RQ1 and RQ3, an integrated circuit UQ1 and a bootstrap capacitor CQ3; in the integrated circuit UQ1, a pin 2 is grounded, one path of a pin 5 is connected with an MHVDD end, a pin 4 is divided into two paths, one path is grounded through a divider resistor RQ3, and the other path is connected with the MHVDD end through a divider resistor RQ1; and the MHVDD end is grounded through the filter capacitors CQ6 and CQ7 which are connected in parallel. The device is reasonable in design, compact in structure and convenient to use.

Description

Technical Field

[0001] The utility model relates to a display power supply control circuit. Background Art

[0002] With the large-scale use of smart meters, the standard requires that under normal use conditions, the service life of the LCD should be greater than 16 years; after a power outage, the LCD display is turned off and can be awakened by a button or an infrared handheld device. This requires the LCD display to have two power supplies and to be able to switch in different working scenarios. The current LCD display switching methods are: 1-using a threshold to compare the stability of the two power supplies and connect a bidirectional control switch. However, if this method has an undervoltage shutdown, an auxiliary power supply is also required. The use of software switching has the characteristics of untimely detection and high power consumption; 2-using hardware logic control method, using a DC regulator to switch the display power supply. Although there are fewer peripheral devices, this method has the disadvantages of being inflexible and high cost. The utility model proposes a display power switching circuit with flexible detection, low cost and simple control. Utility Model Content

[0003] The technical problem to be solved by the utility model is generally to provide a display power supply control circuit. When the main system power supply and the stop reading battery exist at the same time, the circuit gives priority to the main system power supply to ensure the reasonable application of the stop reading battery. When the power is off, the stop reading battery is switched to power supply in time to ensure the normal operation of the liquid crystal display of the smart meter. In the two working scenarios of power on and power off, the circuit realizes the switching of power supply by turning on and off the PNP and NPN transistors.

[0004] In order to solve the above problems, the technical solution adopted by the utility model is:

[0005] A display power control circuit includes a display circuit module; the display circuit module is electrically connected to a system power module and a stop-copy battery G2;

[0006] Under normal conditions, the system power supply supplies the display circuit module.

[0007] In the power outage state, the display circuit module is powered by the stop-scanning battery G2;

[0008] The display power supply control circuit includes filter capacitors CQ6, CQ7, voltage divider resistors RQ1, RQ3, integrated circuit UQ1, and bootstrap capacitor CQ3;

[0009] In the integrated circuit UQ1, pin 2 is grounded, pin 5 is connected to the MHVDD terminal, and pin 4 is divided into two paths, one of which is grounded through the voltage divider resistor RQ3, and the other is connected to the MHVDD terminal through the voltage divider resistor RQ1;

[0010] The MHVDD terminal is grounded through parallel filter capacitors CQ6 and CQ7;

[0011] A bootstrap capacitor CQ3 is connected between pin 1 and pin 6, and pin 6 is connected to the 5v0 terminal through the inductor LQ1; pin 3 is divided into two paths, one is connected to the ground through the resistor RQ4, and the other is connected to the 5v0 terminal through the series resistors RQ5 and RQ6; the output end of the inductor LQ1 is grounded through the parallel capacitors CQ4 and CQ5;

[0012] The 5v0 terminal supplies power to the display power supply V-LCD2.

[0013] As a further improvement of the above technical solution:

[0014] The stop-copy battery G2 is connected to the collector of transistor QD1, the base of transistor QD1 is connected to the collector of transistor QD2 through the current-limiting resistor RD2, the emitter of transistor QD1 is connected to V-LCD2 through the series-connected diode DD1 and the pull-down resistor RD11, and the 5v0 end is connected to V-LCD2 through the diode DD2;

[0015] The base of transistor QD2 is connected to the CTL-DSPLY terminal of integrated circuit UQ1 through current limiting resistor RD4;

[0016] A current limiting resistor RD3 is connected between the emitter and base of transistor QD2;

[0017] The emitter of transistor QD2 is grounded.

[0018] Capacitors CQ4 and CQ5 are output filter capacitors.

[0019] The diode DD2 is a Schottky diode DD2.

[0020] The positive terminal voltage of the bootstrap capacitor CQ3 is kept at the original voltage difference of the negative terminal.

[0021] The filter capacitor CL8 is a ceramic capacitor.

[0022] The other path of the stop copy battery G2 is connected to the ground through the filter capacitor CL7, and the pull-up resistor RD10 is connected between the collector and base of the transistor QD1;

[0023] The display power supply V-LCD2 is connected to ground via a bypass filter capacitor CL8 and is connected to ground via a bypass load resistor RD39.

[0024] When the main system power supply and the stop copy battery are both present, CTL_DSPLY is at a low level, the base of transistor QD2 is low, and transistor QD2 is in the cut-off state;

[0025] When only the shutdown battery G2 supplies power, CTL_DSPLY is at a high level, the base of the transistor QD2 is high, and the transistor QD2 is in a conducting state.

[0026] The utility model uses software to switch high and low levels to achieve switching flexibility. The pull-up resistor RD10 and the pull-down resistor RD3 of the utility model ensure that the transistors QD1 and QD2 are in a cut-off state to prevent mis-conduction. The reliability of the circuit is achieved. The utility model uses transistors, diodes, resistors, capacitors and other devices, which can effectively optimize product costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 It is a circuit diagram of the utility model. DETAILED DESCRIPTION

[0028] like Figure 1 As shown, the display power control circuit of this embodiment involves a system power module, a display circuit module, and a stop-copy battery G2. Its essence is that the main system power supply gives priority to the display power supply, and in the power outage state, it switches to the stop-copy battery for power supply, thereby achieving the stability of the LCD display power supply in different scenarios.

[0029] The utility model of this circuit is applied in the field of smart electric meters. Figure 1 As shown below,

[0030] like Figure 1 As shown, the display power control circuit includes filter capacitors CQ6, CQ7, voltage-dividing resistors RQ1, RQ3, integrated circuit UQ1, CQ3 is a bootstrap capacitor, which increases the voltage at the negative end of the capacitor, and the positive end voltage remains at the original voltage difference at the negative end. The ratio of resistors RQ4, RQ5, and RQ6 determines the size of the output voltage. Inductor LQ1 plays multiple important roles such as filtering, energy storage, and voltage reduction. CQ4 and CQ5 are output filter capacitors. Filter capacitor CL7, pull-up resistor RD10, pull-down resistor RD3, current limiting resistors RD2, RD4; load resistor RD39, used to discharge excess charge in the liquid crystal; transistors QD1, QD2, the two devices act as switches in the circuit. Diode DD1, Schottky diode DD2, play an anti-reverse role in the circuit; ceramic capacitor CL8, plays an energy storage filter role in the circuit. The stop-copy battery G2 provides power to the liquid crystal alone when there is no main system power supply.

[0031] The display power control circuit can be divided into the following two situations:

[0032] 1. When the main system power supply and the stop battery are present at the same time, CTL_DSPLY is at a low level, the base of transistor QD2 is low, and transistor QD2 is in the cut-off state; the base of transistor QD1 is pulled up to 6V, and transistor QD1 is in the cut-off state. At this time, the display power supply is provided by the main system power supply. The input voltage MHVDD enters the integrated circuit UQ1 after filtering through CQ6 and CQ7. RQ1 and RQ3 are voltage-dividing resistors that divide the voltage through MHVDD and input it to the EN pin of the integrated circuit UQ1. When it is greater than the start-up voltage threshold of the EN pin, the integrated circuit UQ1 starts to start. The 5V0 power supply is output through the filter capacitors CQ4 and CQ5, and the power supply V_LCD2 is powered through the Schottky diode DD2.

[0033] 2. When only the stop-copy battery G2 supplies power, CTL_DSPLY is at a high level, the base of transistor QD2 is high, and transistor QD2 is in the on state; the base of transistor QD1 is pulled low, and transistor QD1 is in the on state. At this time, the display power is provided by the stop-copy battery, and the stop-copy battery G2 supplies power to the power supply V_LCD2 through the transistor QD1, the diode DD1, and the current limiting resistor RD1.

[0034] In the utility model, when the main system power supply is on, the pull-up resistor RD10 and the pull-down resistor RD3 ensure that the transistors QD1 and QD2 are in the cut-off state to prevent mis-conduction. The PNP and NPN transistors are driven in series, and the load resistor RD39 is flexibly controlled under the control of CTL_DSPLY to discharge the excess charge in the liquid crystal.

[0035] The present invention is fully described for a clearer disclosure, and the prior art will not be listed one by one.

[0036] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the utility model, rather than to limit it; although the utility model is described in detail with reference to the above embodiments, ordinary technicians in this field should understand that they can still modify the technical solutions recorded in the above embodiments, or replace some of the technical features therein with equivalents; it is obvious for those skilled in the art to combine multiple technical solutions of the utility model. However, these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the utility model.

Claims

1. A display power control circuit, characterized in that: It includes a display circuit module; the display circuit module is electrically connected to a system power module and a stop copy battery G2; Under normal conditions, the system power supply supplies the display circuit module. In the power outage state, the display circuit module is powered by the stop-scanning battery G2; The display power supply control circuit includes filter capacitors CQ6, CQ7, voltage divider resistors RQ1, RQ3, integrated circuit UQ1, and bootstrap capacitor CQ3; In the integrated circuit UQ1, pin 2 is grounded, pin 5 is connected to the MHVDD terminal, and pin 4 is divided into two paths, one of which is grounded through the voltage divider resistor RQ3, and the other is connected to the MHVDD terminal through the voltage divider resistor RQ1; The MHVDD terminal is grounded through parallel filter capacitors CQ6 and CQ7; A bootstrap capacitor CQ3 is connected between pin 1 and pin 6, and pin 6 is connected to the 5v0 terminal through the inductor LQ1; pin 3 is divided into two paths, one is connected to the ground through the resistor RQ4, and the other is connected to the 5v0 terminal through the series resistors RQ5 and RQ6; the output end of the inductor LQ1 is grounded through the parallel capacitors CQ4 and CQ5; The 5v0 terminal supplies power to the display power supply V-LCD2.

2. The display power control circuit according to claim 1, characterized in that: The stop-copy battery G2 is connected to the collector of transistor QD1, the base of transistor QD1 is connected to the collector of transistor QD2 through the current-limiting resistor RD2, the emitter of transistor QD1 is connected to V-LCD2 through the series-connected diode DD1 and the pull-down resistor RD11, and the 5v0 end is connected to V-LCD2 through the diode DD2; The base of transistor QD2 is connected to the CTL–DSPLY terminal of integrated circuit UQ1 through current limiting resistor RD4; A current limiting resistor RD3 is connected between the emitter and base of transistor QD2; The emitter of transistor QD2 is grounded.

3. The display power control circuit according to claim 1, characterized in that: Capacitors CQ4 and CQ5 are output filter capacitors.

4. The display power control circuit according to claim 3, characterized in that: The diode DD2 is a Schottky diode DD2.

5. The display power control circuit according to claim 3, characterized in that: The positive terminal voltage of the bootstrap capacitor CQ3 is kept at the original voltage difference of the negative terminal.

6. The display power control circuit according to claim 3, characterized in that: The filter capacitor CL8 is a ceramic capacitor.

7. The display power control circuit according to claim 3, characterized in that: The other path of the stop copy battery G2 is connected to the ground through the filter capacitor CL7, and the pull-up resistor RD10 is connected between the collector and base of the transistor QD1; The display power supply V-LCD2 is connected to ground via a bypass filter capacitor CL8 and is connected to ground via a bypass load resistor RD39.

8. The display power control circuit according to claim 3, characterized in that: When the main system power supply and the stop copy battery are both present, CTL_DSPLY is at a low level, the base of transistor QD2 is low, and transistor QD2 is in the cut-off state; When only the shutdown battery G2 supplies power, CTL_DSPLY is at a high level, the base of the transistor QD2 is high, and the transistor QD2 is in a conducting state.

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