Backlight LED chip
By setting the insulating region and reflective layer on the substrate of the LED chip, the problem of small light output angle of the LED chip is solved, which improves applicability and production efficiency and reduces costs.
Patent Information
- Application Number
- CN202420098705.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-01-16
- Publication Date
- 2025-03-21
- Estimated Expiration
- 2034-01-16
AI Technical Summary
The light output angle of existing LED chips is small, which leads to the need to strictly control the spacing between two adjacent LED chips in the backlight source, which reduces production efficiency and increases production costs.
An insulating region is provided at the geometric center of the first surface of the substrate, light emission in the center of the chip is cancelled, and a second reflective layer is provided on the second surface, forcibly changing the light output direction of the chip, and improving the side light output.
It greatly improves the light output angle of the LED chip, increases the applicability of the chip, reduces the number of LED chips required for the backlight, and reduces the production cost.
Smart Images
Figure CN222655673U_ABST
Abstract
Description
Technical Field
[0001] The utility model belongs to the technical field of semiconductor devices, and in particular relates to a backlight LED chip. Background Art
[0002] LED backlight refers to the use of LED as the backlight source of liquid crystal display screens. Compared with traditional CCFL backlight sources, it has the advantages of low power consumption, low heat generation, high brightness and long life.
[0003] Unlike CCFL, which is a linear light source, LED, which is a point light source, requires special attention in the processing of the chip's light distribution curve and light uniformity when used in backlight. However, the existing LED chip has a small light output angle. In order to meet the light uniformity of the backlight source, the spacing between two adjacent LED chips on the packaging substrate of the backlight source needs to be strictly controlled within a small range, resulting in low production efficiency of LED backlight sources and a small application range of LED chips. In addition, when the area of the packaging substrate is large, the number of LED chips required is large, resulting in high production costs of LED backlight sources, which are not suitable for promotion and use. Utility Model Content
[0004] Based on this, the purpose of the utility model is to provide a backlight LED chip, aiming to solve the problem that the light output angle of the LED chip in the prior art is small. In order to meet the light uniformity of the backlight source, the spacing between two adjacent LED chips on the packaging substrate of the backlight source needs to be strictly controlled within a small range, resulting in low production efficiency of the LED backlight source and a small application range of the LED chip; in addition, when the area of the packaging substrate is large, the number of LED chips required is large, resulting in high production costs of the LED backlight source and not suitable for widespread promotion and use.
[0005] The utility model aims to provide a backlight LED chip, comprising a substrate, wherein the substrate comprises a first surface and a second surface arranged opposite to each other, wherein the first surface comprises a light-emitting area and an insulating area, wherein the insulating area is located at the geometric center of the first surface, and the light-emitting area is arranged in a circumferential direction of the insulating area;
[0006] A light-emitting structure is arranged in the light-emitting area, a first reflective layer is arranged on the light-emitting structure and the insulating area, and a second reflective layer is arranged on the second surface of the substrate.
[0007] Compared with the prior art, the beneficial effect of the backlight LED chip of the present invention is that: by setting an insulating area as a non-luminous area at the geometric center of the first surface of the substrate to cancel the light emission in the center of the chip, the purpose of greatly reducing the central light intensity of the chip is achieved, and a second reflective layer is set on the second surface of the substrate to force the light emission direction of the chip to change, and improve the side light emission of the chip, so as to achieve the purpose of optimizing the chip light distribution curve and increasing the chip light emission angle. Compared with traditional LED chips, the angle of the LED chip of the present invention is improved. When making a backlight source, the setting spacing range of two adjacent LED chips is greatly improved, which greatly increases the applicability of the LED chip. The number of LED chips required on the packaging substrate of the same area can be greatly reduced, thereby greatly reducing the production cost of the LED backlight source, which is conducive to promotion and use.
[0008] Optionally, the area of the insulating region is 10000 μm 2 -40000μm 2 .
[0009] Optionally, the first reflective layer located in the insulating region directly covers the substrate, or a first N-type semiconductor layer is sandwiched between the first reflective layer located in the insulating region and the substrate.
[0010] Optionally, the light-emitting structure includes a plurality of light-emitting units arranged along the circumference of the insulating region, an isolation groove is provided between two adjacent light-emitting units, the plurality of light-emitting units are isolated from each other by the isolation groove, and are electrically connected through a metal layer spanning the isolation groove.
[0011] Optionally, each of the light-emitting units includes an epitaxial stack, a current blocking layer, a transparent conductive layer and a passivation layer stacked in sequence, the epitaxial stack includes a second N-type semiconductor layer, an active layer and a P-type semiconductor layer stacked in sequence, the second N-type semiconductor layer is connected to the substrate, or a buffer layer is sandwiched between the second N-type semiconductor layer and the substrate.
[0012] Optionally, the first reflective layer includes a first reflective sublayer covering a side surface of the epitaxial stack, a second reflective sublayer covering the passivation layer, and a third reflective sublayer covering the metal layer.
[0013] Optionally, the backlight LED chip further includes a P-type electrode and an N-type electrode, the P-type electrode is electrically connected to the P-type semiconductor layer, and the N-type electrode is electrically connected to the second N-type semiconductor layer.
[0014] Optionally, the backlight LED chip further includes a P-type pad and an N-type pad, the P-type pad penetrates the first reflective sublayer and is connected to the P-type electrode, and the N-type pad penetrates the first reflective sublayer and is connected to the N-type electrode.
[0015] Optionally, the thickness of the current blocking layer is The transparent conductive layer includes any one of ITO and IZO, and the thickness of the transparent conductive layer is
[0016] Optionally, the first reflection layer and the second reflection layer are both Bragg reflection layers, and the first reflection layer and the second reflection layer respectively include one or more combinations of SiO2, Si3N4, Al2O3, TiO2, and Ta2O3. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] Figure 1 is a top view of the backlight LED chip in the first embodiment of the utility model;
[0018] Figure 2 It is a structural schematic diagram of the backlight LED chip of the utility model;
[0019] Figure 3 It is a schematic diagram of the cross-sectional structure of the backlight LED chip at the center line of the insulation area in the first embodiment of the utility model;
[0020] Figure 4 It is a top view of the backlight LED chip in the second embodiment of the utility model.
[0021] Among them, the above-mentioned drawings include the following figure marks: 10-substrate; 101-first surface; 102-second surface; 201-first light-emitting unit; 202-second light-emitting unit; 203-first connected light-emitting unit; 204-second connected light-emitting unit; 21-epitaxial stack; 211-second N-type semiconductor layer; 212-active layer; 213-P-type semiconductor layer; 30-isolation groove; 40-metal layer; 50-first reflective layer; 51-first reflective sublayer; 52-second reflective sublayer; 53-third reflective sublayer; 60-second reflective layer; 71-P-type electrode; 72-N-type electrode; 81-P-type pad; 82-N-type pad; 90-first N-type semiconductor layer.
[0022] The following specific implementation manner will be further described in conjunction with the above-mentioned drawings. DETAILED DESCRIPTION
[0023] In order to facilitate the understanding of the present invention, the present invention will be described more fully below with reference to the relevant drawings. Several embodiments of the present invention are given in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present invention more thorough and comprehensive.
[0024] It should be noted that when an element is referred to as being "fixed to" another element, it may be directly on the other element or there may be a central element. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. The terms "vertical", "horizontal", "left", "right" and similar expressions used herein are for illustrative purposes only.
[0025] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art in the technical field of the present invention. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more related listed items.
[0026] It should be noted that the light output angle of the existing LED chip is about 130°. When making a backlight source, the spacing between two adjacent LED chips on the packaging substrate needs to be strictly controlled within a small range, resulting in low production efficiency and a small application range of the chip. When the spacing between two adjacent LED chips is set too large, it will cause a checkerboard shadow of light and dark to appear in the backlight source, which does not meet the light uniformity requirements of the backlight source and affects the user experience. In addition, when the area of the packaging substrate is large, the number of LED chips required is large, which greatly increases the production cost.
[0027] Embodiment 1
[0028] See also Figures 1 to 3 The utility model provides a backlight LED chip including a substrate 10 and a light-emitting structure arranged on the substrate 10 .
[0029] As an example, the material of the substrate 10 can be a semiconductor such as sapphire, silicon carbide, silicon, etc. In this embodiment, the substrate 10 is preferably a sapphire substrate. The substrate 10 includes a first surface 101 and a second surface 102 that are oppositely disposed. Figure 2 As shown, the upper surface of the substrate 10 is the first surface 101, and the lower surface of the substrate 10 is the second surface 102. The first surface 101 includes a light-emitting area and an insulating area. The insulating area is located at the geometric center of the first surface 101. The area of the insulating area is 10000 μm 2-40000μm 2 The light-emitting area is arranged around the insulating area, and the light-emitting structure is arranged on the light-emitting area. Figure 1 As shown, the shape of the insulating area is circular. It should be noted that the shape of the insulating area is not limited to the circular shape in the above embodiment, and can also be any other shape besides a circle. Furthermore, the setting of the insulating area can not only cancel the light emission of the central part of the chip, thereby achieving the purpose of reducing the central light intensity of the chip, but also avoid the occurrence of chip failure caused by the use of ejector pins when the chip is used for sorting and bonding.
[0030] Furthermore, the light emitting structure is provided on the light emitting area of the first surface 101, such as Figure 1 As shown, the light-emitting structure in this embodiment includes a plurality of light-emitting units arranged circumferentially along an insulating region at a geometric center of a first surface 101, an isolation groove 30 is provided between two adjacent light-emitting units, the plurality of light-emitting units are isolated from each other by the isolation groove 30, and are electrically connected via a metal layer 40 spanning the isolation groove 30.
[0031] It should be noted that, in some embodiments, the light-emitting structure in the chip may have only one light-emitting unit, and the insulating region is provided in the middle region of the light-emitting unit to achieve the purpose of eliminating the light emission in the center of the chip.
[0032] Specifically, the light-emitting unit includes an epitaxial stack 21, a current blocking layer (not shown), a transparent conductive layer (not shown) and a passivation layer (not shown) stacked in sequence, wherein the epitaxial stack 21 includes a second N-type semiconductor layer 211, an active layer 212 and a P-type semiconductor layer 213 stacked in sequence, and the second N-type semiconductor layer 211 is connected to the substrate 10, or a buffer layer (not shown) is sandwiched between the second N-type semiconductor layer 211 and the substrate 10. It should be noted that the thickness of the current blocking layer is The transparent conductive layer includes any one of ITO and IZO, and the thickness of the transparent conductive layer is
[0033] Furthermore, a first reflective layer 50 is further provided on the first surface 101 of the substrate 10, and the first reflective layer 50 at least covers the four sides of the light emitting structure and the surface of the insulating region. Figure 2 As shown, the first reflective layer 50 includes a first reflective sublayer 51 covering the side of the epitaxial stack 21, a second reflective sublayer 52 covering the passivation layer (not shown), and a third reflective sublayer 53 covering the metal layer 40. Figure 3 As shown, a first N-type semiconductor layer 90 is sandwiched between the first reflective layer 50 and the substrate 10 in the insulating region.
[0034] Furthermore, in order to improve the light emission from the side of the chip, a second reflection layer 60 is provided on the second surface 102 of the substrate 10. In this embodiment, the first reflection layer 50 and the second reflection layer 60 are both Bragg reflection layers, and the first reflection layer 50 and the second reflection layer 60 respectively include one or more combinations of SiO2, Si3N4, Al2O3, TiO2, and Ta2O3. It should be noted that the utility model forcibly changes the light emission direction of the chip and improves the side light emission of the chip by providing the second reflection layer 60 on the sapphire substrate 10, thereby greatly increasing the light emission angle of the chip, so that the light distribution curve of the chip can better meet the production requirements of the backlight source.
[0035] The backlight LED chip of the present invention further includes a P-type electrode 71, an N-type electrode 71, a P-type pad 81 and an N-type pad 82. In this embodiment, Figure 1 and Figure 2 As shown, the light-emitting structure on the light-emitting area in the first surface 101 of the substrate 10 includes four light-emitting units, specifically including: a first light-emitting unit 201 provided with the P-type electrode 71, a second light-emitting unit 202 provided with the N-type electrode 72, and a first connecting light-emitting unit 203 and a second connecting light-emitting unit 204 for connecting the first light-emitting unit 201 and the second light-emitting unit 202. Among them, the P-type electrode 71 is electrically connected to the P-type semiconductor layer 213 in the epitaxial stack of the first light-emitting unit 201, and the N-type electrode 72 is electrically connected to the second N-type semiconductor layer 211 in the epitaxial stack of the second light-emitting unit 202. Furthermore, the P-type pad 81 is provided on the first light-emitting unit 201 and the first connected light-emitting unit 203 in the same column as the first light-emitting unit 201, and the P-type pad 81 penetrates the second reflective sublayer 52 on the first light-emitting unit 201 and is electrically connected to the P-type electrode; the N-type pad 82 is provided on the second light-emitting unit 202 and the second connected light-emitting unit 204 in the same column as the first light-emitting unit 202, and the N-type pad 82 penetrates the second reflective sublayer 52 on the second light-emitting unit 202 and is electrically connected to the N-type electrode 72.
[0036] Compared with the prior art, the beneficial effect of the backlight LED chip of the utility model is that: by setting an insulating area as a non-luminous area at the geometric center of the first surface of the substrate to cancel the light emission of the chip center, the central light intensity of the chip is greatly reduced, and a second reflective layer is set on the second surface of the substrate to force the light emission direction of the chip to change, and improve the side light emission of the chip, so as to achieve the purpose of optimizing the chip light distribution curve and increasing the chip light emission angle. Through the above-mentioned structural setting, the light emission angle of the LED chip of the utility model is 150°-160°. Compared with the traditional LED chip, the angle of the LED chip of the utility model is greatly improved. When making a backlight source, the setting spacing range of two adjacent LED chips is greatly improved, which greatly increases the applicability of the LED chip. The number of LED chips required on the same area of the packaging substrate can be greatly reduced, thereby greatly reducing the production cost of the LED backlight source, which is conducive to promotion and use.
[0037] Embodiment 2
[0038] See also Figure 4 , Figure 4 It is a top view of the backlight LED chip in the second embodiment of the utility model. The difference between the backlight LED chip in this embodiment and the backlight LED chip in the first embodiment is that the first reflective layer 50 located in the insulating area is in direct contact with the substrate 10. In other words, the first reflective layer 50 located in the insulating area directly covers the surface of the substrate 10 located in the insulating area.
[0039] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the utility model. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.
[0040] The above-mentioned embodiments only express several implementation methods of the utility model, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the patent of the utility model. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the utility model, and these all belong to the protection scope of the utility model. Therefore, the protection scope of the utility model patent shall be based on the attached claims.
Claims
1. A backlight LED chip, comprising a substrate, characterized in that: The substrate comprises a first surface and a second surface arranged opposite to each other, the first surface comprises a light-emitting area and an insulating area, the insulating area is located at the geometric center of the first surface, and the light-emitting area is arranged in a circumferential direction of the insulating area; A light-emitting structure is arranged in the light-emitting area, a first reflective layer is arranged on the light-emitting structure and the insulating area, and a second reflective layer is arranged on the second surface of the substrate.
2. The backlight LED chip according to claim 1, characterized in that: The area of the insulating region is 10000 μm 2 -40000μm 2 .
3. The backlight LED chip according to claim 1, characterized in that: The first reflective layer located in the insulating region directly covers the substrate, or a first N-type semiconductor layer is sandwiched between the first reflective layer located in the insulating region and the substrate.
4. The backlight LED chip according to claim 1, characterized in that: The light-emitting structure includes a plurality of light-emitting units arranged along the circumference of the insulating region, an isolation groove is provided between two adjacent light-emitting units, the plurality of light-emitting units are isolated from each other by the isolation groove, and are electrically connected via a metal layer spanning the isolation groove.
5. The backlight LED chip according to claim 4, characterized in that: Each of the light-emitting units includes an epitaxial stack, a current blocking layer, a transparent conductive layer and a passivation layer stacked in sequence, the epitaxial stack includes a second N-type semiconductor layer, an active layer and a P-type semiconductor layer stacked in sequence, the second N-type semiconductor layer is connected to the substrate, or a buffer layer is sandwiched between the second N-type semiconductor layer and the substrate.
6. The backlight LED chip according to claim 5, characterized in that: The first reflective layer includes a first reflective sublayer covering a side surface of the epitaxial stack, a second reflective sublayer covering the passivation layer, and a third reflective sublayer covering the metal layer.
7. The backlight LED chip according to claim 6, characterized in that: The backlight LED chip further includes a P-type electrode and an N-type electrode, the P-type electrode is electrically connected to the P-type semiconductor layer, and the N-type electrode is electrically connected to the second N-type semiconductor layer.
8. The backlight LED chip according to claim 7, characterized in that: The backlight LED chip further includes a P-type pad and an N-type pad. The P-type pad penetrates the first reflective sublayer and is connected to the P-type electrode. The N-type pad penetrates the first reflective sublayer and is connected to the N-type electrode.
9. The backlight LED chip according to claim 5, characterized in that: The thickness of the current blocking layer is The transparent conductive layer includes any one of ITO and IZO, and the thickness of the transparent conductive layer is 10. The backlight LED chip according to claim 1, characterized in that: The first reflection layer and the second reflection layer are both Bragg reflection layers.