Analog-to-digital conversion circuit

Abstract

The utility model provides an analog-to-digital conversion circuit, which comprises a data analog-to-digital converter with the model of c11656, and the data input end of the data analog-to-digital converter is respectively connected with three single-channel operational amplifiers and a power supply module; the power supply module provides a power supply VREF2V5, and is obtained by step-by-step voltage reduction: firstly, the voltage of a power supply VCC12V is reduced to AV + 5V through a synchronous voltage reduction converter U9, and then the voltage of the power supply VCC12V is reduced to the VREF2V5 through a voltage stabilization reference chip D14; wherein the voltage of the power supply VREF2V5 is 2.5 V, the voltage of the VCC12V is 12V, and the voltage of AV + 5V is 5V. According to the utility model, the plurality of single-channel operational amplifiers are matched with the CL1656 ADC chip for use, so that the signal quality can be improved, errors and distortion can be reduced, and the accuracy and reliability of measurement can be maintained in a weak signal or noise environment. A chip type common mode choke is connected in series on a power line of the single-channel operational amplifier to suppress high-frequency interference current; in addition, a step-by-step voltage reduction power supply module is also designed.

Description

Technical Field

[0001] The utility model relates to an analog-to-digital conversion circuit, in particular to an analog-to-digital conversion circuit. Background Art

[0002] In the design of analog-to-digital conversion digital control circuits, signal conditioning is often overlooked, which is a key step to ensure the quality of ADC input signals. Especially in high-resolution and high-speed sampling ADC applications that need to process weak signals or work in noisy environments, improper signal conditioning may cause signal distortion or error amplification, which seriously affects the accuracy and reliability of the measurement results. Utility Model Content

[0003] The utility model aims to at least solve the technical problems existing in the prior art, and particularly innovatively proposes an analog-to-digital conversion circuit.

[0004] In order to achieve the above-mentioned purpose of the utility model, the utility model provides an analog-to-digital conversion circuit, including a data analog-to-digital converter of model c11656, wherein the data input end of the data analog-to-digital converter is respectively connected to three single-channel operational amplifiers and a power module; the power module provides a power supply VREF2V5, which is obtained by step-by-step voltage reduction: first, the power supply VCC12V is stepped down to AV+5V through a synchronous buck converter U9, and then stepped down to VREF2V5 through a voltage stabilizing reference chip D14; wherein the power supply VREF2V5 is a voltage of 2.5V, VCC12V is a voltage of 12V, and AV+5V is a voltage of 5V. Step-by-step voltage reduction can ensure that the key parts of the system obtain high-quality and stable power supply, thereby improving the overall performance and reliability of the system.

[0005] Furthermore, the analog-to-digital conversion circuit comprises:

[0006] The analog signal input terminal V6 of the analog-to-digital converter U6 is connected to the first end of the resistor R213, and the second end of the resistor R213 is connected to the analog ground; the analog power positive terminal AVCC of the analog-to-digital converter U6 is connected to the first end of the capacitor C295, the first end of the capacitor C296, the first end of the capacitor C297, the first end of the capacitor C298, the first end of the capacitor C306, the first end of the capacitor C309, the first end of the capacitor C310, the first end of the capacitor C311, the first end of the capacitor C316, and the first end of the capacitor C319. The first end of the chip common mode choke L12 is connected to the first end of the chip common mode choke L12, and the second end of the chip common mode choke L12 is connected to the power supply AV+5V; the ground terminal AGND of the analog-to-digital converter U6, the second end of the capacitor C295, the second end of the capacitor C296, the second end of the capacitor C297, the second end of the capacitor C298, the second end of the capacitor C306, the second end of the capacitor C309, the second end of the capacitor C310, the second end of the capacitor C311, the second end of the capacitor C316, and the second end of the capacitor C319 are connected to the analog ground;

[0007] The reference voltage input / output terminal REFIN / REFOUT of the analog-to-digital converter U6, the first terminal of the capacitor C313, and the first terminal of the capacitor C317 are connected to the power supply VREF2V5 (provided by the voltage stabilizing reference chip D14), and the second terminal of the capacitor C313 and the second terminal of the capacitor C317 are connected to the analog ground;

[0008] The external capacitor terminal REFCAPA of the analog-to-digital converter U6 is connected to the first end of capacitor C299 and the first end of capacitor C305, and the second end of capacitor C299 and the second end of capacitor C305 are connected to the analog ground; the external capacitor terminal REFCAPB of the analog-to-digital converter U6 is connected to the first end of capacitor C303 and the first end of capacitor C307, and the second end of capacitor C303 and the second end of capacitor C307 are connected to the analog ground, and the external capacitor terminal REFCAPC of the analog-to-digital converter U6 is connected to the first end of capacitor C308 and the first end of capacitor C304, and the second end of capacitor C308 and the second end of capacitor C304 are connected to the analog ground. The reference voltage is stabilized by connecting the external capacitor terminals REFCAPA, REFCAPB, and REFCAPC of the analog-to-digital converter U6 to external capacitors.

[0009] The digital signal transmission terminals DB15, DB14, DB13, DB14, DB13, DB12, DB11, DB10, ... DB1 of the analog-to-digital converter U6 are connected to the coprocessor I1; the driving voltage terminal VDRIVE of the analog-to-digital converter U6 is connected to the first end of the resistor R216, the first end of the capacitor C292, the first end of the capacitor C294, and the first end of the chip common-mode choke L31, and the second end of the chip common-mode choke L31 is connected to the power supply VCC3V3; the second end of the capacitor C292 and the second end of the capacitor C294 are connected to the power ground; the second end of the resistor R216 is connected to the standby mode control terminal STBY of the analog-to-digital converter U6;

[0010] The positive power supply terminal VDD of the analog-to-digital converter U6 is connected to the negative electrode of the transient diode VD9, the positive electrode of the transient diode VD9 is connected to the first end of the capacitor C312, the first end of the capacitor C315, and the first end of the chip common-mode choke L32, the second end of the chip common-mode choke L32 is connected to the power supply AV+9V, and the second end of the capacitor C312 and the second end of the capacitor C315 are connected to the analog ground;

[0011] The negative power supply terminal VSS of the analog-to-digital converter U6 is connected to the positive electrode of the transient diode VD8, the negative electrode of the transient diode VD8 is connected to the first end of the capacitor C201, the first end of the capacitor C202, and the first end of the chip common-mode choke L7, the second end of the chip common-mode choke L7 is connected to the power supply AV-9V, and the second end of the capacitor C201 and the second end of the capacitor C202 are connected to the analog ground;

[0012] The digital power positive terminal DVCC of the analog-to-digital converter U6 is connected to the first end of the capacitor C314, the first end of the capacitor C318, and the first end of the chip common mode choke L33. The second end of the chip common mode choke L33 is connected to the power supply VCC5V, and the second end of the capacitor C314 and the second end of the capacitor C318 are connected to the power ground. The chip common mode choke L31, L32, L33, L35, L25, etc. are connected in series to the power supply to suppress high-frequency interference current and convert high-frequency interference into heat energy for dissipation.

[0013] The conversion start control terminals CONVSTA, CONVST B, and CONVST C of the analog-to-digital converter U6 are connected to the coprocessor I1 to start the conversion process of the ADC.

[0014] The analog signal input terminal V5 of the analog-to-digital converter U6 is connected to the first end of the capacitor C197 and the first end of the resistor R127, and the second end of the capacitor C197 is connected to the analog ground; the second end of the resistor R127, the first end of the resistor R209, and the first end of the capacitor C290 are connected to the signal output terminal OUT of the single-channel operational amplifier D11, the inverting input terminal IN- of the single-channel operational amplifier D11 is connected to the second end of the resistor R209 and the second end of the capacitor C290, the non-inverting input terminal IN+ of the single-channel operational amplifier D11 is connected to the positive electrode of the diode VD7, the negative electrode of the diode VD6, and the first end of the resistor R206, the negative electrode of the diode VD7 is connected to the power supply AV+9V, the positive electrode of the diode VD6 is connected to the power supply AV-9V, and the second end of the resistor R206 is connected to the first analog signal port;

[0015] The negative power supply terminal V- of the single-channel operational amplifier D11 is connected to the first end of the capacitor C284, the first end of the capacitor C281, and the first end of the chip common-mode choke L28, the second end of the capacitor C284 and the second end of the capacitor C281 are connected to the analog ground, the second end of the chip common-mode choke L28 is connected to the power supply AV-9V, the positive power supply terminal V+ of the single-channel operational amplifier D11 is connected to the first end of the capacitor C191, the first end of the capacitor C199, and the first end of the chip common-mode choke L11, the second end of the capacitor C191 and the second end of the capacitor C199 are connected to the analog ground, and the second end of the chip common-mode choke L11 is connected to the power supply AV+9V;

[0016] The analog signal input terminal V4 of the analog-to-digital converter U6 is connected to the first end of the resistor R214, and the second end of the resistor R214 is connected to the analog ground;

[0017] The inverting input terminal IN- of the single-channel operational amplifier D12 is connected to the first end of the resistor R210 and the first end of the capacitor C291, the second end of the resistor R210 and the second end of the capacitor C291 are connected to the signal output terminal OUT of the single-channel operational amplifier D12 and the first end of the resistor R128, the second end of the resistor R128 is connected to the first end of the capacitor C198 and the analog signal input terminal V3 of the analog-to-digital converter U6, and the second end of the capacitor C198 is connected to the analog ground;

[0018] The non-inverting input terminal IN+ of the single-channel operational amplifier D12 is connected to the anode of the diode VD1, the cathode of the diode VD2, and the first end of the resistor R207, the cathode of the diode VD1 is connected to the power supply AV+9V, the anode of the diode VD2 is connected to the power supply AV-9V, and the second end of the resistor R207 is connected to the second analog signal port;

[0019] The negative power supply terminal V- of the single-channel operational amplifier D12 is connected to the first end of the capacitor C285, the first end of the capacitor C282, and the first end of the chip common-mode choke L29, the second end of the capacitor C285 and the second end of the capacitor C282 are connected to the analog ground, the second end of the chip common-mode choke L29 is connected to the power supply AV-9V, the positive power supply terminal V+ of the single-channel operational amplifier D12 is connected to the first end of the capacitor C193, the first end of the capacitor C195, and the first end of the chip common-mode choke L10, the second end of the capacitor C193 and the second end of the capacitor C195 are connected to the analog ground, and the second end of the chip common-mode choke L10 is connected to the power supply AV+9V;

[0020] The analog signal input terminal V2 of the analog-to-digital converter U6 is connected to the first end of the resistor R215, and the second end of the resistor R215 is connected to the analog ground;

[0021] The inverting input terminal IN- of the single-channel operational amplifier D13 is connected to the first end of the resistor R211 and the first end of the capacitor C293, the second end of the resistor R211 and the second end of the capacitor C293 are connected to the signal output terminal OUT of the single-channel operational amplifier D13 and the first end of the resistor R129, the second end of the resistor R129 is connected to the first end of the capacitor C200 and the analog signal input terminal V1 of the analog-to-digital converter U6, and the second end of the capacitor C200 is connected to the analog ground;

[0022] The non-inverting input terminal IN+ of the single-channel operational amplifier D13 is connected to the anode of the diode VD4, the cathode of the diode VD5, and the first end of the resistor R208, the cathode of the diode VD4 is connected to the power supply AV+9V, the anode of the diode VD5 is connected to the power supply AV-9V, and the second end of the resistor R208 is connected to the third analog signal port;

[0023] The negative power supply terminal V- of the single-channel operational amplifier D13 is connected to the first end of the capacitor C286, the first end of the capacitor C283, and the first end of the chip common-mode choke L30, the second end of the capacitor C286 and the second end of the capacitor C283 are connected to the analog ground, the second end of the chip common-mode choke L30 is connected to the power supply AV-9V, the positive power supply terminal V+ of the single-channel operational amplifier D13 is connected to the first end of the capacitor C194, the first end of the capacitor C196, and the first end of the chip common-mode choke L8, the second end of the capacitor C194 and the second end of the capacitor C196 are connected to the analog ground, and the second end of the chip common-mode choke L8 is connected to the power supply AV+9V;

[0024] Using multiple single-channel operational amplifiers in conjunction with the CL1656 ADC chip helps improve signal quality, reduce errors and distortion, and thus maintain measurement accuracy and reliability in weak signal or noisy environments. Using multiple single-channel operational amplifiers can independently control and optimize each signal channel as needed, facilitating modular design and maintenance. Each channel can use a dedicated operational amplifier for signal amplification, filtering, and other conditioning to adapt to different signal characteristics and requirements; independent channel operational amplifiers can also reduce interference between channels and improve signal isolation.

[0025] Further, the step of stepping down the power supply VCC12V to AV+5V through a synchronous buck converter U9 includes:

[0026] The voltage input terminal VIN of the synchronous buck converter U9, the cathode of the transient voltage suppression diode D10, the first end of the capacitor C323, the first end of the capacitor C324, the first end of the capacitor C325, and the first end of the resistor R220 are connected to the power supply VCC12V, the enable terminal EN of the synchronous buck converter U9 is connected to the second end of the resistor R220 and the first end of the resistor R221, the internal power supply terminal VCC of the synchronous buck converter U9 is connected to the first end of the capacitor C326, the operation mode selection terminal MODE of the synchronous buck converter U9 is connected to the first end of the resistor R223, and the current limit and inductor current reporting terminal CS of the synchronous buck converter U9 is connected to the first end of the resistor R222.

[0027] The second end of the resistor R223, the second end of R222, the second end of the capacitor C323, the second end of the capacitor C324, the second end of the capacitor C325, and the anode of the transient voltage suppression diode D10 are connected to the power ground;

[0028] The bootstrap connection terminal BST of the synchronous buck converter U9 is connected to the first end of the resistor R224, the second end of the resistor R224 is connected to the first end of the capacitor C327, the second end of the capacitor C327 is connected to the switch terminal SW1, the switch terminal SW2 and the first end of the inductor L36 of the synchronous buck converter U9, the second end of the inductor L36 is connected to the first end of the capacitor C329, the first end of the resistor R227, the first end of the capacitor C330, the first end of the capacitor C331, the first end of the capacitor C332, the first end of the chip common mode choke L37, and outputs the power supply VCC5V; the second end of the chip common mode choke L37 outputs the power supply AV+5V; and is connected to the first end of the capacitor C333, the first end of the capacitor C334, and the first end of the capacitor C335; the second end of the capacitor C333, the second end of the capacitor C334, and the second end of the capacitor C335 are connected to the analog ground;

[0029] The second end of the capacitor C329 is connected to the first end of the resistor R225, and the feedback end FB of the synchronous buck converter U9 is connected to the second end of the resistor R225, the second end of the resistor R227, and the first end of the resistor R228.

[0030] The external tracking voltage input terminal REF of the synchronous buck converter U9 is connected to the first terminal of the capacitor C328.

[0031] The ground terminals AGND, PGND1, PGND2 of the synchronous buck converter U9, the second end of the capacitor C328, the second end of the resistor R228, the second end of the capacitor C330, the second end of the capacitor C331, and the second end of the capacitor C332 are connected to the power ground;

[0032] The open-drain power output terminal PGOOD of the synchronous buck converter U9 is connected to a first end of a resistor R226, and a second end of the resistor R226 is connected to a power source VCC5V_PWR.

[0033] Further, the voltage reduction to VREF2V5 through the voltage stabilizing reference chip D14 includes:

[0034] The sleep mode control terminal VS of the voltage stabilizing reference chip D14 is connected to the first end of the capacitor C188, the first end of the capacitor C189, and the first end of the chip common mode choke L19, the second end of the chip common mode choke L19 is connected to the power supply AV+5V, the second end of the capacitor C188 and the second end of the capacitor C189 are connected to the analog ground, and the ground terminal GND of the voltage stabilizing reference chip D14 is connected to the analog ground;

[0035] The output terminal OUTPUT of the voltage stabilizing reference chip D14 is connected to the first end of the capacitor C190, the first end of the capacitor C192 is connected to the first end of the resistor R212, and the second end of the resistor R212 outputs the reference voltage VREF2V5;

[0036] A second end of capacitor C190 and a second end of capacitor C192 are connected to the analog ground.

[0037] Furthermore, the model of the synchronous buck converter U9 is IS6605A.

[0038] Furthermore, the model of the voltage stabilizing reference chip D14 is REF193GS.

[0039] Furthermore, the power supply module of the analog-to-digital converter U6 includes a first power supply module, a second power supply module and a third power supply module:

[0040] The power supply AV+5V is provided by a first power supply module, and the first power supply module includes:

[0041] First power supply module: the voltage input terminal VIN of the synchronous buck converter U9, the cathode of the transient voltage suppression diode D10, the first end of the capacitor C323, the first end of the capacitor C324, the first end of the capacitor C325, and the first end of the resistor R220 are connected to the power supply VCC12V, the enable terminal EN of the synchronous buck converter U9 is connected to the second end of the resistor R220 and the first end of the resistor R221, the internal power supply terminal VCC of the synchronous buck converter U9 is connected to the first end of the capacitor C326, the operation mode selection terminal MODE of the synchronous buck converter U9 is connected to the first end of the resistor R223, and the current limit and inductor current reporting terminal CS of the synchronous buck converter U9 is connected to the first end of the resistor R222.

[0042] The second end of the resistor R223, the second end of R222, the second end of the capacitor C323, the second end of the capacitor C324, the second end of the capacitor C325, and the anode of the transient voltage suppression diode D10 are connected to the power ground;

[0043] The bootstrap connection terminal BST of the synchronous buck converter U9 is connected to the first end of the resistor R224, the second end of the resistor R224 is connected to the first end of the capacitor C327, the second end of the capacitor C327 is connected to the switch terminal SW1, the switch terminal SW2 and the first end of the inductor L36 of the synchronous buck converter U9, the second end of the inductor L36 is connected to the first end of the capacitor C329, the first end of the resistor R227, the first end of the capacitor C330, the first end of the capacitor C331, the first end of the capacitor C332, the first end of the chip common mode choke L37, and outputs the power supply VCC5V; the second end of the chip common mode choke L37 outputs the power supply AV+5V; and is connected to the first end of the capacitor C333, the first end of the capacitor C334, and the first end of the capacitor C335; the second end of the capacitor C333, the second end of the capacitor C334, and the second end of the capacitor C335 are connected to the analog ground;

[0044] The second end of the capacitor C329 is connected to the first end of the resistor R225, and the feedback end FB of the synchronous buck converter U9 is connected to the second end of the resistor R225, the second end of the resistor R227, and the first end of the resistor R228.

[0045] The external tracking voltage input terminal REF of the synchronous buck converter U9 is connected to the first terminal of the capacitor C328.

[0046] The ground terminals AGND, PGND1, PGND2 of the synchronous buck converter U9, the second end of the capacitor C328, the second end of the resistor R228, the second end of the capacitor C330, the second end of the capacitor C331, and the second end of the capacitor C332 are connected to the power ground;

[0047] The open-drain power output terminal PGOOD of the synchronous buck converter U9 is connected to the first end of the resistor R226, and the second end of the resistor R226 outputs the power supply VCC5V_PWR.

[0048] The power supply AV-9V is provided by a second power supply module, and the second power supply module includes:

[0049] The power input terminal IN of the synchronous buck converter U7 is connected to the first end of the resistor R146, the first end of the capacitor C259, the first end of the capacitor C260, and the first end of the chip common mode choke L14, and the second end of the capacitor C259 and the second end of the capacitor C260 are connected to the analog ground; the switching frequency setting terminal RP of the synchronous buck converter U7 is connected to the first end of the resistor R147 and the first end of the capacitor C321, and the second end of the resistor R147 and the second end of the capacitor C321 are connected to the analog ground;

[0050] The enable terminal EN of the synchronous buck converter U7 is connected to the second end of the resistor R146 and the first end of the resistor R219, and the second end of the resistor R219 is connected to the analog ground; the power output terminal OUT of the synchronous buck converter U7 is connected to the power input terminal of the linear regulator U10, the first end of the capacitor C264, the first end of the capacitor C265, and the first end of the capacitor C266, and the second end of the capacitor C264, the second end of the capacitor C265, and the second end of the capacitor C266 are connected to the analog ground;

[0051] The output voltage control positive terminal CFLY+ of the synchronous buck converter U7 is connected to the first end of the capacitor C263, and the output voltage control negative terminal CFLY+ of the synchronous buck converter U7 is connected to the second end of the capacitor C263;

[0052] The power output terminal OUT of the linear regulator U10 outputs the power supply AV-9V and is connected to the first end of the capacitor C268 and the first end of the capacitor C269. The second end of the capacitor C268 and the second end of the capacitor C269 are connected to the analog ground.

[0053] The power supply AV+9V is provided by a third power supply module, and the third power supply module includes: a power supply input terminal VIN of a three-terminal adjustable linear regulator D21 is connected to a first end of a capacitor C320, a first end of a capacitor C261, and a first end of a chip common-mode choke L13, a second end of the chip common-mode choke L13 is connected to a power supply VCC12V, a power supply output terminal VOUT of the three-terminal adjustable linear regulator D21 is connected to a first end of a resistor R145, a first end of a capacitor C322, and a first end of a capacitor C267, and outputs a power supply AV+9V; a second end of the capacitor C322 and a second end of the capacitor C267 are connected to an analog ground;

[0054] The adjustable end ADJ of the three-terminal adjustable linear regulator D21 is connected to the first end of the capacitor C262, the first end of the resistor R144, and the second end of the resistor R145. The second end of the capacitor C262 and the second end of the resistor R144 are connected to the analog ground; the second end of the capacitor C320 and the second end of the capacitor C261 are connected to the analog ground.

[0055] In summary, due to the adoption of the above technical solution, the utility model uses multiple single-channel operational amplifiers in conjunction with the ADC chip of CL1656, which helps to improve signal quality, reduce errors and distortion, and thus maintain measurement accuracy and reliability in weak signal or noise environments. In addition, a chip common-mode choke is connected in series on the power line of the single-channel operational amplifier to suppress high-frequency interference current; in addition, a step-by-step step-down power supply module is also designed.

[0056] Additional aspects and advantages of the present invention will be given in part in the following description, and in part will become apparent from the following description, or will be learned through the practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0057] The above and / or additional aspects and advantages of the present invention will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0058] Figure 1 It is a connection schematic block diagram of the utility model.

[0059] Figure 2 It is a circuit connection schematic diagram of the utility model.

[0060] Figure 3 It is a connection diagram of the buck converter U9 in the power module of the utility model.

[0061] Figure 4 It is a connection diagram of the voltage stabilizing reference chip D14 in the power module of the utility model.

[0062] Figure 5 It is a connection schematic diagram of the special analog-to-digital conversion power supply circuit of the utility model. DETAILED DESCRIPTION

[0063] The embodiments of the present invention are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.

[0064] The utility model proposes an analog-to-digital conversion circuit, such as Figure 1As shown, it includes a data analog-to-digital converter, three single-channel operational amplifiers, and a power module. The power output end of the power module is connected to the power input end of the data analog-to-digital converter to supply power to the data analog-to-digital converter.

[0065] The corresponding circuit is designed for the c11656 analog-to-digital converter, such as Figure 2 As shown:

[0066] The analog signal input terminal V6 of the analog-to-digital converter U6 is connected to the first end of the resistor R213, and the second end of the resistor R213 is connected to the analog ground; the analog power positive terminal AVCC of the analog-to-digital converter U6 is connected to the first end of the capacitor C295, the first end of the capacitor C296, the first end of the capacitor C297, the first end of the capacitor C298, the first end of the capacitor C306, the first end of the capacitor C309, the first end of the capacitor C310, the first end of the capacitor C311, the first end of the capacitor C316, and the first end of the capacitor C319. The first end of the chip common mode choke L12 is connected to the first end of the chip common mode choke L12, and the second end of the chip common mode choke L12 is connected to the power supply AV+5V; the ground terminal AGND of the analog-to-digital converter U6, the second end of the capacitor C295, the second end of the capacitor C296, the second end of the capacitor C297, the second end of the capacitor C298, the second end of the capacitor C306, the second end of the capacitor C309, the second end of the capacitor C310, the second end of the capacitor C311, the second end of the capacitor C316, and the second end of the capacitor C319 are connected to the analog ground;

[0067] The reference voltage input / output terminal REFIN / REFOUT of the analog-to-digital converter U6, the first terminal of the capacitor C313, and the first terminal of the capacitor C317 are connected to the power supply VREF2V5 (provided by the voltage stabilizing reference chip D14), and the second terminal of the capacitor C313 and the second terminal of the capacitor C317 are connected to the analog ground;

[0068] The external capacitor terminal REFCAPA of the analog-to-digital converter U6 is connected to the first end of capacitor C299 and the first end of capacitor C305, and the second end of capacitor C299 and the second end of capacitor C305 are connected to the analog ground; the external capacitor terminal REFCAPB of the analog-to-digital converter U6 is connected to the first end of capacitor C303 and the first end of capacitor C307, and the second end of capacitor C303 and the second end of capacitor C307 are connected to the analog ground, and the external capacitor terminal REFCAPC of the analog-to-digital converter U6 is connected to the first end of capacitor C308 and the first end of capacitor C304, and the second end of capacitor C308 and the second end of capacitor C304 are connected to the analog ground. The reference voltage is stabilized by connecting the external capacitor terminals REFCAPA, REFCAPB, and REFCAPC of the analog-to-digital converter U6 to external capacitors.

[0069] The digital signal transmission terminals DB15, DB14, DB13, DB14, DB13, DB12, DB11, DB10, ... DB1 of the analog-to-digital converter U6 are connected to the coprocessor I1; the driving voltage terminal VDRIVE of the analog-to-digital converter U6 is connected to the first end of the resistor R216, the first end of the capacitor C292, the first end of the capacitor C294, and the first end of the chip common-mode choke L31, and the second end of the chip common-mode choke L31 is connected to the power supply VCC3V3; the second end of the capacitor C292 and the second end of the capacitor C294 are connected to the power ground; the second end of the resistor R216 is connected to the standby mode control terminal STBY of the analog-to-digital converter U6;

[0070] The positive power supply terminal VDD of the analog-to-digital converter U6 is connected to the negative electrode of the transient diode VD9, the positive electrode of the transient diode VD9 is connected to the first end of the capacitor C312, the first end of the capacitor C315, and the first end of the chip common-mode choke L32, the second end of the chip common-mode choke L32 is connected to the power supply AV+9V, and the second end of the capacitor C312 and the second end of the capacitor C315 are connected to the analog ground;

[0071] The negative power supply terminal VSS of the analog-to-digital converter U6 is connected to the positive electrode of the transient diode VD8, the negative electrode of the transient diode VD8 is connected to the first end of the capacitor C201, the first end of the capacitor C202, and the first end of the chip common-mode choke L7, the second end of the chip common-mode choke L7 is connected to the power supply AV-9V, and the second end of the capacitor C201 and the second end of the capacitor C202 are connected to the analog ground;

[0072] The digital power positive terminal DVCC of the analog-to-digital converter U6 is connected to the first end of the capacitor C314, the first end of the capacitor C318, and the first end of the chip common mode choke L33. The second end of the chip common mode choke L33 is connected to the power supply VCC5V, and the second end of the capacitor C314 and the second end of the capacitor C318 are connected to the power ground. The chip common mode choke L31, L32, L33, L35, L25, etc. are connected in series to the power supply to suppress high-frequency interference current and convert high-frequency interference into heat energy for dissipation.

[0073] The conversion start control terminals CONVST A, CONVST B, and CONVST C of the analog-to-digital converter U6 are connected to the coprocessor I1 for starting the conversion process of the ADC.

[0074] The analog signal input terminal V5 of the analog-to-digital converter U6 is connected to the first end of the capacitor C197 and the first end of the resistor R127, and the second end of the capacitor C197 is connected to the analog ground; the second end of the resistor R127, the first end of the resistor R209, and the first end of the capacitor C290 are connected to the signal output terminal OUT of the single-channel operational amplifier D11, the inverting input terminal IN- of the single-channel operational amplifier D11 is connected to the second end of the resistor R209 and the second end of the capacitor C290, the non-inverting input terminal IN+ of the single-channel operational amplifier D11 is connected to the positive electrode of the diode VD7, the negative electrode of the diode VD6, and the first end of the resistor R206, the negative electrode of the diode VD7 is connected to the power supply AV+9V, the positive electrode of the diode VD6 is connected to the power supply AV-9V, and the second end of the resistor R206 is connected to the first analog signal port;

[0075] The negative power supply terminal V- of the single-channel operational amplifier D11 is connected to the first end of the capacitor C284, the first end of the capacitor C281, and the first end of the chip common-mode choke L28, the second end of the capacitor C284 and the second end of the capacitor C281 are connected to the analog ground, the second end of the chip common-mode choke L28 is connected to the power supply AV-9V, the positive power supply terminal V+ of the single-channel operational amplifier D11 is connected to the first end of the capacitor C191, the first end of the capacitor C199, and the first end of the chip common-mode choke L11, the second end of the capacitor C191 and the second end of the capacitor C199 are connected to the analog ground, and the second end of the chip common-mode choke L11 is connected to the power supply AV+9V;

[0076] The analog signal input terminal V4 of the analog-to-digital converter U6 is connected to the first end of the resistor R214, and the second end of the resistor R214 is connected to the analog ground;

[0077] The inverting input terminal IN- of the single-channel operational amplifier D12 is connected to the first end of the resistor R210 and the first end of the capacitor C291, the second end of the resistor R210 and the second end of the capacitor C291 are connected to the signal output terminal OUT of the single-channel operational amplifier D12 and the first end of the resistor R128, the second end of the resistor R128 is connected to the first end of the capacitor C198 and the analog signal input terminal V3 of the analog-to-digital converter U6, and the second end of the capacitor C198 is connected to the analog ground;

[0078] The non-inverting input terminal IN+ of the single-channel operational amplifier D12 is connected to the anode of the diode VD1, the cathode of the diode VD2, and the first end of the resistor R207, the cathode of the diode VD1 is connected to the power supply AV+9V, the anode of the diode VD2 is connected to the power supply AV-9V, and the second end of the resistor R207 is connected to the second analog signal port;

[0079] The negative power supply terminal V- of the single-channel operational amplifier D12 is connected to the first end of the capacitor C285, the first end of the capacitor C282, and the first end of the chip common-mode choke L29, the second end of the capacitor C285 and the second end of the capacitor C282 are connected to the analog ground, the second end of the chip common-mode choke L29 is connected to the power supply AV-9V, the positive power supply terminal V+ of the single-channel operational amplifier D12 is connected to the first end of the capacitor C193, the first end of the capacitor C195, and the first end of the chip common-mode choke L10, the second end of the capacitor C193 and the second end of the capacitor C195 are connected to the analog ground, and the second end of the chip common-mode choke L10 is connected to the power supply AV+9V;

[0080] The analog signal input terminal V2 of the analog-to-digital converter U6 is connected to the first end of the resistor R215, and the second end of the resistor R215 is connected to the analog ground;

[0081] The inverting input terminal IN- of the single-channel operational amplifier D13 is connected to the first end of the resistor R211 and the first end of the capacitor C293, the second end of the resistor R211 and the second end of the capacitor C293 are connected to the signal output terminal OUT of the single-channel operational amplifier D13 and the first end of the resistor R129, the second end of the resistor R129 is connected to the first end of the capacitor C200 and the analog signal input terminal V1 of the analog-to-digital converter U6, and the second end of the capacitor C200 is connected to the analog ground;

[0082] The non-inverting input terminal IN+ of the single-channel operational amplifier D13 is connected to the anode of the diode VD4, the cathode of the diode VD5, and the first end of the resistor R208, the cathode of the diode VD4 is connected to the power supply AV+9V, the anode of the diode VD5 is connected to the power supply AV-9V, and the second end of the resistor R208 is connected to the third analog signal port;

[0083] The negative power supply terminal V- of the single-channel operational amplifier D13 is connected to the first end of the capacitor C286, the first end of the capacitor C283, and the first end of the chip common-mode choke L30, the second end of the capacitor C286 and the second end of the capacitor C283 are connected to the analog ground, the second end of the chip common-mode choke L30 is connected to the power supply AV-9V, the positive power supply terminal V+ of the single-channel operational amplifier D13 is connected to the first end of the capacitor C194, the first end of the capacitor C196, and the first end of the chip common-mode choke L8, the second end of the capacitor C194 and the second end of the capacitor C196 are connected to the analog ground, and the second end of the chip common-mode choke L8 is connected to the power supply AV+9V;

[0084] Using multiple single-channel operational amplifiers in conjunction with the CL1656 ADC chip helps improve signal quality, reduce errors and distortion, and thus maintain measurement accuracy and reliability in weak signal or noisy environments. Using multiple single-channel operational amplifiers can independently control and optimize each signal channel as needed, facilitating modular design and maintenance. Each channel can use a dedicated operational amplifier for signal amplification, filtering, and other conditioning to adapt to different signal characteristics and requirements; independent channel operational amplifiers can also reduce interference between channels and improve signal isolation.

[0085] The schematic diagram of the power module is as follows Figure 3 , Figure 4 As shown:

[0086] The voltage input terminal VIN of the synchronous buck converter U9, the cathode of the transient voltage suppression diode D10, the first end of the capacitor C323, the first end of the capacitor C324, the first end of the capacitor C325, and the first end of the resistor R220 are connected to the power supply VCC12V, the enable terminal EN of the synchronous buck converter U9 is connected to the second end of the resistor R220 and the first end of the resistor R221, the internal power supply terminal VCC of the synchronous buck converter U9 is connected to the first end of the capacitor C326, the operation mode selection terminal MODE of the synchronous buck converter U9 is connected to the first end of the resistor R223, and the current limit and inductor current reporting terminal CS of the synchronous buck converter U9 is connected to the first end of the resistor R222.

[0087] The second end of the resistor R223, the second end of R222, the second end of the capacitor C323, the second end of the capacitor C324, the second end of the capacitor C325, and the anode of the transient voltage suppression diode D10 are connected to the power ground;

[0088] The bootstrap connection terminal BST of the synchronous buck converter U9 is connected to the first end of the resistor R224, the second end of the resistor R224 is connected to the first end of the capacitor C327, the second end of the capacitor C327 is connected to the switch terminal SW1, the switch terminal SW2 and the first end of the inductor L36 of the synchronous buck converter U9, the second end of the inductor L36 is connected to the first end of the capacitor C329, the first end of the resistor R227, the first end of the capacitor C330, the first end of the capacitor C331, the first end of the capacitor C332, the first end of the chip common mode choke L37, and outputs the power supply VCC5V; the second end of the chip common mode choke L37 outputs the power supply AV+5V; and is connected to the first end of the capacitor C333, the first end of the capacitor C334, and the first end of the capacitor C335; the second end of the capacitor C333, the second end of the capacitor C334, and the second end of the capacitor C335 are connected to the analog ground;

[0089] The second end of the capacitor C329 is connected to the first end of the resistor R225, and the feedback end FB of the synchronous buck converter U9 is connected to the second end of the resistor R225, the second end of the resistor R227, and the first end of the resistor R228.

[0090] The external tracking voltage input terminal REF of the synchronous buck converter U9 is connected to the first terminal of the capacitor C328.

[0091] The ground terminals AGND, PGND1, PGND2 of the synchronous buck converter U9, the second end of the capacitor C328, the second end of the resistor R228, the second end of the capacitor C330, the second end of the capacitor C331, and the second end of the capacitor C332 are connected to the power ground;

[0092] The open-drain power output terminal PGOOD of the synchronous buck converter U9 is connected to the first end of the resistor R226, and the second end of the resistor R226 outputs the power supply VCC5V_PWR.

[0093] The model of the synchronous buck converter U9 is IS6605A.

[0094] The sleep mode control terminal VS of the voltage stabilizing reference chip D14 is connected to the first end of the capacitor C188, the first end of the capacitor C189, and the first end of the chip common mode choke L19, the second end of the chip common mode choke L19 is connected to the power supply AV+5V, the second end of the capacitor C188 and the second end of the capacitor C189 are connected to the analog ground, and the ground terminal GND of the voltage stabilizing reference chip D14 is connected to the analog ground;

[0095] The output terminal OUTPUT of the voltage stabilizing reference chip D14 is connected to the first end of the capacitor C190, the first end of the capacitor C192 is connected to the first end of the resistor R212, and the second end of the resistor R212 outputs the reference voltage VREF2V5;

[0096] A second end of capacitor C190 and a second end of capacitor C192 are connected to the analog ground.

[0097] The power supply first passes through a synchronous buck converter and then through a voltage stabilizing reference chip to obtain a reference voltage VREF2V5; the reference voltage VREF2V5 provides a standard for quantifying the signal amplitude for the ADC. In this way, the ADC chip can obtain a high-quality reference voltage, thereby improving the measurement accuracy and reliability of the entire system.

[0098] The power supply circuit connection diagram of the analog-to-digital converter U6 is as follows: Figure 5 As shown, it includes a first power module, a second power module and a third power module.

[0099] First power supply module: the voltage input terminal VIN of the synchronous buck converter U9, the cathode of the transient voltage suppression diode D10, the first end of the capacitor C323, the first end of the capacitor C324, the first end of the capacitor C325, and the first end of the resistor R220 are connected to the power supply VCC12V, the enable terminal EN of the synchronous buck converter U9 is connected to the second end of the resistor R220 and the first end of the resistor R221, the internal power supply terminal VCC of the synchronous buck converter U9 is connected to the first end of the capacitor C326, the operation mode selection terminal MODE of the synchronous buck converter U9 is connected to the first end of the resistor R223, and the current limit and inductor current reporting terminal CS of the synchronous buck converter U9 is connected to the first end of the resistor R222.

[0100] The second end of the resistor R223, the second end of R222, the second end of the capacitor C323, the second end of the capacitor C324, the second end of the capacitor C325, and the anode of the transient voltage suppression diode D10 are connected to the power ground;

[0101] The bootstrap connection terminal BST of the synchronous buck converter U9 is connected to the first end of the resistor R224, the second end of the resistor R224 is connected to the first end of the capacitor C327, the second end of the capacitor C327 is connected to the switch terminal SW1, the switch terminal SW2 and the first end of the inductor L36 of the synchronous buck converter U9, the second end of the inductor L36 is connected to the first end of the capacitor C329, the first end of the resistor R227, the first end of the capacitor C330, the first end of the capacitor C331, the first end of the capacitor C332, the first end of the chip common mode choke L37, and outputs the power supply VCC5V; the second end of the chip common mode choke L37 outputs the power supply AV+5V; and is connected to the first end of the capacitor C333, the first end of the capacitor C334, and the first end of the capacitor C335; the second end of the capacitor C333, the second end of the capacitor C334, and the second end of the capacitor C335 are connected to the analog ground;

[0102] The second end of the capacitor C329 is connected to the first end of the resistor R225, and the feedback end FB of the synchronous buck converter U9 is connected to the second end of the resistor R225, the second end of the resistor R227, and the first end of the resistor R228.

[0103] The external tracking voltage input terminal REF of the synchronous buck converter U9 is connected to the first terminal of the capacitor C328.

[0104] The ground terminals AGND, PGND1, PGND2 of the synchronous buck converter U9, the second end of the capacitor C328, the second end of the resistor R228, the second end of the capacitor C330, the second end of the capacitor C331, and the second end of the capacitor C332 are connected to the power ground;

[0105] The open-drain power output terminal PGOOD of the synchronous buck converter U9 is connected to the first end of the resistor R226, and the second end of the resistor R226 outputs the power supply VCC5V_PWR.

[0106] The model of the synchronous buck converter U9 is IS6605A.

[0107] Second power supply module: the power input terminal IN of the synchronous buck converter U7 is connected to the first end of the resistor R146, the first end of the capacitor C259, the first end of the capacitor C260, and the first end of the chip common mode choke L14, and the second end of the capacitor C259 and the second end of the capacitor C260 are connected to the analog ground; the switching frequency setting terminal RP of the synchronous buck converter U7 is connected to the first end of the resistor R147 and the first end of the capacitor C321, and the second end of the resistor R147 and the second end of the capacitor C321 are connected to the analog ground;

[0108] The enable terminal EN of the synchronous buck converter U7 is connected to the second end of the resistor R146 and the first end of the resistor R219, and the second end of the resistor R219 is connected to the analog ground; the power output terminal OUT of the synchronous buck converter U7 is connected to the power input terminal of the linear regulator U10, the first end of the capacitor C264, the first end of the capacitor C265, and the first end of the capacitor C266, and the second end of the capacitor C264, the second end of the capacitor C265, and the second end of the capacitor C266 are connected to the analog ground;

[0109] The output voltage control positive terminal CFLY+ of the synchronous buck converter U7 is connected to the first end of the capacitor C263, and the output voltage control negative terminal CFLY+ of the synchronous buck converter U7 is connected to the second end of the capacitor C263;

[0110] The power output terminal OUT of the linear regulator U10 outputs the power supply AV-9V and is connected to the first end of the capacitor C268 and the first end of the capacitor C269. The second end of the capacitor C268 and the second end of the capacitor C269 are connected to the analog ground.

[0111] The third power supply module: the power input terminal VIN of the three-terminal adjustable linear regulator D21 is connected to the first end of the capacitor C320, the first end of the capacitor C261, and the first end of the chip common mode choke L13, the second end of the chip common mode choke L13 is connected to the power supply VCC12V, the power output terminal VOUT of the three-terminal adjustable linear regulator D21 is connected to the first end of the resistor R145, the first end of the capacitor C322, and the first end of the capacitor C267, and the output power supply AV+9V; the second end of the capacitor C322 and the second end of the capacitor C267 are connected to the analog ground;

[0112] The adjustable end ADJ of the three-terminal adjustable linear regulator D21 is connected to the first end of the capacitor C262, the first end of the resistor R144, and the second end of the resistor R145. The second end of the capacitor C262 and the second end of the resistor R144 are connected to the analog ground; the second end of the capacitor C320 and the second end of the capacitor C261 are connected to the analog ground.

[0113] The model of the three-terminal adjustable linear regulator D21 is LM317LM.

[0114] Although the embodiments of the present invention have been shown and described, those skilled in the art will appreciate that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the claims and their equivalents.

Claims

1. An analog-to-digital conversion circuit, comprising a data analog-to-digital converter of model c11656, characterized in that: The data input end of the data analog-to-digital converter is respectively connected to three single-channel operational amplifiers and a power supply module; the power supply module provides the power supply VREF2V5, which is obtained by step-by-step voltage reduction: first, the power supply VCC12V is stepped down to AV+5V through a synchronous buck converter U9, and then stepped down to VREF2V5 through a voltage stabilizing reference chip D14; wherein the power supply VREF2V5 is a voltage of 2.5V, VCC12V is a voltage of 12V, and AV+5V is a voltage of 5V.

2. The analog-to-digital conversion circuit according to claim 1, characterized in that: The analog-to-digital conversion circuit comprises: The analog signal input terminal V6 of the analog-to-digital converter U6 is connected to the first end of the resistor R213, and the second end of the resistor R213 is connected to the analog ground; the analog power positive terminal AVCC of the analog-to-digital converter U6 is connected to the first end of the capacitor C295, the first end of the capacitor C296, the first end of the capacitor C297, the first end of the capacitor C298, the first end of the capacitor C306, the first end of the capacitor C309, the first end of the capacitor C310, the first end of the capacitor C311, the first end of the capacitor C316, and the first end of the capacitor C319. The first end of the chip common mode choke L12 is connected to the first end of the chip common mode choke L12, and the second end of the chip common mode choke L12 is connected to the power supply AV+5V; the ground terminal AGND of the analog-to-digital converter U6, the second end of the capacitor C295, the second end of the capacitor C296, the second end of the capacitor C297, the second end of the capacitor C298, the second end of the capacitor C306, the second end of the capacitor C309, the second end of the capacitor C310, the second end of the capacitor C311, the second end of the capacitor C316, and the second end of the capacitor C319 are connected to the analog ground; The reference voltage input / output terminal REFIN / REFOUT of the analog-to-digital converter U6, the first terminal of the capacitor C313, and the first terminal of the capacitor C317 are connected to the power supply VREF2V5 (provided by the voltage stabilizing reference chip D14), and the second terminal of the capacitor C313 and the second terminal of the capacitor C317 are connected to the analog ground; The external capacitor terminal REFCAPA of the analog-to-digital converter U6 is connected to the first end of the capacitor C299 and the first end of the capacitor C305, and the second end of the capacitor C299 and the second end of the capacitor C305 are connected to the analog ground; the external capacitor terminal REFCAPB of the analog-to-digital converter U6 is connected to the first end of the capacitor C303 and the first end of the capacitor C307, and the second end of the capacitor C303 and the second end of the capacitor C307 are connected to the analog ground, and the external capacitor terminal REFCAPC of the analog-to-digital converter U6 is connected to the first end of the capacitor C308 and the first end of the capacitor C304, and the second end of the capacitor C308 and the second end of the capacitor C304 are connected to the analog ground, by connecting the external capacitor terminals REFCAPA, REFCAPB, and REFCAPC of the analog-to-digital converter U6 to the external capacitor; The digital signal transmission terminals DB15, DB14, DB13, DB14, DB13, DB12, DB11, DB10, ... DB1 of the analog-to-digital converter U6 are connected to the coprocessor I1; the driving voltage terminal VDRIVE of the analog-to-digital converter U6 is connected to the first end of the resistor R216, the first end of the capacitor C292, the first end of the capacitor C294, and the first end of the chip common-mode choke L31, and the second end of the chip common-mode choke L31 is connected to the power supply VCC3V3; the second end of the capacitor C292 and the second end of the capacitor C294 are connected to the power ground; the second end of the resistor R216 is connected to the standby mode control terminal STBY of the analog-to-digital converter U6; The positive power supply terminal VDD of the analog-to-digital converter U6 is connected to the negative electrode of the transient diode VD9, the positive electrode of the transient diode VD9 is connected to the first end of the capacitor C312, the first end of the capacitor C315, and the first end of the chip common-mode choke L32, the second end of the chip common-mode choke L32 is connected to the power supply AV+9V, and the second end of the capacitor C312 and the second end of the capacitor C315 are connected to the analog ground; The negative power supply terminal VSS of the analog-to-digital converter U6 is connected to the positive electrode of the transient diode VD8, the negative electrode of the transient diode VD8 is connected to the first end of the capacitor C201, the first end of the capacitor C202, and the first end of the chip common-mode choke L7, the second end of the chip common-mode choke L7 is connected to the power supply AV-9V, and the second end of the capacitor C201 and the second end of the capacitor C202 are connected to the analog ground; The digital power positive terminal DVCC of the analog-to-digital converter U6 is connected to the first end of the capacitor C314, the first end of the capacitor C318, and the first end of the chip common-mode choke L33, the second end of the chip common-mode choke L33 is connected to the power supply VCC5V, the second end of the capacitor C314 and the second end of the capacitor C318 are connected to the power ground; the conversion start control terminals CONVST A, CONVSTB, and CONVST C of the analog-to-digital converter U6 are connected to the coprocessor I1; The analog signal input terminal V5 of the analog-to-digital converter U6 is connected to the first end of the capacitor C197 and the first end of the resistor R127, and the second end of the capacitor C197 is connected to the analog ground; the second end of the resistor R127, the first end of the resistor R209, and the first end of the capacitor C290 are connected to the signal output terminal OUT of the single-channel operational amplifier D11, the inverting input terminal IN- of the single-channel operational amplifier D11 is connected to the second end of the resistor R209 and the second end of the capacitor C290, the non-inverting input terminal IN+ of the single-channel operational amplifier D11 is connected to the positive electrode of the diode VD7, the negative electrode of the diode VD6, and the first end of the resistor R206, the negative electrode of the diode VD7 is connected to the power supply AV+9V, the positive electrode of the diode VD6 is connected to the power supply AV-9V, and the second end of the resistor R206 is connected to the first analog signal port; The negative power supply terminal V- of the single-channel operational amplifier D11 is connected to the first end of the capacitor C284, the first end of the capacitor C281, and the first end of the chip common-mode choke L28, the second end of the capacitor C284 and the second end of the capacitor C281 are connected to the analog ground, the second end of the chip common-mode choke L28 is connected to the power supply AV-9V, the positive power supply terminal V+ of the single-channel operational amplifier D11 is connected to the first end of the capacitor C191, the first end of the capacitor C199, and the first end of the chip common-mode choke L11, the second end of the capacitor C191 and the second end of the capacitor C199 are connected to the analog ground, and the second end of the chip common-mode choke L11 is connected to the power supply AV+9V; The analog signal input terminal V4 of the analog-to-digital converter U6 is connected to the first end of the resistor R214, and the second end of the resistor R214 is connected to the analog ground; The inverting input terminal IN- of the single-channel operational amplifier D12 is connected to the first end of the resistor R210 and the first end of the capacitor C291, the second end of the resistor R210 and the second end of the capacitor C291 are connected to the signal output terminal OUT of the single-channel operational amplifier D12 and the first end of the resistor R128, the second end of the resistor R128 is connected to the first end of the capacitor C198 and the analog signal input terminal V3 of the analog-to-digital converter U6, and the second end of the capacitor C198 is connected to the analog ground; The non-inverting input terminal IN+ of the single-channel operational amplifier D12 is connected to the anode of the diode VD1, the cathode of the diode VD2, and the first end of the resistor R207, the cathode of the diode VD1 is connected to the power supply AV+9V, the anode of the diode VD2 is connected to the power supply AV-9V, and the second end of the resistor R207 is connected to the second analog signal port; The negative power supply terminal V- of the single-channel operational amplifier D12 is connected to the first end of the capacitor C285, the first end of the capacitor C282, and the first end of the chip common-mode choke L29, the second end of the capacitor C285 and the second end of the capacitor C282 are connected to the analog ground, the second end of the chip common-mode choke L29 is connected to the power supply AV-9V, the positive power supply terminal V+ of the single-channel operational amplifier D12 is connected to the first end of the capacitor C193, the first end of the capacitor C195, and the first end of the chip common-mode choke L10, the second end of the capacitor C193 and the second end of the capacitor C195 are connected to the analog ground, and the second end of the chip common-mode choke L10 is connected to the power supply AV+9V; The analog signal input terminal V2 of the analog-to-digital converter U6 is connected to the first end of the resistor R215, and the second end of the resistor R215 is connected to the analog ground; The inverting input terminal IN- of the single-channel operational amplifier D13 is connected to the first end of the resistor R211 and the first end of the capacitor C293, the second end of the resistor R211 and the second end of the capacitor C293 are connected to the signal output terminal OUT of the single-channel operational amplifier D13 and the first end of the resistor R129, the second end of the resistor R129 is connected to the first end of the capacitor C200 and the analog signal input terminal V1 of the analog-to-digital converter U6, and the second end of the capacitor C200 is connected to the analog ground; The non-inverting input terminal IN+ of the single-channel operational amplifier D13 is connected to the anode of the diode VD4, the cathode of the diode VD5, and the first end of the resistor R208, the cathode of the diode VD4 is connected to the power supply AV+9V, the anode of the diode VD5 is connected to the power supply AV-9V, and the second end of the resistor R208 is connected to the third analog signal port; The negative power supply terminal V- of the single-channel operational amplifier D13 is connected to the first end of capacitor C286, the first end of capacitor C283, and the first end of the chip common-mode choke L30, the second end of capacitor C286 and the second end of capacitor C283 are connected to the analog ground, the second end of the chip common-mode choke L30 is connected to the power supply AV-9V, the positive power supply terminal V+ of the single-channel operational amplifier D13 is connected to the first end of capacitor C194, the first end of capacitor C196, and the first end of the chip common-mode choke L8, the second end of capacitor C194 and the second end of capacitor C196 are connected to the analog ground, and the second end of the chip common-mode choke L8 is connected to the power supply AV+9V.

3. The analog-to-digital conversion circuit according to claim 1, characterized in that: The step of stepping down the power supply VCC12V to AV+5V through the synchronous buck converter U9 includes: The voltage input terminal VIN of the synchronous buck converter U9, the cathode of the transient voltage suppression diode D10, the first end of the capacitor C323, the first end of the capacitor C324, the first end of the capacitor C325, and the first end of the resistor R220 are connected to the power supply VCC12V, the enable terminal EN of the synchronous buck converter U9 is connected to the second end of the resistor R220 and the first end of the resistor R221, the internal power supply terminal VCC of the synchronous buck converter U9 is connected to the first end of the capacitor C326, the operation mode selection terminal MODE of the synchronous buck converter U9 is connected to the first end of the resistor R223, and the current limit and inductor current reporting terminal CS of the synchronous buck converter U9 is connected to the first end of the resistor R222. The second end of the resistor R223, the second end of R222, the second end of the capacitor C323, the second end of the capacitor C324, the second end of the capacitor C325, and the anode of the transient voltage suppression diode D10 are connected to the power ground; The bootstrap connection terminal BST of the synchronous buck converter U9 is connected to the first end of the resistor R224, the second end of the resistor R224 is connected to the first end of the capacitor C327, the second end of the capacitor C327 is connected to the switch terminal SW1, the switch terminal SW2 and the first end of the inductor L36 of the synchronous buck converter U9, the second end of the inductor L36 is connected to the first end of the capacitor C329, the first end of the resistor R227, the first end of the capacitor C330, the first end of the capacitor C331, the first end of the capacitor C332, the first end of the chip common mode choke L37, and outputs the power supply VCC5V; the second end of the chip common mode choke L37 outputs the power supply AV+5V; and is connected to the first end of the capacitor C333, the first end of the capacitor C334, and the first end of the capacitor C335; the second end of the capacitor C333, the second end of the capacitor C334, and the second end of the capacitor C335 are connected to the analog ground; The second end of the capacitor C329 is connected to the first end of the resistor R225, and the feedback end FB of the synchronous buck converter U9 is connected to the second end of the resistor R225, the second end of the resistor R227, and the first end of the resistor R228. The external tracking voltage input terminal REF of the synchronous buck converter U9 is connected to the first terminal of the capacitor C328. The ground terminals AGND, PGND1, PGND2 of the synchronous buck converter U9, the second end of the capacitor C328, the second end of the resistor R228, the second end of the capacitor C330, the second end of the capacitor C331, and the second end of the capacitor C332 are connected to the power ground; The open-drain power output terminal PGOOD of the synchronous buck converter U9 is connected to a first end of a resistor R226, and a second end of the resistor R226 is connected to a power source VCC5V PWR.

4. The analog-to-digital conversion circuit according to claim 1, characterized in that: The step of reducing the voltage to VREF2V5 by using the voltage stabilizing reference chip D14 includes: The sleep mode control terminal VS of the voltage stabilizing reference chip D14 is connected to the first end of the capacitor C188, the first end of the capacitor C189, and the first end of the chip common mode choke L19, the second end of the chip common mode choke L19 is connected to the power supply AV+5V, the second end of the capacitor C188 and the second end of the capacitor C189 are connected to the analog ground, and the ground terminal GND of the voltage stabilizing reference chip D14 is connected to the analog ground; The output terminal OUTPUT of the voltage stabilizing reference chip D14 is connected to the first end of the capacitor C190, the first end of the capacitor C192 is connected to the first end of the resistor R212, and the second end of the resistor R212 outputs the reference voltage VREF2V5; A second end of capacitor C190 and a second end of capacitor C192 are connected to the analog ground.

5. The analog-to-digital conversion circuit according to claim 1, characterized in that: The model of the synchronous buck converter U9 is IS6605A.

6. The analog-to-digital conversion circuit according to claim 1, characterized in that: The model of the voltage stabilizing reference chip D14 is REF193GS.

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