High-reliability low-side driving control circuit
By designing a low-side drive control circuit that integrates reference source, over-temperature protection, current limit protection and active embedded protection circuit, the shortcomings of the low-side drive circuit in the prior art in terms of power capability, safety and cost-effectiveness are solved, and a high reliability and safety circuit design is achieved, reducing costs and improving the efficiency of driving inductive loads.
Patent Information
- Application Number
- CN202421498135.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-06-27
- Publication Date
- 2025-04-15
- Estimated Expiration
- 2034-06-27
AI Technical Summary
The existing low-side drive circuits based on Darlington array chips have shortcomings in terms of power capability, safety and cost-effectiveness, especially when driving high-power relays or solenoid valves, and lack of short-circuit protection functions, which increases the insecurity and maintenance costs of the system.
A high-reliability low-side drive control circuit is designed, including reference source circuit, over-temperature protection circuit, current limit protection circuit and active embedded protection circuit. These circuits realize the control and protection of MOS tubes, ensuring effective protection of chips and system components in short circuit or overload conditions, and no external Schottky diode is required to freeze when driving inductive loads.
Improves the safety and reliability of the circuit, prevents damage caused by short circuit or overload, reduces thermal mechanical fatigue, reduces costs, and eliminates the need for external devices to freeze when driving inductive loads, improving the compactness and efficiency of the overall design.
Smart Images
Figure CN222763873U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of integrated circuit design, in particular to a high-reliability low-side drive control circuit. Background Art
[0002] Low-side driver circuits play a vital role in modern electronics. They are used to activate and deactivate relays, solenoid valves, LEDs, and other devices. Traditional low-side driver circuits usually rely on Darlington array chips to achieve control functions. However, this approach has some obvious limitations.
[0003] First, the maximum continuous output current of a single channel of a Darlington array chip is generally less than 500mA, which limits its use in applications that require larger current drives. For example, when driving medium to high power relays or solenoid valves, this current level may not be sufficient to ensure reliable operation of the device. Second, existing low-side drive circuit designs generally do not have short-circuit protection. In the event of a short circuit, overcurrent may cause circuit damage or even cause fire or other safety accidents, thereby increasing the insecurity and maintenance costs of the system. Finally, when used to drive inductive loads such as relays or solenoid valves, traditional low-side drive circuits require an external Schottky diode in each channel to achieve freewheeling. This is because inductive loads generate a higher reverse voltage when powered off, which may damage the circuit if there is no appropriate freewheeling path. However, this approach increases the cost and complexity of the solution, while also affecting the compactness and efficiency of the overall design.
[0004] In summary, although the existing low-side drive circuits based on Darlington array chips have certain practicality in specific applications, they are insufficient in terms of power capability, safety and cost-effectiveness. Therefore, there is an urgent need to provide a high-reliability low-side drive control circuit that can improve circuit safety and reliability and does not require external devices for freewheeling when driving inductive loads. Utility Model Content
[0005] The utility model provides a high-reliability low-side drive control circuit, which can improve circuit safety and reliability, and does not require an external device for freewheeling when driving an inductive load.
[0006] In order to achieve the above objectives, this application provides the following technical solutions:
[0007] A high-reliability low-side drive control circuit, comprising a reference source circuit, an over-temperature protection circuit, a current limiting protection circuit and an active clamping protection circuit;
[0008] One end of the reference source circuit is connected to the input pin, and the other end is grounded. A resistor R3 is connected in parallel to the reference source circuit; the input pin is also connected to a resistor R1, the other end of the resistor R1 is connected to an over-temperature protection circuit, a current limiting protection circuit and a resistor R2, the other ends of the over-temperature protection circuit and the current limiting protection circuit are both grounded, and the other end of the resistor R2 is connected to the gate of the MOS tube MN1; the drain of the MOS tube MN1 is connected to the output pin, and the source is grounded; the resistors R1 and R2 are gate drive resistors, which are used to control the on and off of the MOS tube MN1; the active clamping protection circuit is connected in parallel between the gate and the drain of the MOS tube.
[0009] Furthermore, the active clamping protection circuit includes a clamping diode D1 and a clamping diode D2; the forward end of the clamping diode D2 is connected to the resistor R2, and the reverse end is connected to the reverse end of the clamping diode D1; the forward end of the clamping diode D1 is connected to the output pin.
[0010] Furthermore, a clamping diode D3 is connected in parallel to the reference source circuit; the reverse end of the clamping diode D3 is connected to the input pin, and the forward end is grounded.
[0011] Further, the over-temperature protection circuit includes a cascode current mirror and an over-temperature protection comparator;
[0012] The negative input terminal of the over-temperature protection comparator is connected to both the resistor R7 and the cascode current mirror, and the other end of the resistor R7 is connected to both the collector of the NPN transistor Q0 and the collector of the NPN transistor Q1; the emitter of the NPN transistor Q0 is connected to the resistor R6, and the other end of the resistor R6 is connected to the cascode current mirror; the emitter of the NPN transistor Q1 is connected to the resistor R5, and the other end of the resistor R5 is connected to both the cascode current mirror and the positive input terminal of the over-temperature protection comparator; the collector of the NPN transistor Q1 is also connected to the bias current Ibias, and the other end of the resistor R4 is connected to the cascode current mirror; one end of the cascode current mirror is grounded; the output terminal of the over-temperature protection comparator is connected to the MOS tube MN 12 The gate connection of the MOS tube MN 12 The drain is connected to the resistor R1 and the source is grounded.
[0013] Furthermore, the over-temperature protection circuit also includes an over-temperature restart comparator;
[0014] The positive input terminal of the over-temperature restart comparator is connected to the resistor R5 and the common-source and common-gate current mirror, the negative input terminal is connected to the resistor R6 and the common-source and common-gate current mirror, and the output terminal is connected to the MOS tube MN. 11 The gate connection of the MOS tube MN 11 The drain is connected to the resistor R1 and the source is grounded.
[0015] Furthermore, the common-source common-gate current mirror includes MOS transistors MN3, MN4, MN5, MN6, MN7, MN8, MN9 and MN 10 ;
[0016] The drain of the MOS tube MN3 is connected to the resistor R4, the source is connected to the drain of the MOS tube MN4, the gate is connected to the gate of the MOS tube MN5, and the other end of the resistor R4 is connected to the gate of the MOS tube MN5; the drain of the MOS tube MN5 is connected to the resistor R5, the positive input end of the over-temperature protection comparator and the positive input end of the over-temperature restart comparator, the source is connected to the drain of the MOS tube MN6, and the gate is connected to the gate of the MOS tube MN7; the drain of the MOS tube MN7 is connected to the resistor R6 and the negative input end of the over-temperature restart comparator, the source is connected to the drain of the MOS tube MN8, and the gate is connected to the gate of the MOS tube MN9; the drain of the MOS tube MN9 is connected to the resistor R7 and the negative input end of the over-temperature protection comparator, the source is connected to the MOS tube MN 10 The drain connection of
[0017] The gate of the MOS transistor MN4 is connected to the resistor R4 and the drain of the MOS transistor MN3; the MOS transistors MN4, MOS transistors MN6, MOS transistors MN8 and MOS transistors MN 10 The gates of the MOS tubes MN4, MOS tube MN6, MOS tube MN8 and MOS tube MN are connected in sequence. 10 The sources are grounded.
[0018] Furthermore, the on-resistance Rdson of the MOS tube MN1 is 50 mΩ.
[0019] The principles and advantages of this utility model are:
[0020] The low-side drive control circuit in this solution is used to power the chip through the input pin, and the on and off of the MOS tube MN1 is controlled through the resistor R1 and the resistor R2. Among them, the reference source circuit provides a reference voltage and bias current with a certain temperature characteristic that is independent of the power supply and process for the chip; the overtemperature protection circuit can prevent the occurrence of rapid thermal transient effects (such as short circuits), thereby reducing thermal mechanical fatigue; the current limiting protection circuit can effectively protect the chip itself and other components in the system (such as wiring harnesses, connectors, loads, etc.) to prevent them from being damaged by large currents when short circuits or overloads occur; the active clamping protection circuit is applied, so that when driving an inductive load, the output pin can clamp the output voltage to Vclamp (the clamping voltage Vclamp is less than the breakdown voltage of the MOS tube) during the shutdown period through the clamping diode D1, the clamping diode D2, the resistor R1 and the resistor R2, thereby allowing the energy of the inductor to be dissipated without damaging the device. In summary, this solution integrates an over-temperature protection circuit (including over-temperature protection and over-temperature restart) and a current limiting protection circuit. When a rapid thermal transient effect occurs, it can reduce thermal mechanical fatigue and prevent the chip from burning when the output end is short-circuited to the power supply, greatly improving the chip reliability and system safety. In addition, an active clamping protection circuit is also integrated, so that when driving an inductive load, there is no need for an external Schottky diode for freewheeling, reducing costs. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] Figure 1 The present invention is a circuit diagram of a high-reliability low-side drive control circuit embodiment.
[0022] Figure 2 The present invention is a schematic diagram of the circuit structure of an over-temperature protection circuit in a high-reliability low-side drive control circuit embodiment of the present invention.
[0023] Figure 3 The utility model is a circuit structure schematic diagram of a reference source circuit in a high-reliability low-side drive control circuit embodiment.
[0024] Figure 4 The present invention is a schematic diagram of the circuit structure of a current limiting protection circuit in a high-reliability low-side drive control circuit embodiment of the present invention. DETAILED DESCRIPTION
[0025] The following is further described in detail through specific implementation methods:
[0026] Embodiment 1:
[0027] Embodiment 1 is basically as attached Figure 1 As shown:
[0028] A high-reliability low-side drive control circuit comprises a reference source circuit, an over-temperature protection circuit, a current limiting protection circuit and an active clamping protection circuit, and supplies power to the inside of a chip through an input pin.
[0029] The specific circuit structure is as follows Figure 1 As shown, one end of the reference source circuit is connected to the input pin, and the other end is grounded. The reference source circuit is respectively connected in parallel with a resistor R3 and a clamping diode D3; one end of the resistor R3 is connected to the input pin, and the other end is grounded; the reverse end of the clamping diode D3 is connected to the input pin, and the forward end is grounded; the input pin is also connected to a resistor R1, and the other end of the resistor R1 is connected to the over-temperature protection circuit, the current limiting protection circuit and the resistor R2, and the other ends of the over-temperature protection circuit and the current limiting protection circuit are both grounded, and the other end of the resistor R2 is connected to the gate of the MOS tube MN1; the drain of the MOS tube MN1 is connected to the output pin, and the source is grounded; the resistor R1 and the resistor R2 are gate drive resistors, which are used to control the on and off of the MOS tube MN1. In this embodiment, the breakdown voltage of the MOS tube MN1 is greater than the clamping voltage Vclamp, so that it can safely work within its clamping voltage range; the on resistance Rdson of the MOS tube MN1 is 50mΩ.
[0030] The active clamping protection circuit is connected in parallel between the gate and drain of the MOS tube. Specifically, the active clamping protection circuit includes a clamping diode D1 and a clamping diode D2; the forward end of the clamping diode D2 is connected to the resistor R2, and the reverse end is connected to the reverse end of the clamping diode D1; the forward end of the clamping diode D1 is connected to the output pin. Thus, when driving an inductive load, the output pin can clamp the output voltage at Vclamp through the clamping diode D1, the clamping diode D2, the resistor R1 and the resistor R2 during the shutdown period, thereby allowing the energy of the inductor to be dissipated without damaging the device.
[0031] like Figure 3 As shown, the reference source circuit in this embodiment is composed of a bandgap reference circuit and a bias circuit (Bandgap & Bias). The specific circuit structure is as follows: it includes MOS tube MP1, MOS tube MP2 and MOS tube MP3, the source of MOS tube MP1 is connected to the source of MOS tube MP4, MOS tube MP5, MOS tube MP6, MOS tube MP7, MOS tube MP8 and MOS tube MP9, and the gates of MOS tube MP6, MOS tube MP7, MOS tube MP8 and MOS tube MP9 are connected in sequence; the drain of MOS tube MP1 is connected to the source of MOS tube MP2, the drain of MOS tube MP2 is connected to the source of MOS tube MP3, the drain of MOS tube MP3 is connected to the gate of MOS tube MN. 14 The gate and MOS tube MN 13The drain connection of MOS tube MN 13 The gate of the MOS tube MN is connected to VREF. 13 The source of the MOS tube MP1 is connected to the gate of the MOS tube MP2 and the MOS tube MP3. The gate of the MOS tube MP4 is connected to the gate of the MOS tube MP5, and the drain of the MOS tube MP4 is connected to the gate of the MOS tube MN. 14 The drain connection of MOS tube MN 14 The source of the MOS tube MN 13 The source of MOS tube MN 15 The source, resistor R8, MOS tube MN 17 The source of MOS tube MN 18 The source of MOS tube MN 19 The source of the MOS transistor MP5 is connected to the drain of the MOS transistor MP6 and the drain of the MOS transistor MN. 15 The drains of the MOS tube MN are connected. 15 The gate and MOS tube MN 16 Gate connection of MOS tube MN 16 The drain of MOS tube MP7 is connected to the drain of MOS tube MN. 16 The source of the MOS tube MP8 is connected to the resistor R8; the drain of the MOS tube MP 10 And MOS tube MP 11 The source of MOS tube MP 10 The drain of the MOS tube MN 17 The drain is connected to the gate of the MOS tube MN 18 Gate connection of MOS tube MP 11 The drain of the MOS tube MN 18 The drain and MOS tube MN 19 The gate connection of MOS tube MP 11 The gate and resistor R 11 Connected to the emitter of PNP transistor Q3; MOS tube MN 19 A capacitor C1 is connected in parallel between the gate and drain of the MOS tube MN. 19 The drain of MOS tube MP9 and the resistor R 10 and resistor R 11 Both connected, resistor R 10 The other end of the MOS tube MP 10 The gate of is connected to the resistor R9, and the other end of the resistor R9 is connected to the emitter of the PNP transistor Q2. In other embodiments of the present application, other existing bandgap reference circuits and bias circuits may also be used.
[0032] like Figure 2As shown, the over-temperature protection circuit (TSD TSW) includes a common-source common-gate current mirror, an over-temperature protection comparator COMP1 and an over-temperature restart comparator COMP2.
[0033] The negative input terminal of the over-temperature protection comparator is connected to both the resistor R7 and the cascode current mirror, and the other end of the resistor R7 is connected to both the collector of the NPN transistor Q0 and the collector of the NPN transistor Q1; the emitter of the NPN transistor Q0 is connected to the resistor R6, and the other end of the resistor R6 is connected to the cascode current mirror; the emitter of the NPN transistor Q1 is connected to the resistor R5, and the other end of the resistor R5 is connected to both the cascode current mirror and the positive input terminal of the over-temperature protection comparator; the collector of the NPN transistor Q1 is also connected to the bias current Ibias, and the other end of the resistor R4 is connected to the cascode current mirror; one end of the cascode current mirror is grounded; the output terminal of the over-temperature protection comparator is connected to the MOS tube MN 12 The gate connection of the MOS tube MN 12 The drain is connected to the resistor R1 and the source is grounded.
[0034] Among them, the BE junction of NPN transistor Q0 and the BE junction of NPN transistor Q1 both have negative temperature coefficients, and as Figure 2 As shown, the NPN transistor Q0 is far away from the power transistor MN1, and the NPN transistor Q1 is at the center of the power transistor MN1. Figure 2 The voltages at points A and B in the figure have positive temperature coefficients, and the voltage at point C has a zero temperature coefficient. A The voltage V with zero temperature coefficient at point C C Through the COMP1 comparator, when the temperature is higher than the threshold setting temperature TSDH, the comparator outputs a high level, and the MOS tube MN 12 Turn on, pull down the gate voltage of the MOS tube, turn off the MOS tube to reduce power and temperature; when the temperature is lower than TSDL, the comparator outputs a low level, and the MOS tube MN 12 Shut down, release the state of the MOS tube, and the MOS tube can be restored to open. In this way, the chip can be protected from overtemperature. When the internal junction temperature of the chip exceeds the set value TSDH (150°C in this embodiment), the gate voltage of the MOS tube is pulled down to shut down the MOS tube; after the MOS tube is shut down, the junction temperature of the chip will drop. When the junction temperature drops below TSDL (135°C in this embodiment), the MOS tube is reopened.
[0035] The positive input terminal of the over-temperature restart comparator is connected to the resistor R5 and the common-source and common-gate current mirror, the negative input terminal is connected to the resistor R6 and the common-source and common-gate current mirror, and the output terminal is connected to the MOS tube MN. 11 The gate connection of the MOS tube MN 11The drain of is connected to the resistor R1, and the source is grounded. In practical applications, the junction temperature swing ΔTJ is indirectly measured by measuring the spatial temperature difference inside the chip. When ΔTJ exceeds the set value ΔTJH (60°C in this embodiment), the gate voltage of the MOS tube is pulled down to turn off the MOS tube. After the MOS tube is turned off, the chip junction temperature will drop and ΔTJ will also decrease. When ΔTJ decreases to below ΔTJL (45°C in this embodiment), the MOS tube is turned on again. This function can prevent rapid thermal transient effects, thereby reducing thermal mechanical fatigue.
[0036] Specifically, when a short circuit occurs, the positive temperature coefficient voltage V at point A changes rapidly. A The voltage V with a positive temperature coefficient that changes slowly at point B B The COMP2 comparator is used for comparison. When the temperature difference (ΔTJ) between the two is higher than the threshold setting temperature ΔTJH, the comparator outputs a high level and the MOS tube MN 11 Turn on, pull down the gate voltage of the MOS tube, turn off the MOS tube to reduce power, reduce temperature, and reduce ΔTJ; when ΔTJ decreases to below ΔTJL, the comparator outputs a low level, and the MOS tube MN 11 Shut down, release the state of the MOS tube, and the MOS tube can be turned back on.
[0037] In the over-temperature protection circuit of this embodiment, the common-source common-gate current mirror includes MOS transistors MN3, MOS transistors MN4, and MOS transistors MN s , MOS tube MN6, MOS tube MN7, MOS tube MN8, MOS tube MN9 and MOS tube MN 10 , mirroring the bias current Ibias to each branch.
[0038] Specifically, the drain of the MOS tube MN3 is connected to the resistor R4, the source is connected to the drain of the MOS tube MN4, and the gate is connected to the MOS tube MN s The other end of the resistor R4 is connected to the gate of the MOS tube MN5; the drain of the MOS tube MN5 is connected to the resistor R5, the positive input end of the over-temperature protection comparator and the positive input end of the over-temperature restart comparator, the source is connected to the drain of the MOS tube MN6, and the gate is connected to the gate of the MOS tube MN7; the drain of the MOS tube MN7 is connected to the resistor R6 and the negative input end of the over-temperature restart comparator, the source is connected to the drain of the MOS tube MN8, and the gate is connected to the gate of the MOS tube MN9; the drain of the MOS tube MN9 is connected to the resistor R7 and the negative input end of the over-temperature protection comparator, the source is connected to the MOS tube MN 10 The gate of MOS tube MN4 is connected to the drain of resistor R4 and MOS tube MN3; MOS tube MN4, MOS tube MN6, MOS tube MN8 and MOS tube MN 10The gates of the MOS tubes MN4, MOS tube MN6, MOS tube MN8 and MOS tube MN are connected in sequence. 10 The sources are grounded.
[0039] like Figure 4 As shown, the current limiting protection circuit (Current Limit) includes a main power tube MN1′, a sampling tube MN2′, a sampling resistor RS, an amplifier AMP and a MOS tube MN 20 The drain of the main power tube MN1′ is connected to the drain of the sampling tube MN2′, the gate of the main power tube MN1′ is connected to the gate of the sampling tube MN2′, and the source of the main power tube MN1′ is grounded; the source of the sampling tube MN2′ is connected to both the sampling resistor RS and the positive input terminal of the amplifier AMP, and the other end of the resistor RS is grounded; the negative input terminal of the amplifier AMP is connected to VREF, and the output terminal is connected to the MOS tube MN 20 Gate connection of MOS tube MN 20 The source of MOS tube MN is connected to resistor RS and grounded. When the sampling voltage on resistor RS reaches VREF, 20 The MOS tube is turned on, which lowers the gate voltage of the MOS tube and achieves the effect of current limiting, thereby effectively protecting the chip itself and other components in the system from being damaged by large current when a short circuit or overload occurs.
[0040] The low-side drive control circuit in this solution integrates an over-temperature protection circuit (including over-temperature protection and over-temperature restart) and a current limiting protection circuit. When a rapid thermal transient effect occurs, it can reduce thermal mechanical fatigue and prevent the chip from burning when the output end is short-circuited to the power supply, greatly improving the chip reliability and system safety. In addition, an active clamping protection circuit is integrated, so that when driving an inductive load, there is no need for an external Schottky diode for freewheeling, reducing costs.
[0041] The above are only embodiments of the utility model. The common sense such as the known specific structures and characteristics in the scheme is not described in detail here. The ordinary technicians in the relevant field know all the common technical knowledge in the technical field of the utility model before the application date or priority date, can obtain all the existing technologies in the field, and have the ability to apply the conventional experimental means before that date. The ordinary technicians in the relevant field can improve and implement this scheme in combination with their own abilities under the enlightenment given by this application. Some typical known structures or known methods should not become obstacles for ordinary technicians in the relevant field to implement this application. It should be pointed out that for the technicians in this field, without departing from the structure of the utility model, several deformations and improvements can be made, which should also be regarded as the protection scope of the utility model, which will not affect the effect of the implementation of the utility model and the practicality of the patent. The protection scope required by this application shall be based on the content of its claims, and the specific implementation methods and other records in the specification can be used to explain the content of the claims.
Claims
1. A high-reliability low-side drive control circuit, characterized in that: It includes a reference source circuit, an over-temperature protection circuit, a current limiting protection circuit and an active clamping protection circuit; One end of the reference source circuit is connected to the input pin, and the other end is grounded. A resistor R3 is connected in parallel to the reference source circuit; the input pin is also connected to a resistor R1, the other end of the resistor R1 is connected to an over-temperature protection circuit, a current limiting protection circuit and a resistor R2, the other ends of the over-temperature protection circuit and the current limiting protection circuit are both grounded, and the other end of the resistor R2 is connected to the gate of the MOS tube MN1; the drain of the MOS tube MN1 is connected to the output pin, and the source is grounded; the resistors R1 and R2 are gate drive resistors, which are used to control the on and off of the MOS tube MN1; the active clamping protection circuit is connected in parallel between the gate and the drain of the MOS tube.
2. The high-reliability low-side drive control circuit according to claim 1, characterized in that: The active clamping protection circuit includes a clamping diode D1 and a clamping diode D2; the forward end of the clamping diode D2 is connected to the resistor R2, and the reverse end is connected to the reverse end of the clamping diode D1; the forward end of the clamping diode D1 is connected to the output pin.
3. The high-reliability low-side drive control circuit according to claim 1, characterized in that: The reference source circuit is also connected in parallel with a clamping diode D3; the reverse end of the clamping diode D3 is connected to the input pin, and the forward end is grounded.
4. The high-reliability low-side drive control circuit according to claim 1, characterized in that: The over-temperature protection circuit comprises a common-source common-gate current mirror and an over-temperature protection comparator; The negative input terminal of the over-temperature protection comparator is connected to both the resistor R7 and the cascode current mirror, and the other end of the resistor R7 is connected to both the collector of the NPN transistor Q0 and the collector of the NPN transistor Q1; the emitter of the NPN transistor Q0 is connected to the resistor R6, and the other end of the resistor R6 is connected to the cascode current mirror; the emitter of the NPN transistor Q1 is connected to the resistor R5, and the other end of the resistor R5 is connected to both the cascode current mirror and the positive input terminal of the over-temperature protection comparator; the collector of the NPN transistor Q1 is also connected to the bias current Ibias, and the other end of the resistor R4 is connected to the cascode current mirror; one end of the cascode current mirror is grounded; the output terminal of the over-temperature protection comparator is connected to the MOS tube MN 12 The gate connection of the MOS tube MN 12 The drain is connected to the resistor R1 and the source is grounded.
5. The high-reliability low-side drive control circuit according to claim 4, characterized in that: The over-temperature protection circuit also includes an over-temperature restart comparator; The positive input terminal of the over-temperature restart comparator is connected to the resistor R5 and the common-source and common-gate current mirror, the negative input terminal is connected to the resistor R6 and the common-source and common-gate current mirror, and the output terminal is connected to the MOS tube MN. 11 The gate connection of the MOS tube MN 11 The drain is connected to the resistor R1 and the source is grounded.
6. The high-reliability low-side drive control circuit according to claim 5, characterized in that: The common-source common-gate current mirror includes MOS transistors MN3, MN4, MN5, MN6, MN7, MN8, MN9 and MN 10 ; The drain of the MOS tube MN3 is connected to the resistor R4, the source is connected to the drain of the MOS tube MN4, the gate is connected to the gate of the MOS tube MN5, and the other end of the resistor R4 is connected to the gate of the MOS tube MN5; the drain of the MOS tube MN5 is connected to the resistor R5, the positive input end of the over-temperature protection comparator and the positive input end of the over-temperature restart comparator, the source is connected to the drain of the MOS tube MN6, and the gate is connected to the gate of the MOS tube MN7; the drain of the MOS tube MN7 is connected to the resistor R6 and the negative input end of the over-temperature restart comparator, the source is connected to the drain of the MOS tube MN8, and the gate is connected to the gate of the MOS tube MN9; the drain of the MOS tube MN9 is connected to the resistor R7 and the negative input end of the over-temperature protection comparator, the source is connected to the MOS tube MN 10 The drain connection of The gate of the MOS transistor MN4 is connected to the resistor R4 and the drain of the MOS transistor MN3; the MOS transistors MN4, MOS transistors MN6, MOS transistors MN8 and MOS transistors MN 10 The gates of the MOS tubes MN4, MOS tube MN6, MOS tube MN8 and MOS tube MN are connected in sequence. 10 The sources are grounded.
7. The high-reliability low-side drive control circuit according to claim 1, characterized in that: The on-resistance Rdson of the MOS tube MN1 is 50 mΩ.