Warping-preventing solder ball clamp and solder ball attachment system

Abstract

The utility model discloses a warping-preventing solder ball clamp and a solder ball attachment system, which are used for preventing warping of a reconstructed panel in a panel-level semiconductor process. The solder ball clamp comprises a platform with at least one ejector rod; and a panel carrier configured to be coupleable to the platform for carrying and securing a reconfiguration panel having a plurality of semiconductor dies and an anti-warpage device, the panel carrier further comprising a substrate and at least one release hole penetrating the substrate. Wherein the at least one ejector rod is configured to pass through the at least one release hole so as to release the reconstruction panel from the solder ball clamp. The solder ball attaching system comprises the solder ball clamp. And a welding assisting station, a placing station, an inspection station, a backflow station, a cleaning station, a releasing station and a conveying device.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This patent application claims the priority of Singapore application 10202302015Y, filed on July 14, 2023, the disclosure of which is incorporated in its entirety into this patent application. Technical Field

[0003] The present application relates to a solder ball fixture for preventing warping of a reconstructed panel in a panel-level semiconductor process in semiconductor packaging, a solder ball attachment system including the solder ball fixture, and a reconstructed panel formed by the system. Background Art

[0004] For panel-level semiconductor processing, current solder ball attachment technology faces a severe challenge of warpage of the reconstructed panel. The warpage, in turn, has a negative impact on the electrical connections of semiconductor packages made from the reconstructed panel, especially for ball grid array (BGA) semiconductor packages, which use solder balls as electrical connections to external devices such as printed circuit boards (PCBs). Utility Model Content

[0005] Therefore, the present application discloses a solder ball fixture for preventing warping of a reconstructed panel in a panel-level semiconductor process, a solder ball attachment system including the solder ball fixture, and a reconstructed panel formed using the solder ball attachment system.

[0006] As a first aspect of the present application, a solder ball fixture is disclosed for preventing a reconstructed panel from warping in a panel-level semiconductor process. The solder ball fixture includes a platform having at least one ejector pin; and a panel carrier configured to be coupled to the platform for carrying and fixing a reconstructed panel having a plurality of semiconductor dies and an anti-warping device, wherein the panel carrier also includes a substrate and at least one release hole, wherein the at least one release hole passes through the substrate. The at least one ejector pin is configured to pass through the at least one release hole to release the reconstructed panel from the solder ball fixture.

[0007] As a second aspect of the present application, a solder ball attachment system is disclosed for preventing warping of a reconstructed panel in a panel-level semiconductor process. The solder ball attachment system includes the solder ball fixture as described above; a fluxing station for applying flux to the reconstructed panel; a placement station for placing the solder balls on the flux and the reconstructed panel; an inspection station for inspecting the solder balls on the reconstructed panel; a reflow station for reflowing the solder balls on the reconstructed panel; a cleaning station for removing the flux on the reconstructed panel; a release station for releasing the reconstructed panel and the solder balls from the solder ball fixture; and a conveyor for conveying the reconstructed panel on the solder ball fixture between the fluxing station, the placement station, the inspection station, the reflow station, the cleaning station, and the release station. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] The accompanying drawings show embodiments of the present application for explaining the principles disclosed in the present application. However, it should be understood that these drawings are for illustrative purposes only and are not intended to limit the scope of the present application.

[0009] Figure 1 A flow chart showing a method for preventing warping when attaching solder balls in a panel-level semiconductor process according to an exemplary embodiment of the present disclosure is shown;

[0010] Figure 2 Shows Figure 1 A flowchart of step S12 of the method;

[0011] Figure 3a and Figure 3b Shows Figure 2 A sub-step S121 of step S12;

[0012] Figure 4a and Figure 4b Shows Figure 2 A sub-step S122 of step S12;

[0013] Figure 5 Shows Figure 2 The first process of a sub-step S123 of step S12;

[0014] Figure 6a and Figure 6b Shows Figure 2 The second process of a sub-step S123 of step S12;

[0015] Figures 7a to 7d Shows Figure 2 A sub-step S124 of step S12;

[0016] Figures 8a to 8d Shows Figure 2A sub-step S125 of step S12;

[0017] Fig. 9 A schematic diagram of a solder ball attachment system is shown, which can be used Figure 1 The method shown in ;

[0018] Figures 10a to 10d Two exemplary embodiments of solder ball fixtures are shown;

[0019] Figures 11a to 11n Shows Figure 1 A step S14 of the method shown in FIG.

[0020] Figures 12a to 12i Shows the use of Fig. 9 Solder ball attachment system in Figure 1 A step S16 of the method shown in FIG.

[0021] Figures 13a to 13c Shows the use of Fig. 9 Solder ball attachment system in Figure 1 A step S18 of the method shown in FIG.

[0022] Figures 14a to 14c Shows the use of Fig. 9 Solder ball attachment system in Figure 1 A step S20 of the method shown in FIG.

[0023] Figures 15a to 15c shows a discrete semiconductor package formed after step S20;

[0024] Fig.16a and Fig.16b Another embodiment of step S14 is shown;

[0025] Fig.17a and Fig.17b Another embodiment of step S14 is shown;

[0026] Fig.18a and Fig.18b Shows a combination of the embodiments in the above figures;

[0027] Figures 19a to 19e shows the application of flux to Fig.12a The process of reconstructing panels.

[0028] Reference numerals:

[0029] 100 Solder Ball Attachment System 110 Solder Ball Fixture

[0030] 1102 fixture internal space 111 positioning feature

[0031] 111a Limit pin 111b Reference pin

[0032] 1112 (the inner side of the positioning feature) 1114 (the inner side of the stop pin and the reconstruction panel)

[0033] 112 Platform reconstruction) distance between panel edges

[0034] 113 ejector rod 114 panel carrier

[0035] 115 substrate 1152 upper surface (of substrate)

[0036] 1154 (of substrate) perimeter 1156 (of substrate) edge

[0037] 116 release hole 117 ejector motor

[0038] 118 Magnetic needle 118a (first embodiment of magnetic needle)

[0039] 118b Second embodiment (of magnetic needle) 1182 Core (of magnetic needle)

[0040] 1184 (magnetic needle) base 1186 (magnetic needle) rear cavity

[0041] 118c (magnetic needle) third embodiment 1188 (magnetic needle) front chamber

[0042] 118d (magnetic needle) fourth embodiment 1189 (magnetic needle) sandwich portion

[0043] 1181 first magnetic needle 1182 second magnetic needle

[0044] 119 top surface (of magnetic needle) 1192 depth (of magnetic needle)

[0045] 1194 first depth 1196 second depth

[0046] 120 soldering station 130 placement station

[0047] 140 inspection station 150 return station

[0048] 160 Cleaning Station 170 Release Station

[0049] 172 Vacuum assembly 180 Transfer station

[0050] 182 Wafer Ring 184 Cutting Tape

[0051] 1842 Total thickness 1844 Top thickness

[0052] 186 UV curable tape 1862 base film

[0053] 1864 adhesive layer 1866 polymer film

[0054] 190 conveying device 200 semiconductor bare chip

[0055] 2002 active surface 2004 pre-through hole

[0056] 2005 filling hole 2005a (filling hole) top surface

[0057] 2006 Contact pad 2007 Die outline

[0058] 2008 Inactive surface 210 anti-warping device

[0059] 2102 first anti-warping device 2104 second anti-warping device

[0060] 2106 The third anti-warpage device 210a simulates a bare chip (such as a silicon block)

[0061] 210b first surface of metal gasket 212 (anti-warping device)

[0062] 214 Cross 220 First Carrier

[0063] 2202 Front surface (of the first carrier) 2204 Center position (of the first carrier)

[0064] 2206 (of the first carrier) peripheral 222 die bonding unit

[0065] 2222 Carrier marking 2224 Die bonding unit outline

[0066] 224 Anti-warping device bonding unit 2242 Anti-warping carrier mark

[0067] 230 first heat release tape 240 molded panel

[0068] 2402 active side 2404 back side

[0069] 2406 molded panel side 242 molded layer

[0070] 2422 (front side of molded layer) 2424 (back side of molded layer)

[0071] 2426 Molding layer side 250 Second carrier

[0072] 2502 (second carrier) front surface 260 second heat release tape

[0073] 270 circuit layer 272 redistribution layer (RDL)

[0074] 274 columns 276 columns

[0075] 2762 column top surface 278 circuit outline

[0076] 280 dielectric layer 2802 dielectric layer top surface

[0077] 2804 Dielectric layer bottom surface 2806 Dielectric layer side surface

[0078] 282 Cavity 290 Reconstruction Panel

[0079] 2901 first dashed rectangle 2902 first part (of reconstruction panel)

[0080] 2903 second dotted rectangle 2904 second part of the reconstruction panel

[0081] 2905 third dashed rectangle 2906 third portion (of reconstruction panel)

[0082] 2907 First segmentation lane 2908 Second segmentation lane

[0083] 2909 Reconstruction panel side 292 solder balls

[0084] 2922 (solder ball) bottom 294 flux

[0085] 295 Flux Applicator 296 Double-Sided Tape

[0086] 298 solder mask 2982 mask opening

[0087] 2984 Mask opening pattern 300 Discrete semiconductor package

[0088] 310 saw blade 312 saw track

[0089] 320 package outline DETAILED DESCRIPTION

[0090] Figure 1 A flow chart of a method S10 for preventing warpage when attaching solder balls in a panel-level semiconductor process according to an exemplary embodiment of the present disclosure is shown. Preventing or eliminating warpage will improve the reliability of electrical connections to external devices in semiconductor packages (e.g., ball grid array (BGA) semiconductor packages). According to an exemplary embodiment of the present disclosure, method S10 includes a step S12, a step S14, a step S16, a step S18, and a step S20.

[0091] Figure 2 The flowchart of step S12 of method S10 is shown, forming a reconstructed panel 290 having one or more anti-warping devices 210. According to an exemplary embodiment of the present disclosure, step S12 includes sub-steps S121, S122, S123, S124, S125 and S126.

[0092] Figure 3aA cross-sectional view of sub-step S121 is shown, where a semiconductor die 200 and one or more anti-warpage devices 210 are bonded to a first carrier 220. Specifically, the semiconductor die 200 is bonded in a face-down manner, that is, an active surface 2002 of the semiconductor die 200 is in contact with a front surface 2202 of the first carrier 220. The active surface 2002 has a pre-through hole 2004, which can be used to expose a contact pad 2006 of the semiconductor die 200. The semiconductor die 200 also has an inactive surface 2008 opposite to the active surface 2002 and away from the first carrier 220. The anti-warpage device 210 also has a first surface 212 in contact with the front surface 2202 of the first carrier 220. In some embodiments, the semiconductor die 200 may be bonded first before the anti-warpage device 210 is bonded. In other embodiments, the anti-warpage device 210 may also be bonded first before the semiconductor die 200 is bonded. In other embodiments, the semiconductor die 200 and the anti-warpage device 210 may be alternately bonded to the first carrier 220. Optionally, a first thermal release tape 230 may be applied between the first carrier 220 and the semiconductor die 200 and the anti-warpage device 210. On one hand, the first thermal release tape 230 may be fixed to the front surface 2202 of the first carrier 220. On the other hand, the first thermal release tape 230 may fix the semiconductor die 200 and the anti-warpage device 210 bonded to the first carrier 220.

[0093] Figure 3b A top view of a portion of a first carrier 220 is shown, wherein a semiconductor die 200 and an anti-warping device 210 are bonded to the first carrier 220. As shown in the figure, the semiconductor die 200 and the anti-warping device 210 are bonded at a central position 2204 (as shown by a dashed rectangle) and a periphery 2206 of the first carrier 220, respectively. The first carrier 220 has a plurality of die bonding units 222 (as shown by dashed squares), and each die bonding unit 222 can accommodate one semiconductor die 200. The semiconductor die 200 has a die outline 2007, and the die bonding unit 222 has a die bonding unit outline 2224. When a fan-out semiconductor package is manufactured, the die outline 2007 is significantly smaller than the die bonding unit outline 2224. At this time, the package outline 320 of the fan-out semiconductor package (see Fig.15a and Fig.15c) is also larger than the die outline 2007 of the semiconductor die 200. It can be understood that the method S10 can also be used to manufacture a fan-in semiconductor package, wherein the die outline 2007 of the semiconductor die 200 can be slightly smaller than the die bonding unit outline 2224 of the die bonding unit 222, so that the semiconductor die 200 can be closely arranged on the first carrier 220. In a preferred embodiment, the semiconductor die 200 and the anti-warping device 210 are bonded in a symmetrical manner to maintain the balance of the semiconductor die 200 and the anti-warping device 210 located on the first carrier 220. In this way, warping in the solder ball attachment process can be better prevented. It should be understood that the first carrier 220 may include one or more Figure 3b In a preferred embodiment, the first thermal release tape 230 is transparent or semi-transparent to facilitate observation of the die bonding unit 222 on the front surface 2202 of the first carrier 220 .

[0094] The die bonding unit 222 may further have a carrier mark 2222 for guiding the semiconductor die 200 to be accurately bonded into the die bonding unit 222 according to the design. Figure 3b Four carrier marks 2222 are shown, which are located at the four corners of the die bonding unit 222. Before bonding the semiconductor die 200 to the first carrier 220, the die features of the semiconductor die 200 (e.g., the pre-through hole 2004 at the active surface 2002) can be identified. Then, by aligning the die features of the semiconductor die 200 with the carrier marks 2222, the semiconductor die 200 is accurately positioned at its corresponding die bonding unit 222 according to the design. Finally, the semiconductor die 200 is bonded in the die bonding unit 222. It should be understood that Figure 3b Only one exemplary embodiment is shown. The die bonding unit 222 may have other numbers and arrangements of the carrier marks 2222 according to the die features of the semiconductor die 200 .

[0095] Similarly, the first carrier 220 may also have a warpage prevention device bonding unit 224 (eg Figure 3b Each anti-warping device bonding unit 224 may accommodate one or more anti-warping devices 210. The anti-warping device bonding unit 224 may have an anti-warping carrier mark 2242 for guiding the anti-warping device 210 to be accurately bonded to the anti-warping device bonding unit 224 according to the design. Before bonding the anti-warping device 210 to the first carrier 220, the anti-warping device features of the anti-warping device 210 (e.g., Figure 3bThen, by aligning the anti-warping device feature of the anti-warping device 210 with the anti-warping carrier mark 2242, the anti-warping device 210 is accurately placed on the anti-warping device bonding unit 224 according to the design. Finally, the anti-warping device 210 is bonded to the corresponding anti-warping device bonding unit 224. It is worth noting that, according to the anti-warping device feature of the anti-warping device 210, the anti-warping device bonding unit 224 may have other numbers and arrangements of anti-warping carrier marks 2242. In order to simplify the description, the bare die bonding unit 222, the carrier mark 2222, the anti-warping device bonding unit 224, the anti-warping carrier mark 2242 and the cross 214 as the anti-warping device feature are omitted in the following figures.

[0096] Figure 4a and Figure 4b A sub-step S122 of step S12 is shown, in which a mold panel 240 is formed on the first carrier 220, which has a semiconductor die 200, an anti-warping device 210, and a mold layer 242. The mold layer 242 may be formed by a molding process using a molding material, and the molding material may penetrate into the gap between the semiconductor die 200 and the anti-warping device 210 and contact the first thermal release tape 230. In some embodiments, the mold layer 242 is formed by a compression molding process using a molding material G730 at a high temperature (e.g., at about 140° C.) and a high pressure (e.g., at about 6 megapascals (MPa)).

[0097] Figure 4a A cross-sectional view of the semiconductor die 200 and the anti-warpage device 210 being encapsulated in the mold layer 242 is shown. The mold layer 242 has a front side 2422 in contact with the first thermal release tape 230, and a back side 2424 opposite to the front side 2422. Therefore, the mold panel 240 has an active side 2402, which includes the active surface 2002 of the semiconductor die 200, the first surface 212 of the anti-warpage device 210, and the front side 2422 of the mold layer 242. At the same time, the back side 2424 of the mold layer 242 constitutes the back side 2404 of the mold panel 240. In addition, the mold layer 242 also has a mold layer side 2426, which constitutes the mold panel side 2406, and the mold panel side 2406 can be used to define the plane size of the mold panel 240. Figure 4b The left and right sides of show a perspective view and a top view, respectively, separated by a vertical dashed line. The perspective view shows that the positions of the semiconductor die 200 and the anti-warpage device 210 are maintained within the tolerance range during the molding process. The top view shows that the semiconductor die 200 and the anti-warpage device 210 are completely encapsulated within the molding layer 242, and only the back side 2424 of the molding layer 242 (or the back side 2404 of the molding panel 240) is visible.

[0098] Figure 5A cross-sectional view of a first process of sub-step S123 of step S12 is shown, in which the mold panel 240 is separated from the first carrier 220. Since the first thermal release tape 230 loses its adhesiveness at a higher temperature (e.g., at about 200° C.), the mold panel 240 can be separated from the first thermal release tape 230 and the first carrier 220. After being separated, the active side 2402 of the mold panel 240 is exposed from the first thermal release tape 230 and the first carrier 220. Therefore, the contact pads 2006 of the semiconductor die 200 are also exposed from the active side 2402 of the mold panel 240 through the pre-through holes 2004. Then, the mold panel 240 is turned upside down, that is, the active side 2402 of the mold panel 240 faces upward, so that the circuit layer 270 (see FIG. 2 ) can be formed on the active side 2402 of the mold panel 240 in the following process. Figure 7a and Figure 7b ).

[0099] Figure 6a and Figure 6b The second process of sub-step S123 of step S12 is shown, in which the molded panel 240 is mounted on the second carrier 250 in a flipped manner, that is, the back side 2404 of the molded panel 240 (or the back side 2424 of the molded layer 242 ) contacts the front surface 2502 of the second carrier 250 . Figure 6a A cross-sectional view is shown in which the active surface 2002 of the semiconductor die 200 is exposed from the front side 2422 of the mold layer 242. Therefore, the contact pad 2006 of the semiconductor die 200 can be exposed through the pre-via 2004, so that the circuit layer 270 is electrically coupled to the contact pad 2006. The first surface 212 of the anti-warpage device 210 is also exposed from the front side 2422 of the mold layer 242, but the circuit layer 270 is not formed on the first surface 212 of the anti-warpage device 210. In addition, the second thermal release tape 260 can be applied between the second carrier 250 and the mold panel 240, that is, the second thermal release tape 260 is in contact with the front surface 2502 of the second carrier 250 and the back side 2404 of the mold panel 240. Similar to the first heat release tape 230 , on one hand, the second heat release tape 260 can be fixed to the front surface 2502 of the second carrier 250 ; on the other hand, the second heat release tape 260 can fix the molded panel 240 to the second carrier 250 . Figure 6b A top view of the active side 2402 of the mold panel 240 is shown. The active surface 2002 of the semiconductor die 200 (including the pre-via 2004) and the first surface 212 of the anti-warpage device 210 are exposed from the front side 2422 of the mold layer 242; then, the circuit layer 270 will be formed on the exposed active surface 2002 of the semiconductor die 200 accordingly.

[0100] Figures 7a to 7dThe sub-step S124 of step S12 is shown, forming a circuit layer 270 on the active surface 2002 of the semiconductor die 200. The circuit layer 270 includes a redistribution layer (RDL) 272 and a pillar layer 274. Figure 7a A cross-sectional view of a pre-via 2004 of a semiconductor die 200 is shown in which a conductive material such as copper (Cu) is used to fill the pre-via 2004 to form a filled hole 2005. Therefore, the filled hole 2005 will be electrically coupled to a contact pad 2006 of the semiconductor die 200 for leading the semiconductor die 200 to an external device such as a PCB. In some preferred embodiments, the filled hole 2005 has a top surface 2005a coplanar with the active surface 2002 of the semiconductor die 200, so that the active side 2402 of the mold panel 240 remains flat, so as to facilitate the formation of a redistribution layer (RDL) 272 in the next step.

[0101] Figure 7b A cross-sectional view of forming a redistribution layer (RDL) 272 on the active surface 2002 of the semiconductor die 200 is shown. The redistribution layer (RDL) 272 is in contact with the filling hole 2005. According to the design of the circuit layer 270, a composite thin layer of titanium and copper (Ti / Cu) may be first formed on the active side 2402 of the mold panel 240 (including the top surface 2005a of the filling hole 2005) as a seed layer (not shown); and then a photolithography process is performed to form the redistribution layer (RDL) 272 on the seed layer. Since the seed layer has better chemical compatibility with the redistribution layer (RDL) 272, the redistribution layer (RDL) 272 may be more firmly formed on the active side 2402 of the mold panel 240. Therefore, the redistribution layer (RDL) 272 is electrically coupled to the filling hole 2005 and the contact pad 2006 of the semiconductor die 200. The redistribution layer (RDL) 272 also extends beyond the die outline 2007 of the semiconductor die 200 and onto the front side 2422 of the molding layer 242 to manufacture a fan-out semiconductor package.

[0102] Figure 7cA cross-sectional view of a pillar layer 274 formed on and electrically coupled to a redistribution layer (RDL) 272 is shown. The pillar layer 274 includes pillars 276 formed outside a die outline 2007 of a semiconductor die 200, for manufacturing the fan-out semiconductor package. It should be understood that method S10 is also applicable to a fan-in semiconductor package, wherein the pillars 276 in the redistribution layer (RDL) 272 and the pillar layer 274 are formed within the die outline 2007 of the semiconductor die 200. Whether it is a fan-out semiconductor package or a fan-in semiconductor package, the semiconductor die 200 can be led out from the contact pad 2006 and reach an external device, such as a PCB, through the filled hole 2005 of the circuit layer 270, the redistribution layer (RDL) 272, and the pillar layer 274. Figure 7d A top view showing the circuit layer 270 , the active surface 2002 of the semiconductor die 200 (not covered by the circuit layer 270 ), and the first surface 212 of the warpage prevention device 210 exposed from the front side 2422 of the molding layer 242 is shown. Figure 7d 200 is also shown as being within the circuit outline 278 of the circuit layer 270. The circuit outline 278 is defined by the extension of the redistribution layer (RDL) 272 of the fan-out semiconductor package. For a fan-in semiconductor package, the circuit outline 278 will be within the die outline 2007 of the semiconductor die 200 because the redistribution layer (RDL) 272 will not extend beyond the die outline 2007 of the semiconductor die 200.

[0103] Figures 8a to 8c Sub-step S125 of step S12 is shown, forming a dielectric layer 280 for partially encapsulating the circuit layer 270, thereby forming a reconstructed panel 290. The pillar top surface 2762 of the pillar 276 is exposed from the dielectric layer 280. In some embodiments, Figure 8a 2 shows a cross-sectional view of a pillar top surface 2762 of pillar 276 being coplanar with a dielectric layer top surface 2802 of dielectric layer 280. Dielectric layer 280 also has a dielectric layer bottom surface 2804 opposite to dielectric layer top surface 2802. Dielectric layer bottom surface 2804 of dielectric layer 280 is in contact with front surface 2422 of molding layer 242. In addition, dielectric layer 280 has a dielectric layer side surface 2806 for defining a planar dimension of dielectric layer 280. Figure 8aAs shown, molded panel side 2406 of molded panel 240 and dielectric layer side 2806 of dielectric layer 280 are aligned to form reconstructed panel side 2909. In one embodiment, molded panel side 2406 of molded panel 240 and dielectric layer side 2806 of dielectric layer 280 are coplanar to form reconstructed panel side 2909 of reconstructed panel 290. In another embodiment, Figure 8b A cross-sectional view of a cavity 282 is shown in the dielectric layer 280 above the pillar 276, such that the pillar top surface 2762 of the pillar 276 is exposed from the cavity 282. Since the solder ball 292 will flow into the cavity 282 during the reflow process (see Fig.12i ), solder ball 292 (see Fig.13a and Fig.13b ) can be more firmly fixed at the pillar 276. Therefore, the reconstructed panel 290 includes the molded panel 240, the circuit layer 270 and the dielectric layer 280.

[0104] Figure 8c A perspective view (left side) and a top view (right side) of a reconstructed panel 290 are shown, separated by a dashed line in the figure. The perspective view shows that the semiconductor die 200 and the anti-warpage device 210 in the molded panel 240 remain substantially in place while the circuit layer 270 and the dielectric layer 280 are formed. The top view shows that the circuit layer 270 is encapsulated in the dielectric layer 280, except for the pillar top surface 2762 of the pillar 276, which is exposed for receiving the solder ball 292. As described above, Figure 3b A portion of the first carrier 220 is shown. Figure 3b the portion of the first carrier 220, Figure 8c A portion of a reconstruction panel 290 is shown. Figure 8c The portion of the reconstruction panel 290 shown may have dimensions of 212 millimeters by 216 millimeters (mm) and is referred to as a strip panel.

[0105] Figure 8d A sub-step S126 of step S12 is shown, dividing the reconstructed panel 290 into smaller parts, such as the strip-shaped panels. Figure 8d The reconstruction panel 290 is shown to include Figure 8c2906, i.e., a first portion 2902 indicated by a first dashed rectangle 2901, a second portion 2904 indicated by a second dashed rectangle 2903, and a third portion 2906 indicated by a third dashed rectangle 2905. The first portion 2902, the second portion 2904, and the third portion 2906 have a first anti-warping device 2102, a second anti-warping device 2104, and a third anti-warping device 2106. The reconstructed panel 290 may be divided into the three smaller portions 2902, 2904, and 2906 along a first dividing street 2907 and a second dividing street 2908. Since the reconstructed panel 290 has a much larger size than each of the three smaller portions 2902, 2904, and 2906, the warping of the reconstructed panel 290 is more severe than the warping of each of the three smaller portions 2902, 2904, and 2906. Therefore, warpage will be greatly reduced if solder ball attachment is performed on each of the three smaller portions 2902, 2904, and 2906 individually, compared to performing solder ball attachment on the entire reconstructed panel 290. It should be understood that the reconstructed panel 290 may have four or more portions that are smaller in size than the smaller portions 2902, 2904, and 2906 to further reduce warpage. However, it should also be understood that the more portions the reconstructed panel 290 is divided into, the fewer semiconductor dies 200 it can contain; this reduces the efficiency of manufacturing semiconductor packages.

[0106] Fig. 9The schematic diagram of the solder ball attaching system 100 that can perform the method S10 is shown. The solder ball attaching system 100 has a solder ball fixture 110 for carrying and fixing the reconstructed panel 290 and preventing the reconstructed panel 290 from warping when attaching solder balls 292 to the pillars 276 of the reconstructed panel 290. The solder ball attachment system 100 may also include a soldering station 120 for applying solder flux to the pillar top surface 2762 of the pillar 276 exposed from the dielectric layer 280; a placement station 130 for placing (e.g., by dropping) the solder ball 292 on the solder flux at the pillar top surface 2762 of the pillar 276; an inspection station 140 for inspecting whether the solder ball 292 is correctly placed at the pillar top surface 2762 of the pillar 276; and a reflow station 150 for reflowing the solder ball 292 at the pillar top surface 2762 of the pillar 276, i.e., melting and fusing the solder ball 292 at a high temperature. The solder ball attachment system 100 includes a plurality of stations 120-180, a cleaning station 160, and a release station 170. The station 170 is used to release the reconstructed panel 290 from the solder ball fixture 110. The station 180 is used to transfer the reconstructed panel 290 and the solder balls 292 to a wafer ring 182 for separation. In addition, the solder ball attachment system 100 may also have a conveyor 190 for conveying the reconstructed panel 290 between the solder ball fixture 110 and all of the above stations 120-180. The conveyor 190 may include a conveyor belt, a walking beam, an indexing table, or any combination thereof.

[0107] Figures 10a to 10d Two exemplary embodiments of the solder ball clamp 110 are shown. Fig.10a A cross-sectional view of a first embodiment 110a of the solder ball fixture 110 is shown. The first embodiment 110a has a platform 112 and a panel carrier 114, which is configured to be coupled to the platform 112 to carry and fix the reconstructed panel 290. The panel carrier 114 has a substrate 115 and one or more release holes 116 penetrating the substrate 115. At the same time, the platform 112 has one or more ejector pins 113 corresponding to the release holes 116, and the ejector pins 113 are configured to be inserted through the release holes 116 for releasing the reconstructed panel 290 from the solder ball fixture 110. Therefore, the ejector pins 113 and the release holes 116 need to have complementary structures to form a fixture internal space 1102, so that the platform 112 can perform relative movement toward or away from the panel carrier 114. The substrate 115 can be made of any material capable of carrying the reconstructed panel 290, including metal (e.g., aluminum), alloy (e.g., alloy 46), glass, ceramic, or any combination thereof. Fig.10a The first embodiment 110a is also shown to have one or more positioning features 111, such as Fig.11a and Fig.11b The confining pin 111a in the embodiment of the present invention, or Fig.11c and Fig.11d The positioning feature 111 is located at the edge 1156 of the substrate 115 and is used to guide the reconstruction panel 290 to be installed to a predetermined position on the panel carrier 114. The positioning feature 111 has an inner side 1112 facing inwardly toward the release hole 116.

[0108] Fig.10b A cross-sectional view of a second embodiment 110b of the solder ball fixture 110 is shown. The second embodiment 110b has a similar structure to the first embodiment 110a. However, compared to the first embodiment 110a, the second embodiment 110b further has one or more magnetic pins 118 corresponding to the anti-warping device 210 in the reconstructed panel 290. In a preferred embodiment, the magnetic pins 118 have a top surface 119 exposed from the upper surface 1152 of the substrate 115. Therefore, the magnetic pins 118 can be used to guide the reconstructed panel 290 to be installed on the panel carrier 114 so that the anti-warping device 210 is aligned with the magnetic pins 118. In one embodiment, the top surface 119 of the magnetic pins 118 is coplanar with the upper surface 1152 of the substrate 115. The magnetic pins 118 can be made of any magnetic material, so as to generate a magnetic force between the magnetic pins 118 and the anti-warping device 210. Therefore, in the second embodiment 110b, both the positioning features 111 and the magnetic pins 118 can be used to guide the reconstructed panel 290 to be installed at a predetermined position on the panel carrier 114. For example, the positioning features 111 can first provide a rough guide; then, the anti-warping device 210 is aligned with the magnetic pins 118, respectively, so that the magnetic pins 118 can provide precise guidance.

[0109] Fig.10c A top view of a second embodiment 110b of the solder ball fixture 110 is shown. The release hole 116 is formed at a periphery 1154 of the substrate 115. The magnetic pins 118 are disposed at an edge 1156 of the substrate 115 and are adjacent to the positioning features 111. In a preferred embodiment, the positioning features 111, the release hole 116, and the magnetic pins 118 are disposed on the substrate 115 in a symmetrical manner. Fig.10d An enlarged view of the panel carrier 114 is shown, with the locating features 111 and the edges 1156 being shown for ease of illustration. Fig.10c The section AA (shown by the dashed line) in FIG. 1 is imaginarily removed. The ejector pin 113 and the release hole 116 have complementary structures so that the ejector pin 113 can be inserted into the release hole 116. For example, Fig.10dAs shown, the push rod 113 has a rod-like configuration that is complementary to the hollow cylindrical configuration of the release hole 116. It should be understood that the push rod 113 and the release hole 116 may also have other complementary configurations, which are also within the scope of the present disclosure.

[0110] Figures 11a to 11n Step S14 of method S10 is shown, where the reconstitution panel 290 is mounted on the solder ball fixture 110 . Fig.11a A cross-sectional view of the first embodiment 110a of the solder ball fixture 110 is shown in which the reconstruction panel 290 is placed and mounted face-up, i.e., the back side 2404 of the mold panel 240 is in contact with the upper surface 1152 of the substrate 115; and the circuit layer 270 of the reconstruction panel 290 faces away from the substrate 115. In the first embodiment 110a, the anti-warpage device 210 includes a dummy die 210a (e.g., a silicon block) surrounding the semiconductor die 200, so that the gravity of the dummy die 210a (e.g., a silicon block) can balance the semiconductor die 200 to prevent the reconstruction panel 290 from warping. In a preferred embodiment, the dummy die 210a has a size comparable to that of the semiconductor die 200. In a more preferred embodiment, the dummy die 210a has the same size as that of the semiconductor die 200. In addition, the first embodiment 110a has a stop pin 111a as a positioning feature 111, which is used to guide the reconstruction panel 290 to be installed at a predetermined position on the panel carrier 114. Specifically, the reconstruction panel 290 is installed between the stop pins 111a, and there may be a distance 1114 between the inner side 1112 of the stop pin 111a and the reconstruction panel side 2909 of the reconstruction panel 290. Fig.11a As shown, the height of the limiting pin 111 a is smaller than the thickness of the reconstruction panel 290 , so as to facilitate the installation of the reconstruction panel 290 on the panel carrier 114 .

[0111] like Fig.11a As described in Fig.11bA cross-sectional view of a second embodiment 110b of a solder ball fixture 110 in which a reconstruction panel 290 is mounted face-up is shown. In the second embodiment 110b, the anti-warpage device 210 includes a metal pad 210b surrounding the semiconductor die 200, so that the magnetic force between the anti-warpage device 210 and the magnetic pins 118 will balance the semiconductor die 200 to prevent the reconstruction panel 290 from warping. Preferably, the reconstruction panel 290 is aligned with the panel carrier 114, so that the anti-warpage device 210 and the magnetic pins 118 correspond to each other to maximize the magnetic force between the two. The metal pad 210b can be made of any material that can generate a magnetic force with the magnetic pins 118. In a preferred embodiment, the metal pad 210b includes an alloy material with a lower coefficient of thermal expansion (CTE) to match the molding material forming the molding layer 242. For example, the metal gasket 210b may be made of alloy 46, whose coefficient of thermal expansion (CTE) is in the range of 7 to 11 ppm / °C; more preferably, its coefficient of thermal expansion (CTE) is about 7.8 ppm / °C; and the molding layer 242 is made of molding material G730, whose coefficient of thermal expansion (CTE) is about 7.0 ppm / °C. Therefore, during the heating and cooling of the molding process, the metal gasket 210b will not produce an out-of-tolerance offset in the molding layer 242. In another embodiment, if the circuit layer 270 is also made of copper (Cu), the metal gasket 210b may also include copper (Cu). Similarly, the second embodiment 110b may also use a limit pin 111a as a positioning feature 111 for guiding the reconstruction panel 290 to be installed to a predetermined position on the panel carrier 114, and the inner side 1112 of the limit pin 111a has the distance 1114 from the reconstruction panel side 2909 of the reconstruction panel 290. Similarly, Fig.11b It is also shown in the figure that the height of the limiting pin 111 a is smaller than the thickness of the reconstruction panel 290 , so as to facilitate the installation of the reconstruction panel 290 on the panel carrier 114 .

[0112] Similar to Fig.11a , Fig.11c The cross-sectional view of the reconstruction panel 290 mounted on the first embodiment 110a of the solder ball fixture 110 is shown, except that reference pins 111b are used here instead of the stop pins 111a as the positioning features 111. Unlike the stop pins 111a, the inner side 1112 of the reference pins 111b contacts the reconstruction panel side 2909 of the reconstruction panel 290. Fig.11b resemblance, Fig.11d 2 shows a cross-sectional view of a reconstruction panel side 2909 of the reconstruction panel 290. The reconstruction panel 290 is mounted on the second embodiment 110b of the solder ball fixture 110, except that the reference pin 111b is used as the positioning feature 111, and its inner side 1112 contacts the reconstruction panel side 2909 of the reconstruction panel 290. For the first embodiment 110a and the second embodiment 110b (such as Fig.11c and Fig.11d As shown in FIG. 1 , the solder ball fixture 110 may have a reference pin 111b at any edge 1156 of the substrate 115. Similar to the stop pin 111a, the height of the reference pin 111b is also less than the thickness of the reconstruction panel 290, so that the reconstruction panel 290 can be easily mounted on the panel carrier 114. For ease of description, the positioning feature 111 (such as the stop pin 111a or the reference pin 111b) will not be marked in the following figures.

[0113] Fig.11e FIG. 1 shows a cross-sectional view of a third embodiment 110c of the solder ball fixture 110. The third embodiment 110c is similar to the second embodiment 110b, except that Fig.11e The magnetic needle 118 is embedded in the substrate 115. Therefore, the magnetic force between the magnetic needle 118 and the metal gasket 210b of the third embodiment 110c is weaker than that of the Fig.11b The second embodiment 110b is shown, so that the reconstitution panel 290 can be more easily separated from the third embodiment 110c in the release station 170. The depth 1192 of the magnetic needle 118 is measured from the top surface 119 of the magnetic needle 118 to the upper surface 1152 of the substrate 115. The greater the depth 1192, the weaker the magnetic force between the magnetic needle 118 and the metal pad 210b. Therefore, the magnetic force can be conveniently controlled and adjusted by changing the depth 1192.

[0114] Fig.11f A cross-sectional view of a fourth embodiment 110d of the solder ball fixture 110 is shown, wherein both the first magnetic pin 1181 and the second magnetic pin 1182 are embedded within the substrate 115. Similarly, the first depth 1194 of the first magnetic pin 1181 is measured between the top surface 119 of the first magnetic pin 1181 and the upper surface 1152 of the substrate 115; and the second depth 1196 of the second magnetic pin 1182 is measured between the top surface 119 of the second magnetic pin 1182 and the upper surface 1152 of the substrate 115. If the first depth 1194 is less than the second depth 1196, the magnetic force between the metal pad 210b and the first magnetic pin 1181 is stronger than the magnetic force between the metal pad 210b and the second magnetic pin 1182. Therefore, the magnetic force can be controlled along the panel carrier 114 to better prevent warping of the reconstructed panel 290. For example, if more semiconductor dies 200 are bonded near one side of the first carrier 220 (e.g., the area around the first magnetic needle 1181), the warping of this side will be more serious, so a stronger magnetic force should be generated on this side to prevent more serious warping. For example, the magnetic needle 118 can be used at a first depth 1194 below the upper surface 1152 of the substrate 115; or Fig.11bIn the second embodiment 110b shown, the magnetic needles 118 are exposed from the upper surface 1152 of the substrate 115 to make the magnetic force strongest.

[0115] Figure 11g to Figure 11n Four embodiments of the magnetic needle 118 are shown. Figure 11g and Fig.11h A top view and a cross-sectional view of the first embodiment 118a are shown. The first embodiment 118a has a solid cylindrical configuration and can be made of any magnetic material, such as a cobalt magnet. Figure 11g It is shown that in the first embodiment 118a, the north pole (N) is located at the upper surface 1152 of the substrate 115; Fig.11h The south pole (S) is shown opposite the north pole (N). Fig.11i and Fig.11j A top view and a cross-sectional view of a second embodiment 118b are shown, which also has a north pole (N) and a south pole (S). The second embodiment 118b has a core 1182 and a base 1184, wherein the core 1182 has a cylindrical structure and the base 1184 has a hollow cylindrical structure surrounding the core 1182. The core 1182 can be made of any magnetic material, such as a rare earth magnet. The base 1184 can be made of structural steel such as SUM24L to provide structural support for the core 1182. In addition, the second embodiment 118b can also have a rear cavity 1186 as a screw hole for fastening the magnetic needle 118 to the substrate 115.

[0116] Figure 11k and Figure 11l A top view and a cross-sectional view of a third embodiment 118c are shown, which also has a north pole (N) and a south pole (S). In addition to the core 1182 and the base 1184, the third embodiment 118c also has a front cavity 1188 located between the core 1182 and the base 1184. The core 1182 can be made of any magnetic material, such as a cobalt magnet; and the base 1184 can be made of structural steel such as SUM24L to provide structural support for the core 1182. The front cavity 1188 surrounds the core 1182 to confine the magnetic force within the core 1182 and does not extend to the base 1184.

[0117] Figure 11m and Figure 11nA top view and a cross-sectional view of a fourth embodiment 118d are shown, which also has a north pole (N) and a south pole (S). The fourth embodiment 118d has a structure similar to the third embodiment 118c. However, the fourth embodiment 118d has a sandwich portion 1189 between the core 1182 and the base 1184, instead of the front cavity 1188 of the third embodiment 118c. Similarly, the core 1182 can be made of any magnetic material, such as a cobalt magnet or an aluminum nickel cobalt magnet (Alnico magnet); the base 1184 can be made of structural steel such as SUM24L to provide structural support for the core 1182. The sandwich portion 1189 has a similar function to the front cavity 1188, which is used to limit the magnetic force. The sandwich portion 1189 is made of a non-magnetic material, including copper, zinc or a composite thereof, such as brass. Since the interlayer portion 1189 has a stronger magnetic resistance than the front cavity 1188, the fourth embodiment 118d can strengthen the restriction of the magnetic force, thereby providing the anti-warping device 210 with a stronger magnetic force than the third embodiment 118c having the front cavity 1188. In addition, the four embodiments 118a to 118d can all have a surface treatment layer (not shown) such as chemical nickel plating at the upper surface 1152 of the north pole (N) of the substrate 115 to achieve the purpose of rust prevention. It should be understood that the four embodiments 118a to 118d are only exemplary, and all other variations are within the scope of the present disclosure.

[0118] The reconstruction panel 290 should be mounted as accurately as possible to its designed position on the solder ball fixture 110 by any possible means. For example, as described above, the positioning feature 111 (such as the stop pin 111a or the reference pin 111b), or the top surface 119 of the magnetic pin 118 exposed from the substrate 115, or a combination of the two can be used to provide the guidance. For another example, the substrate 115 has the same shape as the reconstruction panel 290, and the size of the substrate 115 is only slightly larger than the size of the reconstruction panel 290, so that the reconstruction panel 290 cannot be mounted in other positions other than its designed position on the substrate 115. It should be understood that other ways of positioning the reconstruction panel 290 to its designed position on the substrate 115 are also within the scope of the present disclosure.

[0119] Figures 12a to 12i The step S16 of the method S10 is shown to be performed using the solder ball attachment system 100, where the solder balls 292 are attached to the reconstructed panel 290. In order to simplify the description of step S16, only the first embodiment 110a of the solder ball fixture 110 is shown here. However, it should be understood that the following description is also applicable to the second embodiment 110b of the solder ball fixture 110. Here, the platform 112 of the solder ball fixture 110 is also not shown.

[0120] Fig.12aA cross-sectional view of a reconstructed panel 290 in a soldering station 120 of a solder ball attachment system 100 is shown, where flux 294 is applied (as indicated by arrows). The flux 294 will remain at the top surface 2762 of the pillar 276. The application of the flux 294 can be performed by any known technique, such as flux printing. It is noteworthy that the application of the flux 294 can be controlled according to the pillar pattern of the pillar 276. The pillar pattern is a portion of the circuit pattern of the circuit layer 270, which can vary according to the design of a specific IC chip and the location where the solder ball 292 is required to be placed to form an electrical connection with an external device (e.g., a PCB). The top surface 2762 of the pillar 276 can be used as an Under Bump Metallization contact pad for manufacturing a BGA semiconductor package. Then, the reconstituted panel 290 and the solder ball fixture 110 are transferred by the transfer device 190 to the placement station 130 of the solder ball attachment system 100 for placing the solder balls 292 onto the solder flux 294 at the pillar top surface 2762 of the pillar 276, as shown in FIG. Figure 12b As shown in the cross-sectional view of . Since the solder ball 292 and the flux 294 have chemical affinity, the solder ball 292 can be more firmly attached to the reconstructed panel 290 by applying the flux 294. Accordingly, the placement of the solder ball 292 can also be controlled according to the pillar pattern of the pillar 276.

[0121] The transfer device 190 may then transfer the reconstituted panel 290 to the inspection station 140 to inspect whether the solder balls 292 are properly placed at the pillar top surfaces 2762 of the pillars 276 . Fig.12c A cross-sectional view of the reconstructed panel 290 and solder balls 292 is shown. Any anomalies of the solder balls 292 will be corrected in the inspection station 140. For example, if a particular solder ball 292 is offset from the pillar top surface 2762 of the pillar 276, it will be adjusted to the correct position. If a particular solder ball 292 is missing, it will be manually or automatically placed at the pillar top surface 276 of the pillar 276 (e.g., Fig.12c If a particular solder ball 292 is excessive, it may be removed from the reconstituted panel 290. Fig.12d Shows Fig.12c The enlarged cross-sectional view of the dashed square in the middle shows that the solder ball 292 remains at the pillar top surface 2762 of the pillar 276 together with the flux 294. Specifically, the bottom 2922 of the solder ball 292 still maintains a spherical configuration.

[0122] After inspection and possible correction, the conveyor 190 conveys the reconstituted panel 290 with the solder balls 292 to the reflow station 150 for reflow (ie, melting and fusing) of the solder balls 292 at the pillar top surfaces 2762 of the pillars 276 at high temperature. Fig.12e A cross-sectional view of a reconstituted panel 290 with solder balls 292 after reflow is shown. Fig.12f Shows Fig.12e . The figure shows that the bottom 2922 of the solder ball 292 melts and fuses with the pillar top surface 2762 of the pillar 276. Finally, after cooling from the reflow high temperature, the reconstructed panel 290 is transferred by the conveyor 190 to the cleaning station 160, and the residual solder flux 294 can be removed from the reconstructed panel 290. Optionally, the reconstructed panel 290 is subjected to a final inspection in the cleaning station 160. However, compared with the inspection performed in the inspection station 140, any abnormal conditions of the solder ball 292 cannot be corrected in the final inspection of the cleaning station 160. Figure 12g A cross-sectional view of reconstituted panel 290 with reflowed solder balls 292 is shown after cleaning and final inspection at cleaning station 160 . Figure 12h Shows Figure 12g 27. The figure shows that the residual flux 294 is removed from around the solder ball 292 at the top surface 2762 of the pillar 276.

[0123] Fig.12i Shown in Figure 8b 2 is a cross-sectional view of solder balls 292 formed on an alternative embodiment of a reconstructed panel 290. During the reflow process, the bottom 2922 of the solder balls 292 first melts and flows into the cavity 282 (as shown in the dashed rectangle); and then fuses at the pillar top surface 2762 of the pillar 276. Therefore, the solder balls 292 can be more firmly fixed at the pillar 276 and will not shift or be lost at the reconstructed panel 290, which will significantly enhance the reliability of the fan-out or fan-in semiconductor package connected to an external device (such as a PCB).

[0124] Then, the reconstructed panel 290 having the solder balls 292 is transferred to the releasing station 170 by the transfer device 190 . Figures 13a to 13c The step S18 of method S10 performed using the solder ball attach system 100 is shown to release the reconstituted panel 290 and the solder balls 292 from the solder ball fixture 110 . Fig.13aA cross-sectional view of releasing the reconstructed panel 290 and the solder balls 292 by the solder ball fixture 110 and the vacuum assembly 172 is shown. The solder ball fixture 110 and the vacuum assembly 172 work together to release the reconstructed panel 290. The solder ball fixture 110 has a push rod motor 117 for driving the push rod 113 to move upward through the release hole 116 until the push rod 113 contacts the back side 2404 of the mold panel 240. Then, the push rod motor 117 further drives the push rod 113 to move upward, pushing the reconstructed panel 290 upward from the back side 2404 of the mold panel 240; at this time, the panel carrier 114 of the solder ball fixture 110 is fixed and remains stationary. At the same time, the vacuum assembly 172 also uses the vacuum force to move the reconstructed panel 290 upward to separate it from the panel carrier 114. In this way, the reconstructed panel 290 with the solder balls 292 is separated from the solder ball fixture 110. Preferably, the solder ball fixture 110 pushes the reconstruction panel 290 upward, and the vacuum assembly 172 also pulls the reconstruction panel 290 upward at the same speed, so that the reconstruction panel 290 with the solder balls 292 can be better separated from the solder ball fixture 110 .

[0125] Fig.13b The cross-sectional view shows that the reconstructed panel 290 with solder balls 292 is completely released from the solder ball fixture 110 and is held by the vacuum assembly 172. At this time, the ejector motor 117 drives the ejector 113 to move downward, so that the solder ball fixture 110 returns to the waiting position to receive a new reconstructed panel, and then repeats the above process. Fig.13c A cross-sectional view of the vacuum assembly 172 moving the reconstructed panel 290 with solder balls 292 to the transfer station 180 and transferring the reconstructed panel 290 with solder balls 292 to the wafer ring 182 with the dicing tape 184 is shown. After the vacuum force is turned off, the vacuum assembly 172 will no longer hold the reconstructed panel 290. At this point, the reconstructed panel 290 with solder balls 292 will be placed onto the dicing tape 184 of the wafer ring 182. The vacuum assembly 172 will then move back to the release station 170 to pull and hold the new reconstructed panel 290.

[0126] Figures 14a to 14c The step S20 of method S10 is shown to be performed using the solder ball attach system 100 to separate the reconstituted panel 290 and the solder balls 292 into individual semiconductor packages 300 . Fig.14a Wafer ring 182 is shown with dicing tape 184 securing reconstructed panel 290 and solder balls 292. Dicing tape 184 has suitable strength or adhesiveness to secure reconstructed panel 290 and discrete semiconductor packages 300 during singulation. Fig.14bA top view of a reconstructed panel 290 and solder balls 292 are shown with dicing tape 184 and wafer ring 182 securing the reconstructed panel 290. Also shown are circuit outlines 278 that may indicate where to separate the reconstructed panel 290 into individual semiconductor packages.

[0127] The dicing tape 184 may be any tape suitable for holding and fixing the reconstructed panel 290 during singulation and for releasing the discrete semiconductor packages 300 after singulation. In some embodiments, the dicing tape 184 may be an ultraviolet (UV) tape that loses the strength or adhesiveness required for fixing under ultraviolet light. Therefore, the discrete semiconductor packages 300 may be separated from the dicing tape 184 by exposing the dicing tape 184 to ultraviolet light after singulation. Fig.14c 1 shows a cross-sectional view of an embodiment of the UV tape, namely, a UV curable tape 186. The UV curable tape 186 has a sandwich structure consisting of a base film 1862, an adhesive layer 1864, and a polymer film 1866. Optionally, the base film 1862 is a polyolefin film; the adhesive layer 1864 can be an acrylic UV curable layer; and the polymer film 1866 can be a polyester film. Therefore, when the acrylic UV curable layer as the adhesive layer 1864 will lose its adhesiveness under UV light, the discrete semiconductor package 300 formed after the division can be easily released.

[0128] Figures 15a to 15c Continuing with step S20 of S10 , the reconstructed panel 290 and the solder balls 292 are divided into individual semiconductor packages 300 . Fig.15a A cross-sectional view of a saw blade 310 being used to perform a segmentation along a saw street 312 is shown. The discrete semiconductor package 300 includes one or more semiconductor dies 200 encapsulated in a molded panel 240, a circuit layer 270 encapsulated in a dielectric layer 280, and solder balls 292 for electrically connecting to external devices such as a PCB. Therefore, the semiconductor die 200 is electrically led out to an external device such as a PCB through the filled hole 2005, the circuit layer 270 (including a redistribution layer (RDL) 272 and a pillar layer 274), and the solder balls 292. If the discrete semiconductor package 300 includes two or more semiconductor dies 200, the circuit layer 270 will electrically couple the two or more semiconductor dies 200 for transmission of internal signals. Therefore, the discrete semiconductor package 300 can be used as a multi-chip module (MCM). For example, a multi-chip module (MCM) in Fig.15a As shown in the dashed rectangle, two semiconductor dies 200 are included.

[0129] Fig.15bAn enlarged cross-sectional view of the separation of the reconstructed panel 290 and the solder balls 292 into discrete semiconductor packages 300 on the dicing tape 184 is shown. The dicing tape 184 has a total thickness 1842. Optionally, the total thickness 1842 is about 150 microns (μm). During the separation, the saw blade 310 will only cut the top thickness 1844 of the dicing tape 184, which can ensure that the reconstructed panel 290 is completely separated; while the remaining dicing tape 184 still has sufficient strength to temporarily fix the discrete semiconductor packages 300. Preferably, the top thickness 1844 is about one-third of the total thickness 1842 of the dicing tape 184. Therefore, when the total thickness 1842 of the dicing tape 184 is 150 microns (μm), about 50 microns (μm) of the top thickness 1844 will be cut off during the cutting process.

[0130] Fig.15c A top view of the reconstructed panel 290 with solder balls 292 being singulated by a saw blade 310 along saw streets 312 into individual semiconductor packages 300 as described above is shown. The warpage prevention device 210 may also be singulated and then separated from the dicing tape 184 for recycling. Fig.15a The multi-chip module (MCM) comprising two semiconductor bare chips 200 is described in Fig.15c Shown in dashed rectangle.

[0131] Fig.16a and Fig.16b Another embodiment of step S14 is shown. Fig.16a Shows something like Fig.11a , but a dummy die 210a is used here to prevent warping. In addition to the dummy die 210a, a double-sided tape 296 can be applied between the reconstruction panel 290 and the substrate 115 to provide adhesion, thereby further minimizing or even eliminating warping of the reconstruction panel 290 during the attachment of the solder balls 292. Fig.16b A cross-sectional view showing that the reconstructed panel 290 and the solder balls 292 can still be released by driving the ejector pins 113 through the release holes 116. Because the double-sided tape 296 is flexible, it does not resist the upward movement of the ejector pins 113 to push the reconstructed panel 290 away from the panel carrier 114. The double-sided tape 296 loses its adhesiveness under certain conditions (e.g., higher temperatures, or exposure to ultraviolet (UV) light, or a combination thereof), so that the reconstructed panel 290 can be peeled off the double-sided tape 296. For example, the double-sided tape 296 can be a high bump tape, a high temperature tape, a UV tape, or any combination thereof. Alternatively, a temporary adhesive coating such as adhesive waxes can also be used instead of the double-sided tape 296. Under certain specific conditions, the temporary adhesive coating can also lose its adhesiveness, thereby releasing the reconstructed panel 290 with the solder balls 292.

[0132] Fig.17a and Fig.17b Another embodiment of step S14 is shown. Fig.17a Shows something like Fig.11b , wherein a metal gasket 210b is used to prevent warping. Similarly, in addition to the magnetic force between the metal gasket 210b and the magnetic pins 118, a double-sided tape 296 may be applied between the reconstruction panel 290 and the substrate 115 to provide adhesion, thereby further reducing or even eliminating the warping of the reconstruction panel 290 during the attachment of the solder balls 292. Fig.17b A cross-sectional view showing that the reconstructed panel 290 and the solder balls 292 can still be released by driving the ejector pins 113 through the release holes 116. As described above, since the double-sided tape 296 is flexible, it does not resist the upward movement of the ejector pins 113, thereby pushing the reconstructed panel 290 away from the panel carrier 114. As described above, under certain conditions, the double-sided tape 296 loses its adhesiveness, thereby releasing the reconstructed panel 290 with the solder balls 292.

[0133] Fig.18a and Fig.18b Possible combinations of the embodiments shown above are shown. Fig.18a Shows the combination Fig.11a and Fig.11b In the cross-sectional view of the illustrated embodiment, the reconstructed panel 290 includes a dummy die 210 a and a metal pad 210 b , thereby preventing warping by gravity from the dummy die 210 a and magnetic force from between the metal pad 210 b and the magnetic pins 118 . Fig.18b Shows the combination Fig.16a and Fig.17a A cross-sectional view of the embodiment shown, in which the reconstruction panel 290 includes the dummy die 210a and the metal pad 210b, is also applied with double-sided tape 296 (or a temporary adhesive coating) so that warping can be further prevented by adhesive force in addition to the gravity from the dummy die 210a and the magnetic force between the metal pad 210b and the magnetic pin 118. It should be understood that other combinations or variations for preventing warping of the reconstruction panel 290 are also within the scope of the present disclosure.

[0134] Figures 19a to 19e The solder flux 294 is shown applied to Fig.12a The process of reconstructing panel 290 in FIG. Fig.19a and 19bA cross-sectional view and a top view of a soldering station 120 having a soldering mask 298 are shown, and the soldering mask 298 can be placed on the circuit layer 270 of the reconstructed panel 290. The soldering mask 298 has mask openings 2982, which correspond to the exposed pillar top surfaces 2762 of the pillars 276. In other words, the pillar top surfaces 2762 of the pillars 276 are exposed from the soldering mask 298 through the mask openings 2982. Alternatively, the soldering mask 298 can also be suspended above the reconstructed panel 290 at a predetermined height to facilitate the flux 294 to flow through the mask openings 2982 of the soldering mask 298. Therefore, the soldering mask 298 has a mask opening pattern 2984 (as shown by the dashed squares), which can be derived from the pillar pattern of the pillars 276. The soldering station 120 can have a fixing mechanism for fixing the soldering mask 298 on the reconstructed panel 290 or suspending it above it. Optionally, the fixing mechanism is a clip.

[0135] Fig.19c A cross-sectional view of flux 294 being applied to reconstructed panel 290 through flux mask 298 is shown. Thus, flux 294 can flow through mask openings 2982 and onto pillar top surfaces 2762 of pillars 276. The soldering station 120 can have a flux applicator 295, such as a scraper, for squeezing flux 294 onto reconstructed panel 290. Fig.19d A cross-sectional view is shown where flux 294 fills the mask opening 2982 of the solder mask 298 and then remains at the pillar top surface 2762 of the pillar 276 . Fig.19e 2982 of the solder mask 298. After the solder mask 298 is removed from the reconstructed panel 290, the solder flux 294 still remains at the pillar top surface 2762 of the pillar 276. Then, the solder ball 292 is reflowed together with the solder flux 294 at the pillar top surface 2762 of the pillar 276, as shown in FIG. Fig.19e shown.

[0136] The present disclosure may be implemented in other specific forms without departing from the spirit or essential characteristics of the present disclosure. Therefore, the foregoing embodiments are considered to be illustrative in all respects and not intended to limit the present disclosure. Therefore, the scope of the present disclosure is described by the appended claims rather than the foregoing description, and all changes within the meaning and scope of the claims are included in the present disclosure. In this application, unless otherwise stated, the terms "comprises", "including" and their grammatical variants are intended to represent "open" or "comprising" language, such that they include the listed elements, but also allow for the inclusion of additional, non-explicitly recited elements.

Claims

1. A solder ball fixture for preventing warping of a reconstructed panel in a panel-level semiconductor process, comprising: A platform having at least one jack; as well as a panel carrier configured to be coupled to the platform for carrying and fixing a reconstructed panel having a plurality of semiconductor dies and an anti-warping device, the panel carrier further comprising a substrate and at least one release hole, the at least one release hole penetrating the substrate, The at least one ejector pin is configured to pass through the at least one release hole to release the reconstructed panel from the solder ball fixture.

2. The solder ball fixture according to claim 1, wherein: The panel carrier further includes a plurality of magnetic pins located at a periphery of the substrate for providing magnetic force to the anti-warping device in the reconstructed panel.

3. The solder ball fixture according to claim 2, wherein: The magnetic needles are exposed from the substrate.

4. The solder ball fixture according to claim 2, wherein: The magnetic needles are embedded in the substrate.

5. The solder ball fixture according to claim 1, wherein: Also includes: A double-sided tape may be applied to the substrate to provide adhesion to counteract warping of the reconstructed panel.

6. The solder ball fixture according to claim 1, wherein: Also includes: A positioning feature is used to align the reconstituted panel with the panel carrier of the solder ball fixture.

7. The solder ball fixture according to claim 6, wherein: The positioning feature includes one or more stop pins, wherein the stop pins are spaced a distance from the reconstruction panel.

8. The solder ball fixture according to claim 6, wherein: The locating feature includes a datum pin that contacts the reconstruction panel.

9. A solder ball attachment system for preventing warping of a reconstructed panel in a panel-level semiconductor process, comprising: A solder ball fixture as claimed in claim 1; a soldering station for applying soldering flux to the reconstructed panel; a placement station for placing the solder balls onto the flux and reconstituted panel; an inspection station for inspecting solder balls on the reconstructed panel; a reflow station for reflowing solder balls on the reconstructed panel; a cleaning station for removing solder flux from the reconstructed panel; a release station for releasing the reconstituted panel and solder balls from the solder ball fixture; as well as A conveying device is used to convey the reconstructed panel on the solder ball fixture between the soldering station, the placement station, the inspection station, the reflow station, the cleaning station and the release station.

10. The solder ball attach system of claim 9, wherein: Also includes: A transfer station is used to transfer the reconstituted panel and solder balls from the solder ball fixture to a wafer ring and dicing tape.

Images