Pressure sensor, pressure sensing device and electronic equipment

Abstract

The embodiment of the utility model discloses a pressure sensor, a pressure sensing device and electronic equipment, relates to the technical field of micro-electronic machinery, and can enable the size of the pressure sensor to be smaller and facilitate device integration. The pressure sensor comprises a first substrate structure and a second substrate structure. The first substrate structure comprises a pressure-sensitive layer and a plurality of pressure-sensitive resistors; one part of the pressure-sensitive layer is used for sensing pressure change; the plurality of varistors are configured to generate an electrical signal based on a change in pressure sensed by the pressure sensitive layer. The second substrate structure includes a readout integrated circuit coupled to the plurality of varistors, the readout integrated circuit being at least configured to process electrical signals generated by the plurality of varistors. The pressure sensor provided by some embodiments of the utility model is used for measuring pressure, can reduce the interference of an external environment on a transmission path, and has the advantages of large usable area of a circuit, high reliability and good stability.

Description

Technical Field

[0001] The present disclosure relates to the field of micro-electronic mechanical technology, and in particular to a pressure sensor, a pressure sensing device and an electronic device. Background Art

[0002] Micro-Electro-Mechanical System (MEMS) pressure sensors are micro devices with pressure detection capabilities made through MEMS technology. They are mainly divided into three categories: piezoresistive, capacitive, and resonant. They can be used in consumer electronics, industrial production, and other fields. Among them, piezoresistive MEMS pressure sensors have the advantages of small size, light weight, simple structure, low cost, and high measurement accuracy, so they have been widely used.

[0003] In order to facilitate 3D packaging of a pressure sensor and an integrated circuit, the utility model provides a pressure sensor with a smaller volume. Utility Model Content

[0004] Some embodiments of the present disclosure provide a pressure sensor, a pressure sensing device, and an electronic device, which can make the volume of the pressure sensor smaller.

[0005] To achieve the above objectives, some embodiments of the present disclosure provide the following technical solutions:

[0006] In a first aspect, a pressure sensor is provided. The pressure sensor includes a first substrate structure and a second substrate structure. The first substrate structure includes a pressure-sensitive layer and a plurality of piezoresistors disposed on one side of the pressure-sensitive layer; a portion of the pressure-sensitive layer is used to sense pressure changes; and the plurality of piezoresistors are configured to generate electrical signals based on pressure changes sensed by the pressure-sensitive layer. The second substrate structure is located on one side of the first substrate structure and is connected to the first substrate structure; the second substrate structure includes a readout integrated circuit coupled to the plurality of piezoresistors, and the readout integrated circuit is at least configured to process electrical signals generated by the plurality of piezoresistors.

[0007] In the pressure sensor provided by some embodiments of the present disclosure, the first substrate structure includes a pressure-sensitive layer and a plurality of piezoresistors, and the second substrate structure includes a read-out integrated circuit. Therefore, the pressure-sensitive layer, the plurality of piezoresistors and the read-out integrated circuit can be distributed on both sides of the pressure sensor. In this way, compared with the situation where the pressure-sensitive layer, the plurality of piezoresistors and the read-out integrated circuit are all arranged on one side of the pressure sensor, the volume of the pressure sensor can be made smaller, which is beneficial to the 3D packaging of the pressure sensor and an external integrated circuit.

[0008] Optionally, the second substrate structure further includes a second liner, a first insulating layer, a plurality of second conductive bumps and a plurality of conductive pillars. The readout integrated circuit is integrated inside the second liner. The first insulating layer is disposed on a surface of the second liner close to the first substrate structure. The plurality of second conductive bumps penetrate the first insulating layer. The plurality of conductive pillars penetrate the second liner and are insulated from the second liner; at least a portion of the plurality of conductive pillars are in corresponding contact with a portion of the plurality of second conductive bumps.

[0009] Optionally, the varistor layer includes a first liner and a buried oxide layer. The middle portion of the first liner is thinned. The buried oxide layer is disposed on a surface of the first liner close to the second substrate structure; the varistor is disposed on a surface of the buried oxide layer away from the first liner; the first substrate structure further includes a plurality of metal traces and a plurality of first conductive bumps. The plurality of metal traces are disposed on a surface of the buried oxide layer away from the first liner. At least part of the plurality of second conductive bumps are in corresponding contact with the plurality of first conductive bumps.

[0010] Optionally, the area where the piezoresistor is located is opposite to the portion of the piezoresistive layer used for sensing pressure changes.

[0011] Optionally, the plurality of first conductive bumps include first input conductive bumps, the plurality of second conductive bumps include second input conductive bumps, the plurality of conductive pillars include input conductive pillars, and the plurality of varistors and metal traces are coupled to the first input conductive bumps, the second input conductive bumps and the input conductive pillars.

[0012] Optionally, the plurality of first conductive bumps include at least one first output conductive bump; the plurality of second conductive bumps include at least one second output conductive bump; and the plurality of varistors and metal traces are coupled to the input terminal of the readout integrated circuit through the at least one first output conductive bump and the at least one second output conductive bump.

[0013] Optionally, the plurality of conductive pillars include at least one output conductive pillar, and the output terminal of the readout integrated circuit is coupled to the at least one output conductive pillar.

[0014] Optionally, the plurality of first conductive bumps include a first grounding conductive bump; the plurality of second conductive bumps include a second grounding conductive bump; the plurality of conductive pillars include a grounding conductive pillar; the first grounding conductive bump, the second grounding conductive bump and the grounding conductive pillar are coupled. The first grounding conductive bump is also coupled to a plurality of varistors and metal traces; the grounding conductive pillar is also coupled to a ground terminal of a readout integrated circuit.

[0015] Optionally, the second substrate structure further includes a plurality of lead-out structures, which are correspondingly disposed on surfaces of the plurality of conductive pillars away from the first substrate structure and are correspondingly coupled to the plurality of conductive pillars; and the plurality of lead-out structures are insulated from the second substrate.

[0016] Optionally, the pressure sensor further comprises a welding ring, which is located between the buried oxide layer and the opposite surface of the first insulating layer; the varistor, the plurality of metal traces, and the plurality of first conductive bumps are located inside the welding ring and are spaced apart from the welding ring.

[0017] Optionally, the first substrate structure and the second substrate structure are combined to form a vacuum cavity; multiple varistors are located inside the vacuum cavity; or, a through hole is commonly opened in the middle of the second lining and the middle of the first insulating layer; the first substrate structure and the second substrate structure are combined to form a gauge pressure cavity; multiple varistors are located inside the gauge pressure cavity.

[0018] Optionally, when the first substrate structure and the second substrate structure are enclosed to form a gauge pressure cavity, the aperture of the through hole is less than or equal to 100 μm.

[0019] Optionally, when the first substrate structure and the second substrate structure are enclosed to form a vacuum cavity, the pressure sensor further includes a getter sheet located in the vacuum cavity.

[0020] In a second aspect, a pressure sensing device is provided. The pressure sensing device comprises a pressure sensor provided by the above technical solution and a control integrated circuit. The control integrated circuit is coupled to a plurality of piezoresistors and is also coupled to a readout integrated circuit.

[0021] The beneficial effects that can be achieved by the pressure sensing device provided by some embodiments of the present disclosure are the same as the beneficial effects that can be achieved by a pressure sensor provided by the above technical solution, and will not be repeated here.

[0022] In a third aspect, an electronic device is provided, which includes a housing and a pressure sensing device provided by the above technical solution and arranged on the housing.

[0023] The beneficial effects that can be achieved by the electronic devices provided by some embodiments of the present disclosure are the same as the beneficial effects that can be achieved by the pressure sensing device provided by the above technical solution, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The drawings described herein are used to provide a further understanding of the embodiments of the present disclosure and constitute a part of the embodiments of the present disclosure. The illustrative embodiments of the present disclosure and their descriptions are used to explain the present disclosure and do not constitute an improper limitation on the present disclosure. In the drawings:

[0025] Figure 1 A structural diagram of a pressure sensor provided for some embodiments of the present disclosure;

[0026] Figure 2 A structural diagram of a pressure sensor provided for still further embodiments of the present disclosure;

[0027] Figure 3 A structural diagram of a second substrate structure provided for some embodiments of the present disclosure;

[0028] Figure 4 A structural diagram of a first substrate structure provided for some embodiments of the present disclosure;

[0029] Figure 5 A structural diagram of a first substrate structure provided for still further embodiments of the present disclosure;

[0030] Figure 6 A structural diagram of a second substrate structure provided for still further embodiments of the present disclosure;

[0031] Figure 7 A structural diagram of a second substrate structure provided for still further embodiments of the present disclosure;

[0032] Figure 8 A structural diagram of a second substrate structure provided for still further embodiments of the present disclosure;

[0033] Fig. 9 A structural diagram of a first substrate structure provided for still further embodiments of the present disclosure;

[0034] Fig.10 A structural diagram of a pressure sensor provided for still further embodiments of the present disclosure;

[0035] Fig.11 A flow chart of manufacturing a pressure sensor provided for some embodiments of the present disclosure;

[0036] Fig.12 A structural diagram of a pressure sensing device provided for some embodiments of the present disclosure;

[0037] Fig.13 A structural diagram of an electronic device provided for some embodiments of the present disclosure. DETAILED DESCRIPTION

[0038] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in some embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, rather than all the embodiments. Based on the embodiments provided by the present disclosure, all other embodiments obtained by ordinary technicians in this field belong to the scope of protection of the present disclosure.

[0039] Unless the context requires otherwise, throughout the specification and claims, the term "including" is to be interpreted as an open, inclusive meaning, that is, "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiments", "examples" or "some examples" and the like are intended to indicate that specific features, structures, materials or characteristics associated with the embodiment or example are included in at least one embodiment or example of the present disclosure. The schematic representations of the above terms do not necessarily refer to the same embodiment or example. In addition, the specific features, structures, materials or characteristics described may be included in any one or more embodiments or examples in any appropriate manner.

[0040] In the description of the embodiments of the present disclosure, unless otherwise specified, “plurality” means two or more.

[0041] As used herein, "parallel", "perpendicular", and "equal" include the situations described and situations similar to the situations described, and the range of the similar situations is within the acceptable deviation range, wherein the acceptable deviation range is determined by a person of ordinary skill in the art taking into account the measurement in question and the errors associated with the measurement of a particular quantity (i.e., the limitations of the measurement system). For example, "parallel" includes absolute parallelism and approximate parallelism, wherein the acceptable deviation range of approximate parallelism may be, for example, a deviation within 5°; "perpendicular" includes absolute perpendicularity and approximate perpendicularity, wherein the acceptable deviation range of approximate perpendicularity may also be, for example, a deviation within 5°. "Equal" includes absolute equality and approximate equality, wherein the acceptable deviation range of approximate equality may be, for example, the difference between the two equalities is less than or equal to 5% of either one.

[0042] The terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of this application, unless otherwise specified, "plurality" means two or more.

[0043] In the description of the embodiments of the present disclosure, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a direct connection, or an indirect connection through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0044] It should be noted that, in the drawings of the present disclosure, for example, 1 / 2 indicates that structure / line 1 and structure / line 2 can refer to the line. Figure 2 N1 / N in the figure indicates that both the vacuum chamber N1 and the main chamber N can be represented by this structure. Other similar reference numerals appearing in the drawings also follow the above description.

[0045] In some examples, the piezoresistive MEMS pressure sensor includes a pressure-sensitive film (also called a strain film), a piezoresistor and a circuit structure, and the piezoresistor and the circuit structure are coupled. The working principle of the piezoresistive MEMS pressure sensor can be: by preparing a piezoresistor on the strain film, the strain film deforms under the action of external pressure and generates stress, the piezoresistor changes resistance under the action of stress, and finally the resistance change is converted into a voltage output through an interconnection structure (such as a Wheatstone bridge), so the magnitude of the external pressure can be reflected by the voltage output value.

[0046] In some implementations, the piezoresistive MEMS pressure sensor is a monolithic integrated structure, specifically including an SOI silicon wafer and a glass substrate. Among them, the SOI silicon wafer includes a silicon strain film. The silicon strain film is provided with a signal conditioning circuit, a varistor, a metal lead, a first pressure welding block and a first sealing ring. There are a cavity, a second pressure welding block and a second sealing ring on the glass substrate. The cavity is located between the glass substrate and the silicon strain film, and the cavity is sealed by the contact between the first sealing ring and the second sealing ring and the first pressure welding block and the second pressure welding block. The specific preparation method is: prepare a signal conditioning circuit, a varistor, a metal lead, a first pressure welding block and a first sealing ring on the SOI silicon wafer; then etch the cavity on the glass substrate to prepare a second pressure welding block and a second sealing ring; finally, the processed SOI silicon wafer is bonded to the glass substrate by aligning and bonding the first sealing ring and the second sealing ring. Based on the above structure, the pressure sensor can achieve three-dimensional packaging, which reduces the packaging difficulty to a certain extent and improves the integration. However, it is worth noting that in the above-mentioned pressure sensor, the signal conditioning circuit, the varistor, and the metal leads are all made on the same layer of the SOI silicon wafer, which makes the pressure sensor larger and the available area of ​​the signal conditioning circuit smaller.

[0047] In other implementations, the pressure sensor includes a silicon base and a pressure sensor, and a silicon piezoresistive strip (with the same function as a varistor) is arranged on the surface of the pressure sensor close to the silicon base, and the pressure sensor is flip-chip bonded to the silicon base. The pressure sensor replaces the traditional borophosphosilicate glass substrate with a silicon base, and adopts flip-chip welding technology and bonding technology to achieve the airtight vacuum packaging of the pressure sensor. Compared with the traditional packaging structure using silicon glass electrostatic bonding technology, metal wire bonding technology, metal isolation film technology and closed cavity silicone oil filling technology, the pressure sensor eliminates the filling of silicone oil and metal isolation film, which is beneficial to improve the sensitivity of the pressure sensor and can also be used for dynamic pressure detection. However, it is worth noting that in the above-mentioned pressure sensor, the circuit part of the sensor and the silicon piezoresistive strip are all arranged on the pressure sensor, which makes the volume of the pressure sensor larger.

[0048] Based on this, in order to make the pressure sensor smaller, such as Figure 1 and Figure 2 As shown, some embodiments of the present disclosure provide a pressure sensor 100. The pressure sensor 100 includes a first substrate structure 10 and a second substrate structure 20. The first substrate structure 10 includes a pressure-sensitive layer and a plurality of piezoresistors 12 disposed on one side of the pressure-sensitive layer; a portion of the pressure-sensitive layer is used to sense pressure changes; the plurality of piezoresistors 12 are configured to: generate electrical signals based on the pressure changes sensed by the pressure-sensitive layer. The second substrate structure 20 is located on one side of the first substrate structure 10 and is connected to the first substrate structure 10; the second substrate structure 20 includes a readout integrated circuit 21 coupled to the plurality of piezoresistors 12, and the readout integrated circuit 21 is at least configured to: process the electrical signals generated by the plurality of piezoresistors 12.

[0049] Based on the above structure, the working process of the pressure sensor 100 can be: the part of the pressure-sensitive layer used to sense pressure changes; deforms under the action of external pressure and generates stress, and the piezoresistors 12 change resistance under the stress, and then convert the resistance change into an electrical signal through an interconnection structure (for example, a Wheatstone bridge structure described in detail below), and output it to the readout integrated circuit 21; the readout integrated circuit 21 receives the electrical signals generated by multiple piezoresistors 12 and processes the electrical signals. Among them, the electrical signal processed by the readout integrated circuit 21 can reflect the size of the external pressure, realizing the function of the pressure sensor 100 to measure pressure.

[0050] In some examples, the varistor 12 may be a doped silicon varistor, such as a P-type doped silicon varistor or an N-type doped silicon varistor; in other examples, the varistor 12 may be a metal film varistor, and the material of the metal film may be a material with a high piezoresistive strain coefficient, a low material noise factor, and a low resistance temperature coefficient, such as any one or more combinations of NiCr, Pt, FeNi, TiB, TaN, and TiN.

[0051] Exemplarily, the electrical signals generated by the plurality of varistors 12 are voltage signals.

[0052] Exemplarily, the readout integrated circuit 21 (ROIC) can be configured to amplify the electrical signals generated by the plurality of varistors 12, and / or perform primary signal processing such as differential processing. Figure 8 As shown, the readout integrated circuit 21 includes a signal amplification module, a signal differentiation module, and interconnection wiring connected between the signal amplification module and the signal differentiation module.

[0053] It can be understood that, by configuring the first substrate structure 10 to include a pressure-sensitive layer and a plurality of piezoresistors 12, and the second substrate structure 20 to include a readout integrated circuit 21, the pressure-sensitive layer, the plurality of piezoresistors 12, and the readout integrated circuit 21 can be distributed on both sides of the pressure sensor 100. In this way, compared with the situation where the pressure-sensitive layer, the plurality of piezoresistors 12, and the readout integrated circuit 21 are all arranged on one side of the pressure sensor 100, the volume of the pressure sensor 100 can be made smaller, which is beneficial to the 3D packaging of the pressure sensor 100 and an external integrated circuit (for example, a control integrated circuit described in detail below).

[0054] In some examples, in order to realize the pressure measurement function of the pressure sensor 100, the pressure sensor 100 is also coupled to an external integrated circuit (for example, a control integrated circuit described in detail below). The interconnection structure between the piezoresistor 12 and the readout integrated circuit 21, and between the pressure sensor 100 and the external integrated circuit will be described exemplarily below.

[0055] In some embodiments, Figure 1 to Figure 3 and Figure 6 to Figure 8 As shown, the second substrate structure 20 further includes a second liner 22, a first insulating layer 23, a plurality of second conductive bumps 24 and a plurality of conductive pillars 25. The readout integrated circuit 21 is integrated inside the second liner 22. The first insulating layer 23 is disposed on the surface of the second liner 22 close to the first substrate structure 10. The plurality of second conductive bumps 24 penetrate the first insulating layer 23. The plurality of conductive pillars 25 penetrate the second liner 22 and are insulated from the second liner 22; at least a portion of the plurality of conductive pillars 25 are in contact with a portion of the plurality of second conductive bumps 24.

[0056] By way of example, the material of the second substrate 22 may be silicon.

[0057] Here, the readout integrated circuit 21 is integrated inside the second substrate 22, as a possible implementation method, such as Figure 6 to Figure 8 As shown, the readout integrated circuit 21 can be manufactured inside the second substrate 22 by using the integrated circuit process; in this case, the second substrate 22 can also be called a ROIC backing substrate.

[0058] Exemplarily, the material of the first insulating layer 23 is an insulating material, for example, any one or more combinations of SiO 2 , SiN and glass.

[0059] For example, Figure 6 As shown, the shape of the second conductive bump 24 can be square, rectangular, circular or elliptical, etc. Moreover, when the shape of the second conductive bump 24 is square or rectangular, the side length L1 of the square or rectangle is in the range of 50 μm to 100 μm, for example, 50 μm, 60 μm, 70 μm, 80 μm, 90 μm or 100 μm, etc. When the shape of the second conductive bump 24 is circular or elliptical, the diameter of the circle or the major axis length of the ellipse is in the range of 50 μm to 100 μm, for example, 50 μm, 62 μm, 70 μm, 81 μm, 90 μm or 100 μm, etc.

[0060] For example, the material of the second conductive bump 24 may be any one or more combinations of Au, AuSn, AgSn, CuSn and SnAgCu.

[0061] Exemplarily, the material of the conductive pillar 25 may be a low resistivity material, such as any one or more combinations of Cu, Al, Ti / Al, Au and Cr / Au, so that a good circuit path can be formed.

[0062] Here, if Figure 2 As shown, multiple conductive pillars 25 are insulated from the second lining 22; as a possible implementation method, a first through hole 26 is opened through the second lining 22, the conductive pillar 25 is arranged in the inner cavity of the first through hole 26, and a second insulating layer 27 is arranged between the side of the conductive pillar 25 and the side wall of the first through hole 26. The method of forming the second insulating layer 27 is, for example, an oxidation insulation method.

[0063] It should be noted that at least part of the plurality of conductive pillars 25 is in corresponding contact with part of the plurality of second conductive bumps 24, which means that part of the plurality of second conductive bumps 24 is in one-to-one contact with at least part of the plurality of conductive pillars 25, and another part of the plurality of second conductive bumps 24 is not in contact with the conductive pillars 25. Here, there is no limitation on the number of conductive pillars 25 in contact with the second conductive bumps 24. In other words, all conductive pillars 25 may be in contact with the second conductive bumps 24, or part of the plurality of conductive pillars 25 may be in contact with the second conductive bumps 24.

[0064] For example, Figure 6 As shown, the number of the second conductive bumps 24 is six, the number of the conductive pillars 25 is four, and the four conductive pillars 25 are in contact with the four second conductive bumps 24 in a one-to-one correspondence.

[0065] It can be understood that when the second conductive bump 24 penetrates the first insulating layer 23, the coupling between the varistor 12 and the readout integrated circuit 21 can be achieved through the second conductive bump 24. When the conductive column 25 penetrates the second substrate 22, and the penetration position of the conductive column 25 overlaps with the area where the readout integrated circuit 21 is located (for example, the area where the connection end of the readout integrated circuit 21 is located), the connection end of the readout integrated circuit 21 can be coupled to the outside of the pressure sensor 100 through the conductive column 25. When the conductive column 25 contacts the second conductive bump 24, a vertical interconnection structure M that penetrates the second substrate 22 and the first insulating layer 23 can be formed. In this way, through the vertical interconnection structure M, the connection end of the first substrate structure 10 can be coupled to the outside of the pressure sensor 100.

[0066] It can be seen that, through the above arrangement, coupling between the piezoresistor 12 and the readout integrated circuit 21, and between the pressure sensor 100 and the external integrated circuit (for example, the control integrated circuit described in detail below) can be achieved, and the pressure sensor 100 can measure pressure. Moreover, since the second conductive bump 24 and the conductive column 25 are both through-type interconnection structures, firstly, the volume of the pressure sensor 100 can be reduced, which is convenient for device integration and is conducive to the 3D packaging of the pressure sensor 100 and the external integrated circuit (for example, the control integrated circuit described in detail below); secondly, compared with the planar wiring type interconnection structure in some implementations, the bonding strength is high and the reliability is stronger, so that the reliability of the pressure sensor 100 can be improved; thirdly, the second substrate structure 20 can be avoided from being subjected to the MEMS bulk silicon etching patterning process, so that the available area of ​​the readout integrated circuit 21 is larger, and at the same time, the mutual influence between the MEMS and the readout integrated circuit 21 can be avoided.

[0067] In some embodiments, Figure 1 , Figure 2 , Figure 4 , Figure 5 and Fig. 9 As shown, the varistor layer includes a first liner 13 and a buried oxide layer 14. The middle part of the first liner 13 is thinned. The buried oxide layer 14 is arranged on the surface of the first liner 13 close to the second substrate structure 20; the varistor 12 is arranged on the surface of the buried oxide layer 14 away from the first liner 13. The first substrate structure 10 also includes a plurality of metal traces 15 and a plurality of first conductive bumps 16. The plurality of metal traces 15 are arranged on the surface of the buried oxide layer 14 away from the first liner 13. At least part of the plurality of second conductive bumps 24 is in corresponding contact with the plurality of first conductive bumps 16. Exemplarily, the material of the first liner 13 may be silicon. The material of the buried oxide layer 14 may be an insulating material, for example, a combination of any one or more of SiO2, SiN and glass. At this time, the first liner 13 and the buried oxide layer 14 may constitute a silicon-on-insulator (SOI) structure.

[0068] Here, the middle portion of the first liner 13 is thinned to form a part of the portion of the pressure-sensitive layer for sensing pressure changes, and this part is in contact with the buried oxide layer 14. As a possible implementation method, a non-through cavity (for example, a square columnar cavity) is opened in the middle of the surface of the first liner 13 away from the buried oxide layer 14 to thin the middle portion of the first liner 13. In this way, the thinned middle portion of the first liner 13 and the buried oxide layer 14 in contact therewith can constitute at least a part of the portion of the pressure sensor 100 that senses pressure, and this portion of the pressure sensing is close to the varistor 12, so that the accuracy and sensitivity of the pressure sensor 100 are improved.

[0069] In some examples, the plurality of first conductive bumps 16 , the plurality of metal traces 15 , and the plurality of varistors 12 form a ring-shaped Wheatstone bridge structure H.

[0070] For example, Fig. 9 As shown, the Wheatstone bridge structure H is in a square ring shape, four first conductive bumps 16 are located at the four corners of the square ring, four varistors 12 are located at the center of the four sides of the square ring, and the varistors 12 are connected to the first conductive bumps 16 through metal traces 15.

[0071] Here, if Fig. 9 As shown, the metal trace 15 can connect the varistor 12 and the first conductive bump 16 in a transverse direction (eg, in a direction parallel to the first substrate 13 ) to form a Wheatstone bridge structure H.

[0072] Exemplarily, the material of the metal trace 15 may be a low resistivity material, such as any one or more combinations of Al, Ti / Al, Au and Cr / Au, so that a good circuit path can be formed.

[0073] For example, Fig. 9 As shown, the length of the metal trace 15 is less than or equal to 50 μm, for example, 10 μm, 20 μm, 34 μm, 40 μm or 50 μm, etc. Among the multiple dimensions of the cross section of the metal trace 15 perpendicular to its extension direction, the dimension parallel to the first liner 13 is the width L2 of the metal trace 15, and the width L2 of the metal trace 15 is less than or equal to 15 μm, for example, 1 μm, 3 μm, 6 μm, 9 μm or 15 μm, etc. In this way, the total volume of the multiple metal traces 15 can be reduced.

[0074] For example, Fig. 9 As shown, the shape of the first conductive bump 16 matches the shape of the second conductive bump 24, and can be square, rectangular, circular or elliptical, etc. Moreover, when the shape of the first conductive bump 16 is square or rectangular, the side length L1' of the square or rectangle is in the range of 50μm to 100μm, for example, 50μm, 58μm, 70μm, 80μm, 90μm or 100μm, etc. When the shape of the first conductive bump 16 is circular or elliptical, the diameter of the circle or the major axis length of the ellipse is in the range of 50μm to 100um, for example, 50μm, 60μm, 75μm, 81μm, 90μm or 100μm, etc.

[0075] For example, the material of the first conductive bump 16 may be any one or more combinations of Au, AuSn, AgSn, CuSn and SnAgCu.

[0076] In some examples, such as Figure 2 , Figure 4 and Fig. 9 As shown, the orthographic projection of the first conductive bump 16 on the second substrate structure 20 is located outside the orthographic projection of the portion of the pressure-sensitive layer that senses pressure changes on the second substrate structure 20; in other examples, the orthographic projection of the first conductive bump 16 on the second substrate structure 20 overlaps with the orthographic projection of the portion of the pressure-sensitive layer that senses pressure changes on the second substrate structure 20.

[0077] It should be noted that at least part of the plurality of second conductive bumps 24 is in corresponding contact with the plurality of first conductive bumps 16, which means that at least part of the plurality of second conductive bumps 24 is in one-to-one contact with the plurality of first conductive bumps 16. Here, there is no limitation on the number of second conductive bumps 24 in contact with the first conductive bumps 16. In other words, all the second conductive bumps 24 may be in contact with the first conductive bumps 16, or a part of the plurality of second conductive bumps 24 may be in contact with the first conductive bumps 16.

[0078] For example, Figure 1 , Figure 3 and Fig. 9 As shown, the number of the second conductive bumps 24 is six, the number of the first conductive bumps 16 is four, and the four first conductive bumps 16 are in contact with the four second conductive bumps 24 in a one-to-one correspondence.

[0079] It can be understood that, when the Wheatstone bridge structure H includes a plurality of first conductive bumps 16, the coupling of the second conductive bump 24 with the Wheatstone bridge structure H can be achieved by contacting the first conductive bump 16 with the second conductive bump 24. In this way, when the second conductive bump 24 is coupled to the readout integrated circuit 21, the coupling between the Wheatstone bridge structure H and the readout integrated circuit 21 can be achieved; when the second conductive bump 24 is not coupled to the readout integrated circuit 21 but is coupled to the conductive pillar 25, the second conductive bump 24 and the conductive pillar 25 can be used to couple the connection end of the Wheatstone bridge structure H to the outside of the pressure sensor 100. It can be seen that, through the above arrangement, the coupling between the Wheatstone bridge structure H and the readout integrated circuit 21 and between the Wheatstone bridge structure H and an external integrated circuit (for example, a control integrated circuit described in detail below) can be achieved, the pressure sensor 100 can measure the pressure function, and the reliability of the pressure sensor 100 can be improved.

[0080] In some embodiments, Fig. 9 As shown, the area where the piezoresistor 12 is located is directly opposite to the part of the piezoresistive layer used for sensing pressure changes.

[0081] Understandably, if Fig. 9 As shown, when the area where the piezoresistors 12 are located is opposite to the portion of the piezoresistors 12 used to sense pressure changes in the piezoresistors, multiple piezoresistors 12 are located directly below the portion of the piezoresistors 12 used to sense pressure changes in the piezoresistors 12. In this way, the sensitivity and accuracy of the pressure sensor 100 can be improved, thereby enhancing the performance of the pressure sensor 100.

[0082] For example, Fig. 9 As shown, the portion of the pressure-sensitive layer used to sense pressure changes (for example, the middle portion of the pressure-sensitive layer, hereinafter referred to as the pressure sensing portion) is a square; the first substrate structure 10 includes four piezoresistors 12, and the orthographic projections of the four piezoresistors 12 on the pressure sensing portion are respectively located at the centers of the four ends of the pressure sensing portion.

[0083] Here, among the four boundaries of the pressure sensing part, the boundary located on the same side as the piezoresistor 12 is defined as the selected boundary; the boundary of the piezoresistor 12 close to the selected boundary and the distance between the selected boundary are defined as the resistance film margin. For example, the right boundary of the pressure sensing part is the selected boundary of the piezoresistor located on the right side. At this time, the distance between the right boundary of the piezoresistor and the right boundary of the pressure sensing part is the resistance film margin of the piezoresistor. For the understanding of the resistance film margins of other piezoresistors 12, you can refer to the above description, which will not be repeated here.

[0084] Exemplarily, the resistor film margins of the four piezoresistors 12 are equal, and the value range of the resistor film margin is 0-20μm, for example, 0μm, 5μm, 10μm, 15μm or 20μm, etc. Since the center of the pressure sensing part is the minimum stress area and the end center of the pressure sensing part is the maximum stress area, by setting the resistor film margin value range of 0-20μm, the piezoresistors 12 can be closer to the boundary of the pressure sensing part and farther away from the center of the pressure sensing part, so that the pressure sensor 100 has a higher sensitivity.

[0085] In some examples, the varistor 12 is composed of multiple segments of sub-resistors, where the number of segments of the sub-resistors is defined as the fold number of the varistor 12. Exemplarily, the fold number of the varistor 12 may be an even number, such as 2, 4, 6, 8, or 10.

[0086] For example, Fig. 9 As shown, the widths of the four varistors 12 are the same, the lengths of the four varistors 12 along their extension directions are equal, and they are all distributed in two sections (i.e., two folds), and the two sections of the varistors 12 are coupled via metal traces 15. Fig. 9 As shown, the piezoresistors 12 on the left and right sides have the same structure and size, both including two segments of resistors distributed in parallel, and both segments of resistors are parallel to the upper side of the pressure sensing part. The piezoresistors 12 on the upper and lower sides have the same structure and size, both including two segments of resistors arranged side by side, and both segments of resistors are parallel to the upper side of the pressure sensing part. In this way, the consistency of the four piezoresistors 12 can be maintained, forming a differential structure, which can improve the sensitivity and accuracy of the pressure sensor 100.

[0087] In some embodiments, Figure 1 , Figure 4 , Figure 6 and Figure 8As shown, the plurality of first conductive bumps 16 include a first input conductive bump 16A, the plurality of second conductive bumps 24 include a second input conductive bump 24A, and the plurality of conductive pillars 25 include an input conductive pillar 25A. The plurality of varistors 12 and the metal traces 15 are coupled to the first input conductive bump 16A, the second input conductive bump 24A, and the input conductive pillar 25A.

[0088] It can be understood that the first input conductive bump 16A, the second input conductive bump 24A and the input conductive column 25A can form a first vertical interconnect structure M1 coupled to the input end H1 of the Wheatstone bridge structure H. Moreover, through the first vertical interconnect structure M1, an external integrated circuit (for example, a control integrated circuit described in detail below) can input a driving signal (for example, a voltage signal) to the Wheatstone bridge structure H to turn on the Wheatstone bridge structure H to achieve the function of measuring pressure.

[0089] Here, the input conductive pillar 25A is coupled to the input terminal H1 of the Wheatstone bridge structure H, and is not coupled to the readout integrated circuit 21. As a possible implementation, Figure 6 As shown, the penetration position of the output conductive pillar 25B does not overlap with the area where the readout integrated circuit 21 is located.

[0090] In some embodiments, Figure 1 , Figure 4 , Figure 6 to Figure 8 As shown, the plurality of first conductive bumps 16 include at least one first output conductive bump 16B; the plurality of second conductive bumps 24 include at least one second output conductive bump 24B. The plurality of varistors 12 and the metal traces 15 are coupled to the input terminal 21A of the readout integrated circuit 21 through the at least one first output conductive bump 16B and the at least one second output conductive bump 24B.

[0091] For example, Figure 1 As shown, the number of the first output conductive bumps 16B is two, and the number of the second output conductive bumps 24B is two. Thus, the signal transmitted to the input terminal 21A of the readout integrated circuit 21 is two input signals. The readout integrated circuit 21 can perform differential processing on the electrical signals generated by the multiple varistors 12 based on the two input signals.

[0092] It should be understood that the second output conductive bump 24B is coupled to the readout integrated circuit 21. As a possible implementation method, the material of the second substrate 22 is silicon. By heavily doping the portion of the second substrate 22 that is in contact with the second output conductive bump 24B, the second output conductive bump 24B and the readout integrated circuit 21 integrated inside the second substrate 22 can be coupled. As another possible implementation method, a metal trace in contact with the second output conductive bump 24B can be integrated inside the second substrate 22, and the second output conductive bump 24B and the readout integrated circuit 21 integrated inside the second substrate 22 can also be coupled.

[0093] It can be understood that the first output conductive bump 16B and the second output conductive bump 24B can form an interconnection structure coupled between the input terminal 21A of the readout integrated circuit 21 and the output terminal H2 of the Wheatstone bridge structure H. Thus, through the interconnection structure, the Wheatstone bridge structure H can output an electrical signal (for example, a voltage signal) to the readout integrated circuit 21, so that the readout integrated circuit 21 can process the electrical signals generated by multiple varistors 12.

[0094] In some embodiments, Figure 1 , Figure 6 to Figure 8 As shown, the plurality of conductive pillars 25 include at least one output conductive pillar 25B. The output terminal 21B of the readout integrated circuit 21 is coupled to the at least one output conductive pillar 25B.

[0095] For example, Figure 1 , Figure 6 to Figure 8 As shown, the number of output conductive pillars 25B is two.

[0096] Here, the output terminal 21B of the readout integrated circuit 21 is coupled to the output conductive column 25B. As a possible implementation, Figure 6 As shown, the penetration position of the output conductive pillar 25B overlaps with the area where the output terminal 21B of the readout integrated circuit 21 is located, so as to achieve coupling between the output terminal 21B of the readout integrated circuit 21 and the output conductive pillar 25B.

[0097] It can be understood that, through the above-mentioned output conductive pillars 25B, the readout integrated circuit 21 can output the processed electrical signal to an external integrated circuit (for example, a control integrated circuit described in detail below), so that the transmission of pressure measurement data can be achieved.

[0098] In some examples, such as Figure 6As shown, a second virtual conductive bump 24D is provided on the side of the output conductive column 25B close to the first substrate structure 10. Here, the function of the second virtual conductive bump 24D is different from that of the second input conductive bump 24A and the second output conductive bump 24B. Specifically, the second virtual conductive bump 24D can make the force on the second substrate structure 20 more balanced, thereby improving the structural stability of the pressure sensor 100.

[0099] In some examples, in order to improve the safety of the pressure sensor 100, the pressure sensor 100 also needs to be connected to a ground signal. Specifically, the ground terminal H3 of the Wheatstone bridge structure H needs to be grounded, and the ground terminal 21C of the readout integrated circuit 21 needs to be grounded to achieve the ground connection of the pressure sensor 100. The ground connection structure of the pressure sensor 100 is exemplarily introduced below.

[0100] In some embodiments, Figure 1 , Figure 4 , Figure 6 to Figure 8 As shown, the plurality of first conductive bumps 16 include a first grounding conductive bump 16C; the plurality of second conductive bumps 24 include a second grounding conductive bump 24C; the plurality of conductive pillars 25 include a grounding conductive pillar 25C; the first grounding conductive bump 16C, the second grounding conductive bump 24C and the grounding conductive pillar 25C are coupled. The first grounding conductive bump 16C is also coupled to the plurality of varistors 12 and the metal trace 15; the grounding conductive pillar 25C is also coupled to the ground terminal 21C of the readout integrated circuit 21.

[0101] For example, Figure 1 As shown, the first grounding conductive bump 16C and the first input conductive bump 16A are distributed at two opposite corners of the first substrate structure 10. In this case, the two first output conductive bumps 16B are disposed at the other two corners of the first substrate structure 10.

[0102] It can be understood that the first grounding conductive bump 16C, the second grounding conductive bump 24C and the grounding conductive pillar 25C can form a second vertical interconnect structure M2 coupled to the pressure sensor 100, and the pressure sensor 100 can achieve ground connection through the second vertical interconnect structure M2. Specifically, the ground connection of the ground terminal H3 of the Wheatstone bridge structure H is achieved through the first grounding conductive bump 16C, the second grounding conductive bump 24C and the grounding conductive pillar 25C; the ground connection of the ground terminal 21C of the readout integrated circuit 21 is achieved through the grounding conductive pillar 25C.

[0103] Here, the ground terminal 21C of the readout integrated circuit 21 is coupled to the ground conductive column 25C, as a possible implementation method, such as Figure 8As shown, the penetration position of the grounding conductive pillar 25C overlaps with the area where the grounding terminal 21C of the readout integrated circuit 21 is located, so as to achieve coupling between the grounding terminal 21C of the readout integrated circuit 21 and the grounding conductive pillar 25C.

[0104] In some embodiments, Figure 2 and Figure 7 As shown, the second substrate structure 20 further includes a plurality of lead structures 28 . The plurality of lead structures 28 are correspondingly disposed on the surface of the plurality of conductive pillars 25 away from the first substrate structure 10 and are correspondingly coupled to the plurality of conductive pillars 25 ; the plurality of lead structures 28 are insulated from the second liner 22 .

[0105] Here, the plurality of lead structures 28 are insulated from the second substrate 22; as a possible implementation, Figure 2 As shown, a third insulating layer 29 is provided on the side of the second liner 22 away from the first substrate structure 10, and the third insulating layer 29 isolates the lead structure 28 from the second liner 22. Exemplarily, the material of the third insulating layer 29 is an insulating material, such as any one or more combinations of SiO2, SiN and glass.

[0106] Here, the plurality of lead structures 28 are coupled to the plurality of conductive pillars 25 in a corresponding manner; as a possible implementation, the plurality of lead structures 28 are coupled to the plurality of conductive pillars 25 in a one-to-one correspondence. Figure 7 and Figure 8 As shown, when the multiple conductive pillars 25 include an input conductive pillar 25A, the multiple lead-out structures 28 include an input lead-out structure 28A coupled to the input conductive pillar 25A; when the multiple conductive pillars 25 include an output conductive pillar 25B, the multiple lead-out structures 28 include an input lead-out structure 28B coupled to the output conductive pillar 25B; when the multiple conductive pillars 25 include a grounding conductive pillar 25C, the multiple lead-out structures 28 include a grounding lead-out structure 28C coupled to the grounding conductive pillar 25C.

[0107] It can be understood that, on the one hand, through the arrangement of corresponding coupling of multiple lead structures 28 and multiple conductive pillars 25, multiple lead structures 28 can be used to couple multiple conductive pillars 25 to external structures (such as external integrated circuits and / or ground terminals) of the pressure sensor 100 to achieve the function of measuring pressure. On the other hand, the lead structures 28 and the conductive pillars 25 can form a through-type interconnection structure, which is more reliable than the planar wiring interconnection structure in some implementations, so that the reliability of the pressure sensor 100 can be improved.

[0108] The embodiment of the present disclosure does not limit the structural form of the lead-out structure 28 .

[0109] In some examples, the lead-out structure 28 is a wire bonding (WB) structure.

[0110] In other examples, such as Figure 2 and Figure 7 As shown, lead-out structure 28 is a solder ball.

[0111] It can be understood that, by setting the lead-out structure 28 as a solder ball, on the one hand, when the solder ball is used to connect to the external structure, a leadless package can be realized, so that the external environment has less interference with the signal transmission path of the pressure sensor 100, so that the high temperature stability and reliability of the pressure sensor 100 can be improved. On the other hand, by setting the second substrate structure 20 to also include a plurality of solder balls, the solder balls can be directly connected to the pads of the external circuit board, so that the pressure sensor 100 and the external integrated circuit (such as the control integrated circuit 210 described in detail below) can be packaged using a ball grid array (BGA) process, which improves the feasibility of packaging.

[0112] Exemplarily, the material of the solder ball can be a low resistivity material, such as any one or more combinations of Cu, Al, Ti / Al, Au and Cr / Au, so that a good circuit path can be formed. In some examples, the pressure sensor also includes an annular packaging layer, which is located between the first substrate structure and the second substrate structure. In this way, the first substrate structure and the second substrate structure can be packaged using the packaging layer. The material of the packaging layer is, for example, packaging glue.

[0113] In some embodiments, Figure 1 to Figure 6 , Fig. 9 and Fig.10 As shown, the pressure sensor 100 further includes a solder ring 30. The solder ring 30 is located between the opposite surfaces of the buried oxide layer 14 and the first insulating layer 23; the varistor 12, the plurality of metal traces 15, and the plurality of first conductive bumps 16 are located inside the solder ring 30 and are spaced apart from the solder ring 30.

[0114] Exemplarily, the thickness D of the solder ring 30 may be in the range of 20 μm to 120 μm, such as 20 μm, 40 μm, 60 μm, 85 μm, 100 μm or 120 μm, etc. In this way, the packaging effect of the first substrate structure 10 and the second substrate structure 20 may be improved.

[0115] In some examples, the solder ring 30 is formed on the surface of the buried oxide layer 14 away from the first liner 13 , and the solder ring 30 is fixedly contacted with the surface of the first insulating layer 23 away from the second liner 22 through the packaging process of the first substrate structure 10 and the second substrate structure 20 .

[0116] In other examples, the welding ring 30 is formed on the surface of the first insulating layer 23 away from the second liner 22 , and the welding ring 30 is fixedly contacted with the surface of the buried oxide layer 14 away from the first liner 13 through the packaging process of the first substrate structure 10 and the second substrate structure 20 .

[0117] In some other examples, such as Figure 2 As shown, the welding ring 30 is composed of a first welding ring 31 and a second welding ring 32, wherein the first welding ring 31 is arranged on the surface of the buried oxide layer 14 away from the first substrate 13, and a distance is left between the varistor 12, the plurality of metal traces 15, and the plurality of first conductive bumps 16; the second welding ring 32 is arranged on the surface of the first insulating layer 23 away from the second substrate 22, and matches the shape and position of the first welding ring 31. At this time, the welding ring 30 is formed by the first welding ring 31 and the second welding ring 32 being contacted and fixed, and the process of contacting and fixing the first welding ring 31 and the second welding ring 32 is, for example, a high-temperature melting process.

[0118] In this case, while the first solder ring 31 and the second solder ring 32 are in contact and fixed, at least part of the plurality of second conductive bumps 24 are in contact and fixed with the first conductive bump 16 to achieve coupling between the second conductive bump 24 and the first conductive bump 16. As a possible implementation, the thickness of the first solder ring 31 is the same as the height of the first conductive bump 16; the thickness of the second solder ring 32 is the same as the sum of the height of the second conductive bump 24 and the thickness of the first insulating layer 23. In this way, the bonding strength of the first solder ring 31 and the second solder ring 32 can be guaranteed, while the interconnection reliability of the second conductive bump 24 and the first conductive bump 16 can be guaranteed.

[0119] For example, Figure 2 As shown, when the welding ring 30 is composed of the first welding ring 31 and the second welding ring 32, the thickness of the first welding ring 31 and the thickness of the second welding ring 32 can be the same or different. The value range of the thickness L4 of the first welding ring 31 can be 10μm to 60μm, for example, 10μm, 20μm, 30μm, 40μm, 50μm or 60μm. The value range of the thickness L5 of the second welding ring 32 can be 10μm to 60μm, for example, 10μm, 21μm, 30μm, 40μm, 50μm or 60μm. In this way, the packaging effect of the first substrate structure 10 and the second substrate structure 20 can be improved.

[0120] For example, Figure 2As shown, when the solder ring 30 is composed of the first solder ring 31 and the second solder ring 32, the distance L6 between the inner edge of the first solder ring 31 and the first conductive bump 16 is greater than or equal to 50 μm, such as 50 μm, 60 μm, 74 μm, 80 μm, 90 μm or 100 μm, etc.; in this way, there is no electrical connection between the first solder ring 31 and the first conductive bump 16. The distance L7 between the inner edge of the second solder ring 32 and the second conductive bump 24 is greater than or equal to 50 μm, such as 50 μm, 60 μm, 75 μm, 82 μm, 90 μm or 110 μm, etc.; in this way, there is no electrical connection between the second solder ring 32 and the second conductive bump 24.

[0121] Exemplarily, the material of the solder ring 30 may be eutectic solder, such as a combination of one or more of AuSn, AgSn, CuSn and SnAgCu.

[0122] For example, Figure 2 As shown, the width L8 of the solder ring 30 is greater than or equal to 600 μm, such as 600 μm, 650 μm, 700 μm, 750 μm, 810 μm or 900 μm, etc. In this way, the packaging effect of the first substrate structure 10 and the second substrate structure 20 can be improved.

[0123] For example, Figure 2 As shown, the cross-sectional size of the first liner 13 is consistent with the cross-sectional size of the buried oxide layer 14, and the distance L9 between the outer boundary of the welding ring 30 and the boundary of the buried oxide layer 14 is greater than or equal to 50μm, for example, 50μm, 60μm, 70μm, 75μm, 80μm or 90μm, etc., so that the material of the welding ring 30 can be prevented from flowing to the outside of the surface of the buried oxide layer 14 away from the first liner 13 during the packaging process.

[0124] It can be understood that, by configuring the pressure sensor 100 to include the welding ring 30, on the one hand, the first substrate structure 10, the second substrate structure 20, and the welding ring 30 can enclose the main cavity N, so that when the pressure-sensitive layer senses a pressure change, stress can be generated with the pressure, and the stress can be transferred to the varistor 12 to achieve the function of measuring pressure. On the other hand, the feasibility of packaging the first substrate structure 10 and the second substrate structure 20 can be improved.

[0125] In some embodiments, Figure 2 As shown, the first substrate structure 10 and the second substrate structure 20 enclose a vacuum cavity N1 ; a plurality of varistors 12 are located inside the vacuum cavity N1 .

[0126] Exemplarily, when the pressure sensor 100 further includes a welding ring 30 , the first substrate structure 10 , the second substrate structure 20 , and the welding ring 30 enclose a vacuum chamber N1 .

[0127] It can be understood that the vacuum cavity N1 is the aforementioned main cavity N, and in the case where the first substrate structure 10 and the second substrate structure 20 enclose the vacuum cavity N1, the pressure sensor 100 is an absolute pressure type pressure sensor, which can measure the absolute value of the pressure change, and has the advantages of high precision and a large measurement range. Moreover, when the pressure sensor 100 is an absolute pressure type pressure sensor, the second substrate structure 20 also includes a second lining 22, and the readout integrated circuit 21 is integrated in the internal setting of the second lining 22, so that the second substrate structure 20 can be avoided from being subjected to the MEMS body silicon etching patterning process, so that the available area of ​​the readout integrated circuit 21 is larger, and at the same time, the mutual influence between the MEMS and the readout integrated circuit 21 can be avoided.

[0128] In some embodiments, Figure 1 to Figure 3 and Figure 6 As shown, when the first substrate structure 10 and the second substrate structure 20 enclose a vacuum cavity N1 , the pressure sensor 100 further includes a getter sheet 40 located in the vacuum cavity N1 .

[0129] For example, Figure 1 , Figure 3 and Figure 6 As shown, the getter sheet 40 is a square getter sheet, which is disposed on the surface of the first insulating layer 23 away from the second lining sheet 22, and the area of ​​the getter sheet 40 is smaller than the area of ​​the portion of the pressure-sensitive layer that senses pressure changes. In some examples, the geometric center of the getter sheet 40 is collinear with the geometric center of the portion of the pressure-sensitive layer that senses pressure changes.

[0130] For example, Figure 6 As shown, when the getter sheet 40 is disposed on the surface of the first insulating layer 23 away from the second liner 22, the distance L10 between the second conductive bump 24 closest to the getter sheet 40 and the getter sheet 40 is greater than or equal to 50 μm, such as 50 μm, 60 μm, 70 μm, 75 μm, 80 μm or 100 μm, etc. In this way, the getter sheet 40 and the second conductive bump 24 are prevented from being connected to each other during the use of the pressure sensor 100, thereby affecting the use.

[0131] It can be understood that, by configuring the pressure sensor 100 to include a getter sheet 40 located in the vacuum cavity N1, the getter sheet 40 can be used to absorb gas that may enter the vacuum cavity N1 during the use of the pressure sensor 100, so that the vacuum cavity N1 maintains a high vacuum degree.

[0132] Here, there is no limitation on the material of the getter sheet 40 , as long as it can absorb the gas that may enter the vacuum chamber N1 during the use of the pressure sensor 100 and maintain the vacuum degree of the vacuum chamber N1 .

[0133] In some embodiments, Fig.10 As shown, a through hole 50 is provided in the middle of the second lining 22 and the middle of the first insulating layer 23 ; the first substrate structure 10 and the second substrate structure 20 are combined to form a gauge pressure cavity N2 ; and a plurality of varistors 12 are located inside the gauge pressure cavity N2 .

[0134] Exemplarily, when the pressure sensor 100 further includes a welding ring 30 , the first substrate structure 10 , the second substrate structure 20 , and the welding ring 30 enclose a gauge pressure cavity N2 .

[0135] Here, the size of the through hole 50 is not limited.

[0136] In some examples, such as Fig.10 As shown, the aperture L11 of the through hole 50 is less than or equal to 100 μm, for example, 0.5 μm, 10 μm, 30 μm, 50 μm, 70 μm or 100 μm.

[0137] Here, the aperture L11 of the through hole 50 can be understood as the largest one among the multiple hole sizes of the through hole 50, and the hole size here is the hole size parallel to the first lining 13. The embodiment of the present disclosure does not limit the form of the through hole 50, for example, the through hole 50 can be a round hole, a rectangular hole or a special-shaped hole.

[0138] For example, Fig.10 As shown, the side wall of the through hole 50 is provided with a fourth insulating layer 51 , so that the safety and reliability of the pressure sensor 100 can be improved.

[0139] It can be understood that the gauge pressure cavity N2 is the aforementioned main cavity N. The through hole 50 can be used to connect the gauge pressure cavity N2 to the external atmospheric environment, so that the pressure of the gauge pressure cavity N2 is equal to the external pressure. Moreover, when the first substrate structure 10 and the second substrate structure 20 are enclosed to form the gauge pressure cavity N2, the pressure sensor 100 is a gauge pressure type pressure sensor, which can be measured with atmospheric pressure as a reference object, has the advantage of being easy to prepare, and can be used to measure the relative pressure change values ​​of media such as water pressure and air pressure.

[0140] The following uses the case where the pressure sensor 100 is an absolute pressure type pressure sensor as an example to exemplarily introduce the method for preparing the pressure sensor 100 .

[0141] In some embodiments, Fig.11As shown, the method for preparing the pressure sensor 100 includes S1 to S10:

[0142] S1: providing a first liner 13 and a buried oxide layer 14.

[0143] S2 : forming a plurality of varistors 12 and a plurality of metal traces 15 on the surface of the buried oxide layer 14 away from the first substrate 13 .

[0144] In some examples, the varistor 12 is a doped silicon varistor, and the process of forming the varistor 12 may be an ion implantation process or a process combining a diffusion process and an etching process to form the varistor 12 of a set shape.

[0145] In some other examples, the varistor 12 may be a metal film varistor, and the process for forming the varistor 12 is a process combining a metal sputtering process and an etching process.

[0146] S3 : forming a plurality of first conductive bumps 16 and a first solder ring 31 on the surface of the buried oxide layer 14 away from the first substrate 13 .

[0147] In some examples, the preparation of multiple varistors 12, multiple metal traces 15, multiple first conductive bumps 16, and first welding ring 31 is completed through multiple steps. At this time, a mask can be used to expose the target area and block other areas except the target area.

[0148] S4: etching the surface of the first liner 13 away from the buried oxide layer 14 to thin the first liner 13 to form a part of the portion of the pressure-sensitive layer that senses pressure changes.

[0149] Exemplarily, the process of etching the surface of the first liner 13 away from the buried oxide layer 14 may be a dry etching process or a wet etching process.

[0150] S5: providing a second substrate 22 , in which a readout integrated circuit 21 is fabricated.

[0151] S6 : forming a first insulating layer 23 on a surface of the second liner 22 close to the first substrate structure 10 , and forming a third insulating layer 29 on a surface of the second liner 22 away from the first substrate structure 10 .

[0152] S7 : forming a plurality of second conductive bumps 24 penetrating the first insulating layer 23 , and forming a second solder ring 32 on a surface of the first insulating layer 23 away from the second substrate 22 .

[0153] Exemplarily, the process of forming the plurality of second conductive bumps 24 may be: opening a hole in a set area of ​​the first insulating layer 23, and then forming the plurality of second conductive bumps 24 in the opening area. The process of forming the plurality of second conductive bumps 24 in the opening area may be any one of a sputtering process, an evaporation process, an etching process, a lift-off process, and a ball implantation process.

[0154] In some examples, the preparation of the plurality of second conductive bumps 24 and the second solder ring 32 is completed in two steps. At this time, a mask plate can be used to expose the target area and cover other areas except the target area.

[0155] S8: Bonding the first substrate structure 10 and the second substrate structure 20 .

[0156] S9: forming a plurality of first through holes 26 penetrating the first insulating layer 23 , the second liner 22 and the third insulating layer 29 on the second substrate structure 20 , so that at least a portion of the plurality of first through holes 26 corresponds to a portion of the plurality of second conductive bumps 24 .

[0157] Exemplarily, the process for forming the first through hole 26 is, for example, a through silicon via (TSV) process.

[0158] S10: forming a second insulating layer 27 on the sidewalls of the first through holes 26 to passivate the sidewalls of the first through holes 26. forming a plurality of conductive pillars 25 in the inner cavities of the first through holes 26. forming a lead-out structure 28 on one side of the conductive pillars 25 away from the second conductive bumps 24.

[0159] It can be understood that the above preparation method has a simple process and can reduce the manufacturing cost of the pressure sensor 100 .

[0160] It should be noted that the above-listed preparation methods are examples of preparation methods of the pressure sensor 100 , and are not limitations of the preparation methods of the pressure sensor 100 .

[0161] like Fig.12 As shown, some embodiments of the present disclosure further provide a pressure sensing device 200. The pressure sensing device 200 comprises a pressure sensor 100 provided by the above technical solution and a control integrated circuit 210. The control integrated circuit 210 is coupled to a plurality of piezoresistors 12 and is also coupled to a readout integrated circuit 21.

[0162] The beneficial effects that can be achieved by the pressure sensing device 200 provided in some embodiments of the present disclosure are the same as the beneficial effects that can be achieved by the pressure sensor 100 provided by the above technical solution, and will not be repeated here.

[0163] It can be understood that when the control integrated circuit 210 is coupled to a plurality of varistors 12, the control integrated circuit 210 can input a driving signal (eg, a voltage signal) to the varistor 12 or the Wheatstone bridge structure H (eg, Figure 4 When the control integrated circuit 210 and the readout integrated circuit 21 (as shown in Figure 8 When coupled with the control integrated circuit 210, the readout integrated circuit 21 can output the processed electrical signal to the control integrated circuit 210, so that the transmission of pressure measurement data can be achieved.

[0164] In some examples, such as Figure 2 and Fig.12 As shown, the control integrated circuit 210 is disposed on a circuit board, and the lead-out structure 28 may be a solder ball. In this case, the solder ball may be directly connected to the pad of the circuit board, thereby achieving coupling between the pressure sensor 100 and the control integrated circuit 210 .

[0165] like Fig.13 As shown, some embodiments of the present disclosure further provide an electronic device 300. The electronic device 300 includes a housing 310 and a pressure sensing device 200 provided by the above technical solution and arranged on the housing 310.

[0166] The beneficial effects that can be achieved by the electronic device 300 provided in some embodiments of the present disclosure are the same as the beneficial effects that can be achieved by the pressure sensing device 200 provided by the above technical solution, and will not be repeated here.

[0167] In some examples, the electronic device 300 may be a mobile phone, a computer, or a portable electronic device, so that the pressure sensor 100 can be applied to technical scenarios such as automobiles and process production that require pressure measurement.

[0168] The above is only a specific embodiment of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present disclosure, which should be included in the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be based on the protection scope of the claims.

Claims

1. A pressure sensor, characterized in that: include: A first substrate structure includes a pressure-sensitive layer and a plurality of varistors disposed on one side of the pressure-sensitive layer; A portion of the pressure-sensitive layer is used to sense pressure changes; The plurality of piezoresistors are configured to: generate an electrical signal based on a pressure change sensed by the pressure-sensitive layer; The second substrate structure is located on one side of the first substrate structure and connected to the first substrate structure; the second substrate structure includes a readout integrated circuit coupled to the multiple piezoresistors, and the readout integrated circuit is at least configured to: process the electrical signals generated by the multiple piezoresistors.

2. The pressure sensor according to claim 1, characterized in that: The second substrate structure further includes: a second substrate, wherein the readout integrated circuit is integrated inside the second substrate; A first insulating layer is disposed on a surface of the second liner close to the first substrate structure; A plurality of second conductive bumps, penetrating the first insulating layer; A plurality of conductive pillars penetrate the second liner and are insulated from the second liner; at least a portion of the plurality of conductive pillars are in corresponding contact with a portion of the plurality of second conductive bumps.

3. The pressure sensor according to claim 2, characterized in that: The pressure-sensitive layer comprises: a first lining; a middle portion of the first lining being thinned; and, A buried oxide layer is arranged on a surface of the first liner close to the second substrate structure; the varistor is arranged on a surface of the buried oxide layer away from the first liner; The first substrate structure further includes: A plurality of metal traces are arranged on a surface of the buried oxide layer away from the first liner; and A plurality of first conductive bumps; at least part of the plurality of second conductive bumps are in corresponding contact with the plurality of first conductive bumps.

4. The pressure sensor according to claim 3, characterized in that: The area where the piezoresistor is located is directly opposite to the portion of the piezoresistance layer used for sensing pressure changes.

5. The pressure sensor according to claim 3, characterized in that: The multiple first conductive bumps include a first input conductive bump, the multiple second conductive bumps include a second input conductive bump, and the multiple conductive pillars include an input conductive pillar; the multiple varistors and the metal routing are coupled to the first input conductive bump, the second input conductive bump and the input conductive pillar.

6. The pressure sensor according to claim 3, characterized in that: The multiple first conductive bumps include at least one first output conductive bump; the multiple second conductive bumps include at least one second output conductive bump; the multiple varistors and the metal routing are coupled to the input end of the readout integrated circuit through the at least one first output conductive bump and the at least one second output conductive bump.

7. The pressure sensor according to claim 3, characterized in that: The plurality of conductive pillars include at least one output conductive pillar; the output terminal of the readout integrated circuit is coupled to the at least one output conductive pillar.

8. The pressure sensor according to claim 3, characterized in that: The plurality of first conductive bumps include a first grounding conductive bump; the plurality of second conductive bumps include a second grounding conductive bump; the plurality of conductive pillars include a grounding conductive pillar; the first grounding conductive bump, the second grounding conductive bump and the grounding conductive pillar are coupled; The first grounding conductive bump is also coupled to the plurality of varistors and the metal trace; and the grounding conductive column is also coupled to the ground terminal of the readout integrated circuit.

9. The pressure sensor according to claim 2, characterized in that: The second substrate structure further includes: A plurality of lead-out structures are correspondingly arranged on surfaces of the plurality of conductive pillars away from the first substrate structure and are correspondingly coupled to the plurality of conductive pillars; the plurality of lead-out structures are insulated from the second lining.

10. The pressure sensor according to claim 3, characterized in that: Also includes: The solder ring is located between the opposite surfaces of the buried oxide layer and the first insulating layer; the varistor, the plurality of metal traces, and the plurality of first conductive bumps are located inside the solder ring and are spaced apart from the solder ring.

11. The pressure sensor according to any one of claims 2 to 10, characterized in that: The first substrate structure and the second substrate structure enclose a vacuum cavity; the plurality of varistors are located inside the vacuum cavity; or, A through hole is formed in the middle of the second lining and the middle of the first insulating layer; the first substrate structure and the second substrate structure are combined to form a gauge pressure cavity; and the plurality of varistors are located inside the gauge pressure cavity.

12. The pressure sensor according to claim 11, characterized in that: When the first substrate structure and the second substrate structure are combined to form a gauge pressure cavity, the aperture of the through hole is less than or equal to 100 μm.

13. The pressure sensor according to claim 11, characterized in that: In the case where the first substrate structure and the second substrate structure are enclosed to form a vacuum cavity, the pressure sensor further includes a getter sheet located in the vacuum cavity.

14. A pressure sensing device, characterized in that: The pressure sensor according to any one of claims 1 to 13; and further comprising: A control integrated circuit; the control integrated circuit is coupled to the plurality of varistors and is also coupled to the readout integrated circuit.

15. An electronic device, characterized in that: The invention comprises a housing and a pressure sensing device as claimed in claim 14 which is arranged on the housing.

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