PWM control circuit and energy storage power supply

Abstract

The utility model relates to a PWM control circuit and an energy storage power supply. The PWM control circuit comprises a first reference unit, a first comparison unit, a second reference unit and a second comparison unit, the first reference unit is connected with the first comparison unit, the second reference unit is connected with the second comparison unit, and the first comparison unit and the second comparison unit are both used for receiving pulse signals; the reference voltages provided by the first reference unit and the second reference unit are different, so that the duty ratios of the driving signals output by the first comparison unit and the second comparison unit based on the pulse signals are different. According to the PWM control circuit, different reference voltages are provided for two comparison units through a first reference unit and a second reference unit respectively, so that the two comparison units output driving signals with different duty ratios based on pulse signals, and then one pulse signal is converted into the two driving signals with the different duty ratios.

Description

Technical Field

[0001] The utility model relates to the technical field of power supply circuits, in particular to a PWM control circuit and an energy storage power supply. Background Art

[0002] New energy is gradually becoming the main track, and energy storage power supply, as one of the new energy products, will have more and more demand. Energy storage power supply includes inverter, LLC, PV charging and BUCK and other main power modules, and the switch tubes of these main power modules need to be controlled by the PWM function pin of the main control chip (ARM or DSP).

[0003] However, the number of PWM function pins of the main control chip is limited. If a storage power supply has multiple circuits that require PWM function pins, the PWM function pins of one main control chip will be insufficient, and it will be necessary to add a main control chip or replace it with a main control chip with more PWM function pins, which will increase the circuit design cost of the storage power supply. Utility Model Content

[0004] The PWM control circuit and energy storage power supply provided in the embodiments of the present application can solve at least some of the defects existing in the prior art.

[0005] In the first aspect, an embodiment of the present application provides a PWM control circuit. The PWM control circuit includes: a first reference unit, a first comparison unit, a second reference unit and a second comparison unit; the first reference unit is connected to the first comparison unit, the second reference unit is connected to the second comparison unit, and the first comparison unit and the second comparison unit are both used to receive a pulse signal; the reference voltages provided by the first reference unit and the second reference unit are different, so that the duty cycles of the drive signals output by the first comparison unit and the second comparison unit based on the pulse signal are different.

[0006] Optionally, the PWM control circuit also includes a switching switch; the switching switch is connected to the first comparison unit and the second comparison unit respectively; the switching switch is used to receive an enable signal and change the connection mode between the switching switch and the first comparison unit and the second comparison unit based on the enable signal.

[0007] Optionally, the switching switch has a first output terminal and a second output terminal; the switching switch is used to: when the enable signal is at a first level, control the first output terminal to be connected to the first comparison unit so that the first comparison unit outputs a first drive signal at the first output terminal, and control the second output terminal to be connected to the second comparison unit so that the second comparison unit outputs a second drive signal at the second output terminal; and when the enable signal is at a second level, control the first output terminal to be connected to the second comparison unit so that the second comparison unit outputs the second drive signal at the first output terminal, and control the second output terminal to be connected to the first comparison unit so that the first comparison unit outputs the first drive signal at the second output terminal.

[0008] Optionally, the switching switch also has a first input terminal, a second input terminal, a third input terminal and a fourth input terminal; the first input terminal and the fourth input terminal are both connected to the first comparison unit; the second input terminal and the third input terminal are both connected to the second comparison unit; the first output terminal responds to the enable signal to connect the first output terminal to the first input terminal or the second input terminal; the second output terminal responds to the enable signal to connect the second output terminal to the third input terminal or the fourth input terminal.

[0009] Optionally, the first reference unit includes a first reference power supply VCC1, a first resistor R1 and a second resistor R2; the first end of the first resistor R1 is connected to the first reference power supply VCC1, the second end of the first resistor R1 is respectively connected to the first end of the second resistor R2 and the first comparison unit, and the second end of the second resistor R2 is connected to ground.

[0010] Optionally, the second reference unit includes a second reference power supply VCC2, a third resistor R3 and a fourth resistor R4; the first end of the third resistor R3 is connected to the second reference power supply VCC2, the second end of the third resistor R3 is respectively connected to the first end of the fourth resistor R4 and the second comparison unit, and the second end of the fourth resistor R4 is connected to ground.

[0011] Optionally, the PWM control circuit also includes a pulse signal input terminal; the first comparison unit includes a first comparator U1; the first comparator U1 has a first positive input terminal, a first negative input terminal and a first signal output terminal; the first positive input terminal is connected to the pulse signal input terminal, the first negative input terminal is connected to the first reference unit, and the first signal output terminal is connected to the switching switch.

[0012] Optionally, the second comparison unit includes a second comparator U2; the second comparator U2 has a second positive input terminal, a second inverting input terminal and a second signal output terminal; the second positive input terminal is connected to the pulse signal input terminal, the second inverting input terminal is connected to the second reference unit, and the second signal output terminal is connected to the switching switch.

[0013] Optionally, the PWM control circuit also includes a pulse signal input terminal, a fifth resistor R5, a sixth resistor R6, a first capacitor C1 and a second capacitor C2; the first end of the fifth resistor R5 is connected to the pulse signal input terminal, the second end of the fifth resistor R5 is respectively connected to the first end of the first capacitor C1 and the first comparison unit, and the second end of the first capacitor C1 is connected to ground; the first end of the sixth resistor R6 is connected to the pulse signal input terminal, the second end of the sixth resistor R6 is respectively connected to the first end of the second capacitor C2 and the second comparison unit, and the second end of the second capacitor C2 is connected to ground.

[0014] In a second aspect, an embodiment of the present application provides an energy storage power supply, which includes the PWM control circuit described above.

[0015] At least one advantageous aspect of the PWM control circuit provided in the embodiment of the present application is that: the first reference unit is connected to the first comparison unit, the second reference unit is connected to the second comparison unit, and the first comparison unit and the second comparison unit are both used to receive pulse signals; the reference voltages provided by the first reference unit and the second reference unit are different, so that the duty cycles of the drive signals output by the first comparison unit and the second comparison unit based on the pulse signal are different, and different reference voltages are provided to the two comparison units by the first reference unit and the second reference unit respectively, so that the two comparison units output drive signals with different duty cycles based on the pulse signal, thereby realizing the conversion of a pulse signal into two drive signals with different duty cycles, solving the problem of insufficient PWM function pins of a main control chip, and reducing the circuit design cost of the energy storage power supply. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] One or more embodiments are exemplarily described by pictures in the corresponding drawings, and these exemplified descriptions do not constitute limitations on the embodiments. Elements with the same reference numerals in the drawings represent similar elements, and unless otherwise stated, the figures in the drawings do not constitute proportional limitations.

[0017] Figure 1 is a schematic diagram of a typical bidirectional LLC circuit;

[0018] Figure 2 It is a schematic diagram of a driving circuit in a typical bidirectional LLC circuit;

[0019] Figure 3 It is the logic diagram of four PWM control signals in a typical bidirectional LLC circuit;

[0020] Figure 4 A functional block diagram of a PWM control circuit provided in an embodiment of the present application;

[0021] Figure 5 A schematic diagram of a PWM control circuit provided in an embodiment of the present application;

[0022] Figure 6 A schematic diagram of a PWM control circuit provided in another embodiment of the present application;

[0023] Figure 7 A timing diagram of a driving signal provided in an embodiment of the present application;

[0024] Figure 8 A schematic diagram of a PWM control circuit applied to a bidirectional LLC circuit provided in an embodiment of the present application;

[0025] Fig. 9 A schematic diagram of a PWM control circuit applied to a bidirectional LLC circuit provided in another embodiment of the present application. DETAILED DESCRIPTION

[0026] In order to facilitate the understanding of the present invention, the present invention is described in more detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that when an element is described as "fixed to" another element, it can be directly on another element or there can be one or more centered elements therebetween. When an element is described as "connected" to another element, it can be directly connected to another element or there can be one or more centered elements therebetween. The orientation or positional relationship indicated by the terms "upper", "lower", "inner", "outer", "bottom" etc. used in this specification is based on the orientation or positional relationship shown in the accompanying drawings, only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation of the present invention. In addition, the terms "first", "second", "third", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance.

[0027] Unless otherwise defined, all technical and scientific terms used in this specification have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used in this specification and in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used in this specification includes any and all combinations of one or more of the related listed items.

[0028] In addition, the technical features involved in different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0029] New energy is gradually becoming the main track, and energy storage power supply, as one of the new energy products, will have more and more demand. Energy storage power supply includes inverter, LLC, PV charging and BUCK and other main power modules, and the switch tubes of these main power modules need to be controlled by the PWM function pin of the main control chip (ARM or DSP).

[0030] However, the number of PWM function pins of the main control chip is limited. If a storage power supply has multiple circuits that require PWM function pins, the PWM function pins of one main control chip will be insufficient, and it will be necessary to add a main control chip or replace it with a main control chip with more PWM function pins, which will increase the circuit design cost of the storage power supply.

[0031] For example, Figure 1 The schematic diagram of a typical bidirectional LLC circuit is shown in Figure 1. Figure 1 As shown, the bidirectional LLC circuit has 8 switch MOS tubes, which require 8 drive circuits. Figure 2 Figure 1 is a schematic diagram of a typical bidirectional LLC circuit driving circuit. According to the working principle of the bidirectional LLC circuit, the switch MOS tubes are turned on at the same time in diagonal pairs, that is, MOS tubes Q1 and Q6, Q2 and Q5, Q3 and Q8, Q4 and Q7 are turned on at the same time respectively. Therefore, the main control chip only needs 4 PWM function pins to output PWM control signals to control the above 8 MOS tubes, that is Figure 2 PWM-L1 is the PWM control signal of the switch MOS tube Q1 and Q6 drive circuit, PWM-L2 is the PWM control signal of the switch MOS tube Q2 and Q5 drive circuit, PWM-H1 is the PWM control signal of the switch MOS tube Q3 and Q8 drive circuit, and PWM-H2 is the PWM control signal of the switch MOS tube Q4 and Q7 drive circuit. Figure 3 The following is the logic diagram of the four PWM control signals in a typical bidirectional LLC circuit, namely the logic diagram of the four PWM control signals PWM-L1, PWM-L2, PWM-H1, and PWM-H2. Figure 3As shown, the control logic is: when in the discharge state, the electric quantity flows from the low-voltage side (battery end) to the high-voltage side (BUS end). Therefore, in order to prevent the backflow of energy, the switch MOS tube on the low-voltage side must be turned on first and then turned off, and the MOS tube on the high-voltage side must be turned on last and turned off first, that is, the duty cycle of the PWM control signal of the switch MOS tube on the low-voltage side is greater than the duty cycle of the PWM control signal of the switch MOS tube on the high-voltage side. When in the charging state, the electric quantity flows from the high-voltage side (BUS end) to the low-voltage side (battery end). Therefore, in order to prevent the backflow of energy, the switch MOS tube on the high-voltage side must be turned on first and then turned off, and the MOS tube on the low-voltage side must be turned on last and turned off first, that is, the duty cycle of the PWM control signal of the switch MOS tube on the high-voltage side is greater than the duty cycle of the PWM control signal of the switch MOS tube on the low-voltage side. Combined with Figure 1 , Figure 2 and Figure 3 To explain the logic, in the discharge state, in the first half cycle, the main control chip first sends out the PWM-L1 control signal, controls the drive circuits U1 and U6 to control the switch MOS tubes Q1 and Q6 to turn on, and according to the same-name end of the transformer T1 and the above control logic, the main control chip then sends out the PWM-H1 control signal, controls the drive circuits U3 and U8 to control the switch MOS tubes Q3 and Q8 to turn on, and then the main control chip successively turns off the control signals PWM-H1 and PWM-L1. After the dead time, in the second half cycle, the main control chip first sends out the PWM-L2 control signal, controls the drive circuits U2 and U5 to control the switch MOS tubes Q2 and Q5 to turn on, and according to the same-name end of the transformer T1 and the above logic, the main control chip then sends out the PWM-H2 control signal, controls the drive circuits U4 and U7 to control the switch MOS tubes Q4 and Q7 to turn on, and then the main control chip successively turns off the control signals PWM-H2 and PWM-L2. The above switching logic is cycled in this way. Similarly, in the charging state, according to the above control logic, the switching sequence and duty cycle can be reversed to those in the discharging state, which will not be repeated here.

[0032] In order to solve the above problems, the present application provides a PWM control circuit, such as Figure 4 As shown, Figure 4 This is a functional block diagram of a PWM control circuit provided in an embodiment of the present application, wherein the PWM control circuit 40 includes: a first reference unit 41 , a first comparison unit 42 , a second reference unit 43 and a second comparison unit 44 .

[0033] The first reference unit 41 is connected to the first comparison unit 42 , the second reference unit 43 is connected to the second comparison unit 44 , and both the first comparison unit 42 and the second comparison unit 44 are used to receive the pulse signal.

[0034] It should be noted that the pulse signal is a PWM control signal output by the PWM function pin.

[0035] It should be noted that the first reference unit 41 and the second reference unit 43 provide different reference voltages.

[0036] Since the reference voltages provided by the first reference unit 41 and the second reference unit 43 are different, the duty ratios of the driving signals output by the first comparison unit 42 and the second comparison unit 44 based on the pulse signal are different.

[0037] The PWM control circuit provided in the embodiment of the present application provides different reference voltages to two comparison units through the first reference unit and the second reference unit, so that the two comparison units output drive signals with different duty cycles based on the pulse signal, thereby realizing the conversion of one pulse signal into two drive signals with different duty cycles, that is, one PWM function pin can realize the function of two PWM function pins, thereby solving the problem of insufficient PWM function pins of a main control chip, thereby reducing the circuit design cost of the energy storage power supply.

[0038] Based on the logic of the embodiment of the present application, the same first reference unit 41, the first comparison unit 42, the second reference unit 43 and the second comparison unit 44 are added, so that the role of four PWM function pins can be achieved through one or two PWM function pins, thereby reducing the resources occupied by the PWM function pins of the main control chip. For example, for a circuit without a dead zone requirement, when the same first reference unit 41, the first comparison unit 42, the second reference unit 43 and the second comparison unit 44 are added, one PWM control signal is sufficient, that is, only one PWM-H control signal is required, and the PWM-L control signal can output a signal opposite to the PWM-H control signal through an inverter, so that the role of four PWM function pins can be achieved through one PWM function pin. For a bidirectional LLC circuit with a dead zone requirement, when the same first reference unit 41, the first comparison unit 42, the second reference unit 43 and the second comparison unit 44 are added, two PWM control signals, namely the PWM-H control signal and the PWM-L control signal, are required, so that the role of four PWM function pins can be achieved through two PWM function pins.

[0039] In some embodiments, Figure 5 The schematic diagram of the PWM control circuit provided in the embodiment of the present application is as follows: Figure 5 As shown, the PWM control circuit 40 further includes a switch 45 .

[0040] The switch 45 is connected to the first comparison unit 42 and the second comparison unit 44 respectively.

[0041] The switch 45 is used to receive an enable signal and change the connection mode between the switch 45 and the first comparison unit 42 and the second comparison unit 44 based on the enable signal.

[0042] In some embodiments, Figure 5 As shown, the switch 45 has a first output terminal OTU1 and a second output terminal OTU2.

[0043] The switching switch 45 is used to: when the enable signal is at the first level, control the first output terminal OTU1 to be connected with the first comparison unit 42, so that the first comparison unit 42 outputs the first drive signal at the first output terminal OTU1, and control the second output terminal OTU2 to be connected with the second comparison unit 44, so that the second comparison unit 44 outputs the second drive signal at the second output terminal OTU2; and when the enable signal is at the second level, control the first output terminal OTU1 to be connected with the second comparison unit 44, so that the second comparison unit 44 outputs the second drive signal at the first output terminal OTU1, and control the second output terminal OTU2 to be connected with the first comparison unit 42, so that the first comparison unit 42 outputs the first drive signal at the second output terminal OTU2.

[0044] It should be noted that the enable signal with the first level and the enable signal with the second level are opposite level signals, for example, the enable signal with the first level is a low level signal, and the enable signal with the second level is a high level signal; or, the enable signal with the first level is a high level signal, and the enable signal with the second level is a low level signal.

[0045] For example, Figure 5 As shown, when the enable signal is at the first level, the first output terminal OTU1 is controlled to be connected to the first comparison unit 42 , and the second output terminal OTU2 is controlled to be connected to the second comparison unit 44 .

[0046] For example, Figure 6 As shown, Figure 6 A schematic diagram of a PWM control circuit provided in another embodiment of the present application controls the first output terminal OTU1 to be connected to the second comparison unit 44 , and controls the second output terminal OTU2 to be connected to the first comparison unit 42 when the enable signal is at the second level.

[0047] In some embodiments, Figure 5 As shown, the switch 45 further has a first input terminal IN1, a second input terminal IN2, a third input terminal IN3 and a fourth input terminal IN4.

[0048] Among them, the first input terminal IN1 and the fourth input terminal IN4 are both connected to the first comparison unit 42; the second input terminal IN2 and the third input terminal IN3 are both connected to the second comparison unit 44; the first output terminal OTU1 responds to the enable signal to connect the first output terminal OTU1 to the first input terminal IN1 or the second input terminal IN2; the second output terminal OTU2 responds to the enable signal to connect the second output terminal OTU2 to the third input terminal IN3 or the fourth input terminal IN4.

[0049] For example, Figure 5 As shown, when the enable signal is at the first level, the first output terminal OTU1 is controlled to be connected to the first comparison unit 42, and the second output terminal OTU2 is controlled to be connected to the second comparison unit 44. Specifically, the first output terminal OTU1 is controlled to be connected to the first input terminal IN1 so that the first output terminal OTU1 is connected to the first comparison unit 42, and the second output terminal OTU2 is controlled to be connected to the third input terminal IN3 so that the second output terminal OTU2 is connected to the second comparison unit 44.

[0050] For example, Figure 6 As shown, when the enable signal is at the second level, the first output terminal OTU1 is controlled to be connected to the second comparison unit 44, and the second output terminal OTU2 is controlled to be connected to the first comparison unit 42. Specifically, the first output terminal OTU1 is controlled to be connected to the second input terminal IN2, so that the first output terminal OTU1 is connected to the second comparison unit 44, and the second output terminal OTU2 is controlled to be connected to the fourth input terminal IN4, so that the second output terminal OTU2 is connected to the first comparison unit 42.

[0051] In some embodiments, Figure 5 As shown, the switch 45 further has an enable signal input terminal EN-IN, and the enable signal input terminal EN-IN is used to receive an enable signal EN.

[0052] In some embodiments, Figure 5 As shown, the first reference unit 41 includes a first reference power source VCC1, a first resistor R1 and a second resistor R2.

[0053] A first end of the first resistor R1 is connected to the first reference power source VCC1 , a second end of the first resistor R1 is respectively connected to a first end of the second resistor R2 and the first comparison unit 42 , and a second end of the second resistor R2 is connected to the ground GND.

[0054] In some embodiments, Figure 5 As shown, the second reference unit 43 includes a second reference power source VCC2, a third resistor R3 and a fourth resistor R4.

[0055] A first end of the third resistor R3 is connected to the second reference power source VCC2 , a second end of the third resistor R3 is respectively connected to a first end of the fourth resistor R4 and the second comparison unit 44 , and a second end of the fourth resistor R4 is connected to the ground GND.

[0056] It should be noted that the first reference power source VCC1 and the second reference power source VCC2 may be the same reference power source, or may be two reference power sources with the same output voltage.

[0057] It should be noted that the voltage proportion of the fourth resistor R4 is greater than the voltage proportion of the second resistor R2, that is: Therefore, the reference voltages provided by the first reference unit 41 and the second reference unit 43 are different.

[0058] In some embodiments, Figure 5 As shown, the PWM control circuit 40 also includes a pulse signal input terminal PWM-IN; the first comparison unit 42 includes a first comparator U1; the first comparator U1 has a first positive input terminal "+", a first negative input terminal "-" and a first signal output terminal PWM-OUT1.

[0059] Among them, the first positive phase input terminal "+" is connected to the pulse signal input terminal PWM-IN, and the first positive phase input terminal "+" is used to receive the pulse signal. The first negative phase input terminal "-" is connected to the first reference unit 41, and the first negative phase input terminal "-" is used to receive the reference voltage provided by the first reference unit 41. Specifically, the first negative phase input terminal "-" is respectively connected to the second end of the first resistor R1 and the first end of the second resistor R2 in the first reference unit 41. The first signal output terminal PWM-OUT1 is connected to the switching switch 45. Specifically, the first signal output terminal PWM-OUT1 is respectively connected to the first input terminal IN1 and the fourth input terminal IN4.

[0060] The first comparator U1 is used to output a driving signal when the voltage level of the pulse signal is greater than the reference voltage provided by the first reference unit 41 .

[0061] In some embodiments, Figure 5 As shown, the second comparison unit 44 includes a second comparator U2; the second comparator U2 has a second non-inverting input terminal "+", a second inverting input terminal "-" and a second signal output terminal PWM-OUT2.

[0062] Among them, the second positive phase input terminal "+" is connected to the pulse signal input terminal PWM-IN, and the second positive phase input terminal "+" is used to receive the pulse signal, the second negative phase input terminal "-" is connected to the second reference unit 43, and the second negative phase input terminal "-" is used to receive the reference voltage provided by the second reference unit 43. Specifically, the second negative phase input terminal "-" is respectively connected to the second end of the third resistor R3 and the first end of the fourth resistor R4 in the second reference unit 43. The second signal output terminal PWM-OUT2 is connected to the switching switch 45. Specifically, the second signal output terminal PWM-OUT2 is respectively connected to the second input terminal IN2 and the third input terminal IN3.

[0063] The second comparator U2 is used to output a driving signal when the voltage level of the pulse signal is greater than the reference voltage provided by the second reference unit 43 .

[0064] In some embodiments, Figure 5 As shown, the PWM control circuit further includes a pulse signal input terminal PWM-IN, a fifth resistor R5, a sixth resistor R6, a first capacitor C1 and a second capacitor C2.

[0065] Among them, the first end of the fifth resistor R5 is connected to the pulse signal input terminal PWM-IN, and the second end of the fifth resistor R5 is respectively connected to the first end of the first capacitor C1 and the first comparison unit 42. Specifically, the second end of the fifth resistor R5 is respectively connected to the first end of the first capacitor C1 and the first positive input terminal "+" in the first comparison unit 42, and the second end of the first capacitor C1 is connected to the ground GND.

[0066] It should be noted that the fifth resistor R5 and the sixth resistor R6 have the same parameters, and the first capacitor C1 and the second capacitor C2 have the same parameters.

[0067] It should be noted that the fifth resistor R5 and the first capacitor C1 are combined into a delay circuit. The first capacitor C1 receives a pulse signal so that the voltage across the first capacitor C1 gradually increases over time. When the voltage across the first capacitor C1 is greater than the reference voltage provided by the first reference unit 41, the first comparator U1 outputs a drive signal.

[0068] The first end of the sixth resistor R6 is connected to the pulse signal input terminal PWM-IN, and the second end of the sixth resistor R6 is respectively connected to the first end of the second capacitor C2 and the second comparison unit 44. Specifically, the second end of the sixth resistor R6 is respectively connected to the first end of the second capacitor C2 and the second positive input terminal "+" in the second comparison unit 44, and the second end of the second capacitor C2 is connected to the ground GND.

[0069] It should be noted that the sixth resistor R6 and the second capacitor C2 are combined into a delay circuit. The second capacitor C2 receives a pulse signal so that the voltage across the second capacitor C2 gradually increases over time. When the voltage across the second capacitor C2 is greater than the reference voltage provided by the second reference unit 43, the second comparator U2 outputs a drive signal.

[0070] In some embodiments, Figure 5 As shown, the first comparison unit 42 further includes a seventh resistor R7. A first end of the seventh resistor R7 is respectively connected to the first reference power source VCC1 and the first end of the first resistor R1, and a second end of the seventh resistor R7 is connected to the first signal output terminal PWM-OUT1 of the first comparator U1.

[0071] In some embodiments, Figure 5 As shown, the second comparison unit 44 further includes an eighth resistor R8. A first end of the eighth resistor R8 is respectively connected to the second reference power source VCC2 and a first end of the third resistor R3, and a second end of the eighth resistor R8 is connected to the second signal output terminal PWM-OUT2 of the second comparator U2.

[0072] For example, Figure 7 The timing diagram of the driving signal provided in the embodiment of the present application is shown in FIG. Figure 5 and Figure 7 When the energy storage power supply is in the discharge state and the enable signal EN is at a low level, the switch 45 controls the first output terminal OTU1 to be connected to the first input terminal IN1, so that the first output terminal OTU1 is connected to the first comparator U1. At this time, the voltage value of the first inverting input terminal "-" of the first comparator U1 is the value of the voltage divided by the second resistor R2 and the first resistor R1 on the first reference power supply VCC1, and its value is defined as Figure 7 The reference Y horizontal line in the circuit, in the first half cycle, when the main control chip outputs the PWM-H control signal, after the delay circuit composed of the fifth resistor R5 and the first capacitor C1, when the voltage across the first capacitor C1 (the voltage of the first positive input terminal "+") is greater than the reference Y horizontal line, the first comparator U1 outputs the first drive signal at the first output terminal OTU1, and determines the first drive signal as the PWM-L1 control signal. And the switching switch 45 controls the second output terminal OTU2 to be connected to the third input terminal IN3, so that the second output terminal OTU2 is connected to the second comparator U2. At this time, the voltage value of the second inverting input terminal "-" of the second comparator U2 is the value after the fourth resistor R4 and the third resistor R3 divide the second reference power supply VCC2, and its size is defined as Figure 7When the main control chip outputs the PWM-H control signal, the delay circuit composed of the sixth resistor R6 and the second capacitor C2 passes through. When the voltage across the second capacitor C2 (the voltage at the second positive input terminal "+") is greater than the reference X horizontal line, the second comparator U2 outputs the second drive signal at the second output terminal OTU2, and determines the second drive signal as the PWM-H1 control signal. Since the voltage proportion of the fourth resistor R4 is greater than the voltage proportion of the second resistor R2, the reference X horizontal line is higher than the reference Y horizontal line. The difference between the voltage corresponding to the reference X horizontal line and the voltage corresponding to the reference Y horizontal line is used to compare with the input PWM-H control signal. The duty cycle of the PWM-L1 control signal is greater than the duty cycle of the PWM-H1 control signal, and meets the above Figure 3 The control logic during discharge is shown.

[0073] For example, refer to Figure 6 and Figure 7 , when the energy storage power supply is in the charging state and the enable signal EN is at a high level, the switch 45 controls the second output terminal OTU2 to be connected to the fourth input terminal IN4, so that the second output terminal OTU2 is connected to the first comparator U1. At this time, the voltage value of the first inverting input terminal "-" of the first comparator U1 is the value of the voltage divided by the second resistor R2 and the first resistor R1 on the first reference power supply VCC1, and its value is defined as Figure 7 The reference Y horizontal line in the circuit, in the first half cycle, when the main control chip outputs the PWM-H control signal, after the delay circuit composed of the fifth resistor R5 and the first capacitor C1, when the voltage across the first capacitor C1 (the voltage of the first positive input terminal "+") is greater than the reference Y horizontal line, the first comparator U1 outputs the first drive signal at the second output terminal OTU2, and determines the first drive signal as the PWM-H1 control signal. In addition, the switching switch 45 controls the first output terminal OTU1 to be connected to the second input terminal IN2, so that the first output terminal OTU1 is connected to the second comparator U2. At this time, the voltage value of the second inverting input terminal "-" of the second comparator U2 is the value after the fourth resistor R4 and the third resistor R3 divide the second reference power supply VCC2, and its size is defined as Figure 7When the main control chip outputs the PWM-H control signal, the delay circuit composed of the sixth resistor R6 and the second capacitor C2 passes through. When the voltage across the second capacitor C2 (the voltage at the second positive input terminal "+") is greater than the reference X horizontal line, the second comparator U2 outputs the second drive signal at the first output terminal OTU1, and determines the second drive signal as the PWM-L1 control signal. Since the voltage proportion of the fourth resistor R4 is greater than the voltage proportion of the second resistor R2, the reference X horizontal line is higher than the reference Y horizontal line. The difference between the voltage corresponding to the reference X horizontal line and the voltage corresponding to the reference Y horizontal line is used to compare with the input PWM-H control signal. The duty cycle of the PWM-H1 control signal is greater than the duty cycle of the PWM-L1 control signal, and meets the above Figure 3 The control logic during charging is shown.

[0074] In order to more clearly understand the beneficial effects of the PWM control circuit provided in the embodiment of the present application, the following example illustrates the application of the PWM control circuit to a bidirectional LLC circuit in an energy storage power supply.

[0075] Since the bidirectional LLC circuit has a dead zone requirement for the switching signal, two PWM signals are required, namely: a PWM-H control signal and a PWM-L control signal.

[0076] refer to Figure 5 , add the same PWM control circuit to form Figure 8 The PWM control circuit shown in FIG. 1 is applied to a bidirectional LLC circuit. Figure 8 The schematic diagram of the PWM control circuit applied to the bidirectional LLC circuit provided in the embodiment of the present application. Among them, the first reference power supply VCC1 and the second reference power supply VCC2 are both 3.3V. It should be noted that, Figure 8 The two switches in the can be combined into one switch.

[0077] Please refer to Figure 3 , Figure 7 , Figure 8 and Fig. 9 , its working principle is:

[0078] (1) When the energy storage power supply is in the discharge state and the enable signal EN is at a low level, in the first half cycle, when the main control chip outputs the PWM-H control signal, after the delay circuit composed of the fifth resistor R5 and the first capacitor C1, when the voltage across the first capacitor C1 (the voltage of the first positive input terminal "+") is greater than the reference Y horizontal line, the first comparator U1 outputs the first drive signal at the first output terminal OTU1, and determines the first drive signal as the PWM-L1 control signal. When the voltage across the second capacitor C2 (the voltage of the second positive input terminal "+") is greater than the reference X horizontal line, the second comparator U2 outputs the second drive signal at the second output terminal OTU2, and determines the second drive signal as the PWM-H1 control signal. Since the voltage proportion of the fourth resistor R4 is greater than the voltage proportion of the second resistor R2, the reference X horizontal line is higher than the reference Y horizontal line. After comparing the difference between the voltage corresponding to the reference X horizontal line and the voltage corresponding to the reference Y horizontal line with the input PWM-H control signal, the duty cycle of the PWM-L1 control signal is greater than the duty cycle of the PWM-H1 control signal, and the above Figure 3 The control logic during discharge is shown in FIG. In the second half cycle, after the main control chip outputs the PWM-L control signal, the same principle is used as above, which will not be described in detail.

[0079] (2) Fig. 9 As shown, Fig. 9 A schematic diagram of a PWM control circuit for a bidirectional LLC circuit provided in another embodiment of the present application. When the energy storage power supply is in a charging state and the enable signal EN is at a high level, in the first half cycle, when the main control chip outputs a PWM-H control signal, after passing through a delay circuit composed of a fifth resistor R5 and a first capacitor C1, when the voltage across the first capacitor C1 (the voltage of the first positive input terminal "+") is greater than the reference Y horizontal line, the first comparator U1 outputs a first drive signal at the second output terminal OTU2, and determines the first drive signal as a PWM-H1 control signal. When the voltage across the second capacitor C2 (the voltage of the second positive input terminal "+") is greater than the reference X horizontal line, the second comparator U2 outputs a second drive signal at the first output terminal OTU1, and determines the second drive signal as a PWM-L1 control signal. Since the voltage proportion of the fourth resistor R4 is greater than the voltage proportion of the second resistor R2, the reference X horizontal line is higher than the reference Y horizontal line. After comparing the difference between the voltage corresponding to the reference X horizontal line and the voltage corresponding to the reference Y horizontal line with the input PWM-H control signal, the duty cycle of the PWM-H1 control signal is greater than the duty cycle of the PWM-L1 control signal, and the above Figure 3 The control logic during charging is shown in FIG. In the second half cycle, after the main control chip outputs the PWM-L control signal, the same principle is used as above, which will not be described in detail.

[0080] In summary, no matter in the state of discharging or charging, the PWM control circuit provided in the embodiment of the present application outputs four PWM control signals: PWM-H1, PWM-L1, PWM-H2 and PWM-L2 (such as Figure 7 shown) and Figure 3 They are consistent. Realizing 2 PWM function pins can achieve the function of 4 PWM function pins.

[0081] It should be noted that the embodiments of the present application illustrate the application scenarios of the PWM control circuit in energy storage power supplies for the sake of simplicity and exemplification. However, those skilled in the art can understand that based on similar principles, the PWM control circuit provided in the embodiments of the present application can also be applied to other electronic circuit scenarios that require multiple PWM signals.

[0082] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit them. Under the concept of the present invention, the technical features in the above embodiments or different embodiments may also be combined, the steps may be implemented in any order, and there are many other changes in different aspects of the present invention as described above, which are not provided in detail for the sake of simplicity. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they may still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A PWM control circuit, characterized in that: include: A first reference unit, a first comparison unit, a second reference unit, and a second comparison unit; The first reference unit is connected to the first comparison unit, the second reference unit is connected to the second comparison unit, and the first comparison unit and the second comparison unit are both used to receive a pulse signal; The reference voltages provided by the first reference unit and the second reference unit are different, so that the duty ratios of the driving signals output by the first comparison unit and the second comparison unit based on the pulse signal are different.

2. The PWM control circuit according to claim 1, characterized in that: The PWM control circuit also includes a switching switch; The switching switch is connected to the first comparison unit and the second comparison unit respectively; The switch is used to receive an enable signal and change the connection mode between the switch and the first comparison unit and the second comparison unit based on the enable signal.

3. The PWM control circuit according to claim 2, characterized in that: The switch has a first output terminal and a second output terminal; The switching switch is used to: when the enable signal is at a first level, control the first output end to be connected to the first comparison unit, so that the first comparison unit outputs a first drive signal at the first output end, and control the second output end to be connected to the second comparison unit, so that the second comparison unit outputs a second drive signal at the second output end; as well as When the enable signal is at the second level, the first output terminal is controlled to be connected to the second comparison unit so that the second comparison unit outputs the second drive signal at the first output terminal, and the second output terminal is controlled to be connected to the first comparison unit so that the first comparison unit outputs the first drive signal at the second output terminal.

4. The PWM control circuit according to claim 3, characterized in that: The switch also has a first input terminal, a second input terminal, a third input terminal and a fourth input terminal; The first input terminal and the fourth input terminal are both connected to the first comparison unit; The second input terminal and the third input terminal are both connected to the second comparison unit; The first output terminal responds to the enable signal so that the first output terminal is connected to the first input terminal or the second input terminal; The second output terminal responds to the enable signal so that the second output terminal is connected to the third input terminal or the fourth input terminal.

5. The PWM control circuit according to claim 1, characterized in that: The first reference unit includes a first reference power supply VCC1, a first resistor R1 and a second resistor R2; A first end of the first resistor R1 is connected to the first reference power source VCC1 , a second end of the first resistor R1 is respectively connected to a first end of the second resistor R2 and the first comparison unit, and a second end of the second resistor R2 is connected to ground.

6. The PWM control circuit according to claim 1, characterized in that: The second reference unit includes a second reference power supply VCC2, a third resistor R3 and a fourth resistor R4; A first end of the third resistor R3 is connected to the second reference power source VCC2 , a second end of the third resistor R3 is respectively connected to a first end of the fourth resistor R4 and the second comparison unit, and a second end of the fourth resistor R4 is connected to ground.

7. The PWM control circuit according to claim 2, characterized in that: The PWM control circuit further includes a pulse signal input terminal; the first comparison unit includes a first comparator U1; the first comparator U1 has a first positive input terminal, a first negative input terminal and a first signal output terminal; The first positive phase input terminal is connected to the pulse signal input terminal, the first negative phase input terminal is connected to the first reference unit, and the first signal output terminal is connected to the switch.

8. The PWM control circuit according to claim 7, characterized in that: The second comparison unit includes a second comparator U2; the second comparator U2 has a second non-inverting input terminal, a second inverting input terminal and a second signal output terminal; The second positive phase input terminal is connected to the pulse signal input terminal, the second negative phase input terminal is connected to the second reference unit, and the second signal output terminal is connected to the switch.

9. The PWM control circuit according to claim 1, characterized in that: The PWM control circuit also includes a pulse signal input terminal, a fifth resistor R5, a sixth resistor R6, a first capacitor C1 and a second capacitor C2; The first end of the fifth resistor R5 is connected to the pulse signal input end, the second end of the fifth resistor R5 is connected to the first end of the first capacitor C1 and the first comparison unit respectively, and the second end of the first capacitor C1 is connected to the ground; A first end of the sixth resistor R6 is connected to the pulse signal input end, a second end of the sixth resistor R6 is respectively connected to a first end of the second capacitor C2 and the second comparison unit, and a second end of the second capacitor C2 is connected to the ground.

10. An energy storage power supply, characterized in that: include: A PWM control circuit as claimed in any one of claims 1 to 9.

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