Application circuit for controlling power supply, startup and shutdown and dormancy awakening of equipment through single key

Abstract

The utility model relates to the technical field of startup and shutdown circuits, and discloses an application circuit for controlling power supply, startup and shutdown and sleep wake-up of equipment through a single key, which comprises a key control circuit, a key state detection circuit, an external power supply input circuit, an external power supply switching circuit and a CPU (central processing unit). The output end of the external power supply is connected with the key control circuit; the output end of the key control circuit is connected with the key state detection circuit and the external power supply switch circuit; the output end of the key state detection circuit is connected with the CPU; the input end of the external power supply input circuit is connected with the CPU; the output end of the external power input circuit is connected with an external power supply switch circuit; the output end of the external power supply switch circuit is connected with a system power supply. According to the utility model, the power supply, startup and shutdown and sleep wake-up states of the system circuit can be switched through a single key, so that the sleep of the system circuit can be realized, the system circuit can be ensured to be completely powered off during shutdown, the loss is reduced, and the safety of the equipment is ensured.

Description

Technical Field

[0001] The utility model relates to a power on / off circuit, in particular to an application circuit for controlling the power supply, power on / off, and sleep / awakening of equipment with a single button. Background Art

[0002] At present, the system circuits in some devices need to be powered all the time, but the devices lack the function of switching their own power supply status, which will lead to defects and hidden dangers:

[0003] For example, for in-vehicle or low-power devices, it is impossible to switch from sleep mode to shutdown mode, and the power cannot be completely cut off in shutdown mode, which will increase the power loss relatively greatly, shorten the shutdown battery life of the device, and require charging or other operations before use;

[0004] Industrial equipment and some unattended equipment lack the function of switching to sleep mode, and thus continuously supply power to key circuits for a long time, causing the key circuits to continue to age and even increase safety risks. Utility Model Content

[0005] The invention object of the utility model is to provide a power switching circuit for switching the power supply, power on / off, sleep and wake-up states of the equipment, so as to realize the switching of the power supply state of the system circuit of the equipment by key control and protect the system circuit.

[0006] In order to achieve the above purpose, the technical solution adopted by the utility model is:

[0007] An application circuit for controlling power supply, power on / off, and sleep / wake-up of a device with a single button, comprising a button control circuit 1, a button state detection circuit 2, an external power input circuit 3, an external power switch circuit 4, and a CPU;

[0008] The button control circuit 1 is connected to the external power supply VCC_IN, the button state detection circuit 2 and the external power supply switch circuit 4; the button control circuit 1 is used to transmit the button signal to the button state detection circuit 2;

[0009] The button state detection circuit 2 is connected to the POWER_ON pin of the CPU;

[0010] The external power input circuit 3 is connected to the POWER_EN pin of the CPU;

[0011] The CPU is used to switch the state of the system circuit after receiving the key signal sent by the key state detection circuit 2; the CPU is also used to send an external power supply signal to the external power input circuit 3;

[0012] The external power input circuit 3 is connected to the external power switch circuit 4;

[0013] The external power supply switch circuit 4 is connected to the system power supply VCC_SYS; the external power supply switch circuit 4 is used for external power supply control.

[0014] As a preferred solution of the utility model, the key control circuit 1 includes a key switch SW1, a transistor Q2, a first capacitor C3, a first resistor R4, a second resistor R5, and a third resistor R2; one end of the key switch SW1 is grounded, and the second end is connected to one end of the transistor Q2; one end of the first capacitor C3 is connected to the third end of the transistor Q2, and the other end is grounded; one end of the second resistor R5 is connected to the third end of the transistor Q2, and the other end is grounded; two ends of the transistor Q2 are connected to the external power supply VCC_IN; one end of the first resistor R4 is connected to the third end of the transistor Q2, and the other end is connected to the external power supply switch circuit 4; one end of the third resistor R2 is connected to the second end of the transistor Q2, and the other end is connected to the second end of the key switch SW1.

[0015] As a preferred solution of the present utility model, the key control circuit 1 further includes a second capacitor C2, one end of the second capacitor C2 is connected to the second end of the key switch SW1, and the other end is grounded.

[0016] As a preferred solution of the present utility model, the key control circuit 1 further includes a second capacitor C2, one end of the second capacitor C2 is connected to the second end of the key switch SW1, and the other end is grounded.

[0017] As a preferred solution of the present utility model, the key state detection circuit 2 includes a diode D2, one end of the diode D2 is connected to the detection signal input end of the CPU, and the other end is connected to two ends of the key switch SW1.

[0018] As a preferred solution of the utility model, the external power supply switch circuit 4 includes a first MOS transistor Q1, a second MOS transistor Q3, a semiconductor diode D1, a fourth resistor R3, a fifth resistor R6, and a sixth resistor R1. One end of the semiconductor diode D1 is connected to the external power input circuit 3, the second end is connected to the first resistor R4, and the third end is connected to one end of the second MOS transistor Q3; one end of the fifth resistor R6 is connected to one end of the second MOS transistor Q3, and the other end is grounded; two ends of the second MOS transistor Q3 are grounded, and the third end is connected to the fourth resistor R3; one end of the fourth resistor R3 is connected to one end of the first MOS transistor Q1, and the other end is connected to the third end of the second MOS transistor Q3; two ends of the first MOS transistor Q1 are connected to two ends of the triode Q2, and the third end is connected to the system power supply VCC_SYS; one end of the sixth resistor R1 is connected to two ends of the first MOS transistor Q1, and the other end is connected to one end of the first MOS transistor Q1.

[0019] As a preferred solution of the present invention, the external power supply switch circuit 4 further includes a third capacitor C1, one end of the third capacitor C1 is connected to the 2 end of the first MOS transistor Q1, and the other end is connected to the 1 end of the first MOS transistor Q1.

[0020] As a preferred solution of the present utility model, the external power input circuit 3 includes a seventh resistor R7, one end of the seventh resistor R7 is connected to the level output end of the CPU, and the other end is connected to the 1 end of the semiconductor diode D1.

[0021] As a preferred solution of the utility model, the ESD diode model is ESD5451N, the semiconductor diode model is BAT54C, the first MOS tube Q1 model is WPM3407C, and the second MOS tube Q3 model is SN2302S.

[0022] To sum up, due to the adoption of the above-mentioned technical scheme, the beneficial effects of the utility model are: according to the system power supply status and the key pressing time, the system state switching between power on and off, sleep and wake-up can be achieved by pressing keys; two states of sleep and shutdown are provided, which can not only realize the continuous small amount of power supply to the system in sleep, but also ensure that the system can be completely powered off when shutting down, thereby protecting the system circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 It is a circuit schematic diagram of the utility model.

[0024] Figure numerals: 1-button control circuit, 2-button status detection circuit, 3-external power input circuit, 4-external power supply switch circuit. DETAILED DESCRIPTION

[0025] The present invention is further described in detail below in conjunction with test examples and specific implementation methods. However, this should not be understood as the scope of the above subject matter of the present invention being limited to the following embodiments, and all technologies realized based on the content of the present invention belong to the scope of the present invention.

[0026] Unless otherwise specified, in the description of the specific embodiments of the present invention, the terms indicating the orientation or position relationship such as "up", "down", "left", "right", "center", "inside", "outside", etc. are all expressions based on the orientation or position relationship shown in the drawings, or the orientation or position relationship when the invented product / equipment / device is usually used. These terms of orientation or position relationship are only for the convenience of describing the scheme of the present invention or simplifying the description in the specific embodiments, so as to facilitate the technicians to quickly understand the scheme, and do not indicate or imply that a specific device / component / element must have a specific orientation, or be constructed and operated in a specific position relationship, and therefore cannot be understood as a limitation on the present invention.

[0027] In addition, if the terms "horizontal", "vertical", "overhanging", "parallel" and the like appear, it does not mean that the corresponding devices / components / elements are required to be absolutely horizontal or vertical or overhanging or parallel, but may be slightly tilted or have deviations. For example, "horizontal" only means that its direction is more horizontal than "vertical", and does not mean that the structure must be completely horizontal, but may be slightly tilted. Alternatively, it can be simplified to mean that the corresponding devices / components / elements are set in directions such as "horizontal", "vertical", "overhanging", "parallel", etc., and can have an error / deviation of ±10% relative to the corresponding direction setting, more preferably an error / deviation within ±8%, more preferably an error / deviation within ±6%, more preferably an error / deviation within ±5%, and more preferably an error / deviation within ±4%. As long as the corresponding device / component / element is within the error / deviation range, it can still achieve its role in the scheme of the present invention.

[0028] In addition, the expressions “first”, “second”, “third”, etc. that appear in the terms are merely descriptions used to distinguish the same or similar components and should not be understood as emphasizing or implying the relative importance of specific components.

[0029] In addition, in the description of the embodiments of the present invention, "several", "plurality" and "a number" represent at least 2. It can be any number such as 2, 3, 4, 5, 6, 7, 8, 9, and even more than 9.

[0030] In addition, in the description of the technical solution of the present invention, unless otherwise clearly specified / defined / restricted, the terms "set", "install", "connect", "connected", "provided with", "laid", and "arranged" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection, and can be welding, riveting, bolting, threading, and other commonly used connection means in the field. This connection can be a mechanical connection, an electrical connection, or a communication connection; it can be a direct connection, or an indirect connection through an intermediate medium, and it can be the internal connection of two elements.

[0031] Example 1

[0032] like Figure 1 The application circuit shown is a single-button control device power supply, power on / off, sleep and wake-up application circuit, comprising a button control circuit 1, a button state detection circuit 2, an external power input circuit 3, an external power switch circuit 4 and a CPU;

[0033] The button control circuit 1 is connected to the external power supply VCC_IN, the button state detection circuit 2 and the external power supply switch circuit 4; the button control circuit 1 is used to transmit the button signal to the button state detection circuit 2;

[0034] The button state detection circuit 2 is connected to the POWER_ON pin of the CPU;

[0035] The external power input circuit 3 is connected to the POWER_EN pin of the CPU;

[0036] The CPU is used to switch the state of the system circuit after receiving the key signal sent by the key state detection circuit 2; the CPU is also used to send an external power supply signal to the external power input circuit 3;

[0037] The external power input circuit 3 is connected to the external power switch circuit 4;

[0038] The external power supply switch circuit 4 is connected to the system power supply VCC_SYS; the external power supply switch circuit 4 is used for external power supply control.

[0039] As a preferred solution of the utility model, the key control circuit 1 includes a key switch SW1, a transistor Q2, a first capacitor C3, a first resistor R4, a second resistor R5, and a third resistor R2; one end of the key switch SW1 is grounded, and the second end is connected to one end of the transistor Q2; one end of the first capacitor C3 is connected to the third end of the transistor Q2, and the other end is grounded; one end of the second resistor R5 is connected to the third end of the transistor Q2, and the other end is grounded; two ends of the transistor Q2 are connected to the external power supply VCC_IN; one end of the first resistor R4 is connected to the third end of the transistor Q2, and the other end is connected to the external power supply switch circuit 4; one end of the third resistor R2 is connected to the second end of the transistor Q2, and the other end is connected to the second end of the key switch SW1.

[0040] As a preferred solution of the present utility model, the key control circuit 1 further includes a second capacitor C2, one end of the second capacitor C2 is connected to the second end of the key switch SW1, and the other end is grounded.

[0041] As a preferred solution of the present utility model, the key control circuit 1 further includes a second capacitor C2, one end of the second capacitor C2 is connected to the second end of the key switch SW1, and the other end is grounded.

[0042] As a preferred solution of the present utility model, the key state detection circuit 2 includes a diode D2, one end of the diode D2 is connected to the detection signal input end of the CPU, and the other end is connected to two ends of the key switch SW1.

[0043] As a preferred solution of the utility model, the external power supply switch circuit 4 includes a first MOS transistor Q1, a second MOS transistor Q3, a semiconductor diode D1, a fourth resistor R3, a fifth resistor R6, and a sixth resistor R1. One end of the semiconductor diode D1 is connected to the external power input circuit 3, the second end is connected to the first resistor R4, and the third end is connected to one end of the second MOS transistor Q3; one end of the fifth resistor R6 is connected to one end of the second MOS transistor Q3, and the other end is grounded; two ends of the second MOS transistor Q3 are grounded, and the third end is connected to the fourth resistor R3; one end of the fourth resistor R3 is connected to one end of the first MOS transistor Q1, and the other end is connected to the third end of the second MOS transistor Q3; two ends of the first MOS transistor Q1 are connected to two ends of the triode Q2, and the third end is connected to the system power supply VCC_SYS; one end of the sixth resistor R1 is connected to two ends of the first MOS transistor Q1, and the other end is connected to one end of the first MOS transistor Q1.

[0044] As a preferred solution of the present invention, the external power supply switch circuit 4 further includes a third capacitor C1, one end of the third capacitor C1 is connected to the 2 end of the first MOS transistor Q1, and the other end is connected to the 1 end of the first MOS transistor Q1.

[0045] As a preferred solution of the present utility model, the external power input circuit 3 includes a seventh resistor R7, one end of the seventh resistor R7 is connected to the level output end of the CPU, and the other end is connected to the 1 end of the semiconductor diode D1.

[0046] As a preferred solution of the utility model, the ESD diode model is ESD5451N, the semiconductor diode model is BAT54C, the first MOS tube Q1 model is WPM3407C, and the second MOS tube Q3 model is SN2302S.

[0047] Example 2

[0048] like Figure 1 As shown, when the system power supply VCC_SYS is out of power, the system is in a power-off state.

[0049] The POWER_ON of the external power input circuit 3 is a CPU input detection signal: if POWER_ON is low, it is determined that the key switch SW1 is pressed.

[0050] When the system is in a power-off state, long press the key switch SW12-3S and then release the key switch SW1, the system will start up and the system will run with power supply;

[0051] Specifically, when the system is in a power-off shutdown state, the key switch SW1 is pressed, and the external power supply VCC_IN charges the first capacitor C3. At the same time, the external power supply VCC_IN reaches the first end of the second MOS tube Q3 through the first resistor R4 and the second ends of the semiconductor diode D1, forming a high-level potential for GND, and then the second MOS tube Q3 is turned on, the first MOS tube Q1 is turned on, and the external power supply VCC_IN supplies power to the system; the key switch SW1 is pressed and released after 2-3S, at this time, the first capacitor C3 has 2-3S of stored electricity, and the stored electricity is discharged through the second resistor R5 and the first resistor R4, the second ends of the semiconductor diode D1, and the fifth resistor R6, forming a delayed power supply for the system power supply, and when the discharge potential acts on the first end of the second MOS tube Q3 and is lower than the Vgs (th) of the MOS tube, the key control circuit 1 no longer acts on the power supply.

[0052] Furthermore, the third resistor R2 is used for biasing and pulling up to provide a default working state for the transistor Q2 and the entire circuit; the transistor Q2 is in a closed state when the key switch SW1 is not pressed; when the key switch SW1 is pressed, Q2 is in a conducting state.

[0053] After long pressing the key switch SW12-3S and releasing it, the system enters the running power supply state;

[0054] When the system is in the running power supply state, the CPU supplies power, and the POWER_EN input is high level through the seventh resistor R7, so as to control the external power supply switch circuit 4 to continuously supply power to ensure the normal operation of the equipment;

[0055] At this time, short press the button switch SW1, POWER_ON detects low, and the system enters sleep mode;

[0056] When in sleep mode, short press the key switch SW1, POWER_ON detects low, and the system wakes up;

[0057] When the system is in the running power supply state, long press the button switch SW1 to force the system to shut down;

[0058] Specifically, POWER_ON is connected to the POWER_ON pin of PMIC such as the ARM platform, and long pressing will trigger the hardware forced shutdown logic; when the system is in the running power supply state, POWER_EN is pulled high by the CPU, the 1 end of the semiconductor diode D1 is high level, the 1 end of the second MOS tube Q3 is high level, the second MOS tube Q3 is turned on, and the first MOS tube Q1 is turned on;

[0059] In this case, if the key switch SW1 is long pressed, POWER_ON will be continuously pulled low. When the system detects that POWER_ON is at a low level for more than 6 seconds, it will perform a protective forced shutdown process, the system stores information, shuts down internally, and releases POWER_EN at the last moment of shutdown to pull POWER_EN low. The transistor Q2 is not conducting, the 1st and 2nd ends of the semiconductor diode D1 are low, the second MOS tube Q3 is not conducting, and the first MOS tube Q1 is not conducting, ensuring that the system is in a power-off state when shutting down;

[0060] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. An application circuit for controlling the power supply, power on / off, and sleep / wake-up of a device with a single button, characterized in that: It comprises a key control circuit (1), a key state detection circuit (2), an external power input circuit (3), an external power switch circuit (4) and a CPU; The key control circuit (1) is connected to an external power supply VCC_IN, the key state detection circuit (2) and the external power supply switch circuit (4); the key control circuit (1) is used to transmit a key signal to the key state detection circuit (2); The key state detection circuit (2) is connected to the POWER_ON pin of the CPU; the external power input circuit (3) is connected to the POWER_EN pin of the CPU; The CPU is used to switch the state of the system circuit after receiving the key signal sent by the key state detection circuit (2); the CPU is also used to send an external power supply signal to the external power input circuit (3); The external power input circuit (3) is connected to the external power switch circuit (4); The external power supply switch circuit (4) is connected to a system power supply VCC_SYS; the external power supply switch circuit (4) is used for external power supply control.

2. The application circuit for controlling the power supply, power on / off, and sleep / wake-up of a device with a single button according to claim 1, characterized in that: The key control circuit (1) comprises a key switch SW1, a transistor Q2, a first capacitor C3, a first resistor R4, a second resistor R5, and a third resistor R2; one end of the key switch SW1 is grounded, and the second end is connected to the first end of the transistor Q2; one end of the first capacitor C3 is connected to the third end of the transistor Q2, and the other end is grounded; one end of the second resistor R5 is connected to the third end of the transistor Q2, and the other end is grounded; two ends of the transistor Q2 are connected to the external power supply VCC_IN; one end of the first resistor R4 is connected to the third end of the transistor Q2, and the other end is connected to the external power supply switch circuit (4); one end of the third resistor R2 is connected to the second end of the transistor Q2, and the other end is connected to the second end of the key switch SW1.

3. The application circuit for controlling the power supply, power on / off, and sleep / wake-up of a device with a single button according to claim 2, characterized in that: The key control circuit (1) further comprises a second capacitor C2, one end of the second capacitor C2 is connected to the second end of the key switch SW1, and the other end is grounded.

4. The application circuit for controlling the power supply, power on / off, and sleep / wake-up of a device with a single button according to claim 3, characterized in that: The key state detection circuit (2) comprises a diode D2, one end of the diode D2 is connected to the detection signal input end of the CPU, and the other end is connected to the two ends of the key switch SW1.

5. The application circuit for controlling the power supply, power on / off, and sleep / wake-up of a device with a single button according to claim 4, characterized in that: The external power supply switch circuit (4) comprises a first MOS transistor Q1, a second MOS transistor Q3, a semiconductor diode D1, a fourth resistor R3, a fifth resistor R6, and a sixth resistor R1, wherein one end of the semiconductor diode D1 is connected to the external power input circuit (3), the second end is connected to the first resistor R4, and the third end is connected to one end of the second MOS transistor Q3; one end of the fifth resistor R6 is connected to one end of the second MOS transistor Q3, and the other end is grounded; the second end of the second MOS transistor Q3 is grounded, and the third end is connected to the fourth resistor R3; one end of the fourth resistor R3 is connected to one end of the first MOS transistor Q1, and the other end is connected to the third end of the second MOS transistor Q3; the second end of the first MOS transistor Q1 is connected to the second end of the triode Q2, and the third end is connected to the system power supply VCC_SYS; one end of the sixth resistor R1 is connected to the second end of the first MOS transistor Q1, and the other end is connected to one end of the first MOS transistor Q1.

6. The application circuit for controlling the power supply, power on / off, and sleep / wake-up of a device with a single button according to claim 5, characterized in that: The external power supply switch circuit (4) further comprises a third capacitor C1, one end of the third capacitor C1 being connected to the second end of the first MOS transistor Q1, and the other end of the third capacitor C1 being connected to the first end of the first MOS transistor Q1.

7. The application circuit for controlling the power supply, power on / off, and sleep / wake-up of a device with a single button according to claim 6, characterized in that: The external power input circuit (3) comprises a seventh resistor R7, one end of the seventh resistor R7 is connected to the level output end of the CPU, and the other end is connected to the 1 end of the semiconductor diode D1.

8. The application circuit for controlling the power supply, power on / off, and sleep / wake-up of a device with a single button according to claim 7, characterized in that: The model of the ESD diode is ESD5451N, the model of the semiconductor diode is BAT54C, the model of the first MOS tube Q1 is WPM3407C, and the model of the second MOS tube Q3 is SN2302S.

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