VPX board card signal testing device

Abstract

The utility model discloses a VPX board card signal testing device. The VPX board card signal testing device comprises a testing bottom plate and a debugging plate, a switching card and a plurality of VPX connectors are arranged on the test bottom plate, the switching card and the plurality of VPX connectors are connected with photoelectric conversion modules in a one-to-one correspondence manner, and the switching card is provided with an SGMII switching chip, an SRIO switching chip and an Ethernet switching chip; the debugging board is provided with a plurality of debugging interfaces, and the switching cards and the plurality of VPX connectors are connected with the debugging interfaces in a one-to-one correspondence manner.

Description

Technical Field

[0001] The utility model relates to the technical field of VPX board card testing, in particular to a VPX board card signal testing device. Background Art

[0002] VPX is designed specifically for defense applications and features enhanced module standards that enable superior performance for applications and platforms. The new generation of embedded systems based on the VPX standard reflects the growing importance of high-speed serial switching fabric interconnects such as PCI Express, RapidIO, Infiniband, and 10 Gb Ethernet. These technologies are replacing traditional parallel communication bus architectures for local communications because they offer significantly higher functionality.

[0003] When computer technology entered the field of testing and measurement, bus technology was introduced to simplify the test system structure, and bus technology was applied to the automatic test system, so that the bus and the test system were integrated, and the bus itself became the main component of the test system. The use of bus structure facilitates the expansion of instruments and equipment, especially the formulation of a unified bus standard makes it easier to interconnect different devices, and the rapid development of test bus technology directly affects the development level of automatic test system technology. Therefore, the present application provides a signal test device for a VPX board. Utility Model Content

[0004] In view of the above-mentioned defects or deficiencies in the prior art, it is desired to provide a VPX board signal testing device that realizes multiple bus communication tests of the VPX board, can intuitively detect the communication status of each VPX board in the system, has good testing effect and high testing efficiency.

[0005] The utility model provides a VPX board signal testing device, comprising a testing baseboard and a debugging board;

[0006] The test baseboard is provided with a switching card and a plurality of VPX connectors, the switching card and the plurality of VPX connectors are connected with photoelectric conversion modules in a one-to-one correspondence, and the switching card is provided with an SGMII switching chip, an SRIO switching chip and an Ethernet switching chip;

[0007] The debugging board is provided with a plurality of debugging interfaces, and the switching card and a plurality of VPX connectors are connected to the debugging interfaces in a one-to-one correspondence.

[0008] Furthermore, the test baseboard includes a VPX connector adapted to various types of VPX boards, including at least one adapted to 3UVPX boards.

[0009] Furthermore, the test baseboard is provided with a high-speed probe interface and a high-speed connector interface.

[0010] Furthermore, the debugging interface includes an I2C interface, an RS232 debugging serial port, a DSP debugging interface and a JTAG debugging interface.

[0011] Furthermore, the photoelectric conversion modules are all connected to a bus protocol analyzer.

[0012] Compared with the prior art, the beneficial effects of the utility model are:

[0013] The VPX board signal test device of the utility model is a universal test device, which can collect various bus signals of the VPX board, support the analysis of various bus protocols, support the self-loop test of multiple buses of the VPX board, and the communication interconnection test between multiple VPX boards.

[0014] The switch card is used as a transparent relay for the interaction of multiple VPX boards, and the interaction process of multiple VPX boards is monitored and analyzed. Problems that occur during the interaction process are analyzed and located, and protocol interaction, CRC, and field analysis are performed.

[0015] The photoelectric conversion module is connected to the bus protocol analyzer through a fiber optic cable. The bus protocol analyzer can simulate some protocol-level errors and send some interference data to verify the performance of the VPX board under test.

[0016] The test device of the present application has good test effect and high test efficiency, can configure test items and test methods according to the test requirements of customers, and has a wide range of applications.

[0017] It should be understood that the contents described in the utility model summary are not intended to limit the key or important features of the embodiments of the utility model, nor are they intended to limit the scope of the utility model. Other features of the utility model will become easy to understand through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Other features, objects and advantages of the present invention will become more apparent by reading the detailed description of non-limiting embodiments made with reference to the following drawings:

[0019] Figure 1 This is the architecture diagram of the VPX card signal test device;

[0020] Figure 2 This is a schematic diagram of the SGMII test circuit;

[0021] Figure 3 This is the schematic diagram of the SRIO test circuit;

[0022] Figure 4 This is a schematic diagram of the Ethernet test circuit;

[0023] Figure 5 It is a schematic diagram of other single-ended signal and differential signal test circuits;

[0024] Figure 6 This is the schematic diagram of RS422 test circuit;

[0025] Figure 7 This is a schematic diagram of the common IO port test circuit;

[0026] Figure 8 This is a schematic diagram of the TTL test circuit;

[0027] Fig. 9 This is the schematic diagram of the LVDS test circuit.

[0028] Numbers in the figure: 1. Test baseboard; 2. Debug board; 3. Switching card; 4. VPX connector; 5. Photoelectric conversion module; 6. High-speed probe interface; 7. High-speed connector interface; 8. Bus protocol analyzer. DETAILED DESCRIPTION

[0029] The utility model is further described in detail below in conjunction with the accompanying drawings and embodiments. It is understood that the specific embodiments described herein are only used to explain the relevant utility model, rather than to limit the utility model. It is also necessary to explain that, for the convenience of description, only the parts related to the utility model are shown in the accompanying drawings.

[0030] It should be noted that, in the absence of conflict, the embodiments and features of the embodiments of the present invention can be combined with each other. The present invention will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0031] Please refer to Figure 1 to Figure 9 , an embodiment of the utility model provides a VPX card signal testing device, including a test baseboard 1 and a debugging board 2;

[0032] The test baseboard 1 is provided with a switching card 3 and several VPX connectors 4, and the test baseboard 1 includes VPX connectors 4 adapted to various types of VPX boards, including at least 3UVPX boards; the switching card 3 and the several VPX connectors 4 are connected to photoelectric conversion modules 5 in a one-to-one correspondence, and the photoelectric conversion modules 5 are all connected to a bus protocol analyzer 8; the switching card 3 is provided with an SGMII switching chip, an SRIO switching chip and an Ethernet switching chip; the test baseboard 1 is provided with a high-speed probe interface 6 and a high-speed connector interface 7;

[0033] The debugging board 2 is provided with several debugging interfaces, including an I2C interface, an RS232 debugging serial port, a DSP debugging interface and a JTAG debugging interface. The switching card 3 and several VPX connectors 4 are connected to the debugging interfaces one by one.

[0034] In this embodiment, the switch card 3 has an SGMII switch chip, an SRIO switch chip, and an Ethernet switch chip. The width of all SRIO ports of the SRIO switch chip can be configured as: 1x, 2x, 4x; the rate of each lane can be configured as: 1.25G, 2.5G, 3.125G, 5G or 6.25Gbaud. The chip can be configured in any way of SRIO, I2C or JTAG. It has a master / slave working mode, and the master mode allows power-on configuration from an external EEPROM.

[0035] The switch chip of the Ethernet port supports various and flexible flow classification features and security control features, and provides a rich management and control interface. It supports 24X1GE ports, SGMII / 1000Base-X, 4X10GE ports, and standard XAUI; supports 802.1QVLAN switching, 32K MAC, 4K VLAN; supports RSTP and MSTP protocols.

[0036] The VPX card signal test device of the present application is a universal test device, which can collect various bus signals of the VPX card and support the analysis of various bus protocols. It supports the self-loop test of multiple buses of the VPX card and the communication interconnection test between multiple VPX cards.

[0037] Use switch card 3 as a transparent relay for the interaction of multiple VPX boards, and then monitor and analyze the interaction process of multiple VPX boards. Analyze and locate problems that occur during the interaction process, perform protocol interaction, CRC, and field analysis.

[0038] The photoelectric conversion module 5 is connected to a bus protocol analyzer 8 via an optical fiber cable. The bus protocol analyzer 8 can simulate some protocol level errors and send some interference data to test the performance of the VPX board under test.

[0039] The test device of the present application has good test effect and high test efficiency, can configure test items and test methods according to the test requirements of customers, and has a wide range of applications. Example

[0040] like Figure 2 As shown, bus test for SGMII.

[0041] The SGMII test is divided into self-loop test and interconnection test. The SGMII signal TX1+ of the VPX board is connected to the RX+ of switch card 3 through R1631, TX1- is connected to the RX- of switch card 3 through R1630, RX1+ is connected to the TX+ of switch card 3 through R1633, and RX- is connected to the TX- of switch card 3 through R1632.

[0042] On the test baseboard 1, the SGMII signal of the VPX board is led out, and two of them are crossed through zero-ohm resistors to perform a self-loop test, so that the user can view the communication status of the corresponding VPX board self-loop through the serial port. The VPX boards are cross-connected in pairs through zero-ohm resistors to test the communication status of both parties. The switch card 3 has an SGMII switch chip, which can display the communication status between the two VPX boards through the serial port. Through the switch card, various problems in the communication process between the two parties can be intuitively analyzed. Example

[0043] like Figure 3 As shown, bus test for SRIO.

[0044] TXD7+ of the VPX board is connected to RX6+ of switch card 3 through zero-ohm resistor R1466, TXD7- of the VPX board is connected to RX6- of switch card 3 through R1465, RXD7+ of the VPX board is connected to TX6+ of switch card 3 through R1467, and RXD7- of the VPX board is connected to TX6- of switch card 3 through R1468.

[0045] Similar to the SGMII test method, the SRIO signal of the VPX board is brought out on the test baseboard 1, and two of them are crossed through zero-ohm resistors to perform a self-loop test. In this way, the user can view the communication status of the corresponding board self-loop through the serial port.

[0046] The communication status of both parties is tested by cross-connecting the VPX boards in pairs through zero-ohm resistors. The SRIO of the VPX board that needs to communicate is connected to the switch card 3 through the test baseboard 1. The switch card 3 is equipped with an SRIO switch chip. Through the switch card 3, various problems in the communication process between the two parties can be intuitively analyzed. Other SRIO leads in the switch card 3 are connected to the photoelectric conversion module 5 for photoelectric conversion, and connected to the bus protocol analyzer 8 through the optical fiber cable for protocol analysis and other indicator tests. Example

[0047] like Figure 4 As shown, the test for ETH.

[0048] The test baseboard 1 has a photoelectric conversion module 5, TX7+ of the VPX board is connected to TX1P of the photoelectric conversion module 5 through a resistor R1470, TX7- is connected to TX1N of the photoelectric conversion module 5 through a resistor R1469, RX7+ is connected to RX1P of the photoelectric conversion module 5 through R1471, and RX7- is connected to RX1N of the photoelectric conversion module 5 through R1472. The SRIO signal to be tested is led out to the photoelectric conversion module 5, and then connected to the bus protocol analyzer 8 through an optical fiber for analysis and testing. Example

[0049] like Figure 5 As shown, other single-ended signal and differential signal tests.

[0050] Other single-ended signals and differential signals are also interconnected through zero-ohm resistors for self-loop testing and communication testing between VPX boards.

[0051] Specifically, Figures 6 to 9 RS422 bus test (differential signal), common IO port bus test (single-ended signal), TTL bus test (differential signal) and LVDS bus test (differential signal) are also tested through zero-ohm resistor cross-connection to achieve self-loop test and communication test between VPX boards.

[0052] The test baseboard 1 uses a QSFP photoelectric conversion module 5 for photoelectric conversion. A connector and a ground cage are reserved on the test baseboard 1. During use, the photoelectric conversion module 5 is inserted and led out to the bus protocol analyzer 8 for packet capture analysis and data simulation.

[0053] Detection points are reserved on the test base plate 1. The detection points can be measured by measuring instruments to locate system faults. The detection points are located in positions that are easy to measure. Power indicator lights and fault indicator lights are placed in conspicuous positions on the test base plate 1 to indicate product status.

[0054] The power supply, single-ended signal, and differential signal on the test board are designed according to the standard VPX protocol standard to ensure the versatility of the equipment. In addition, the bus type tested is not a fixed number of bus signals. The universal design of the device allows it to test more types of bus signals.

[0055] The test baseboard 1 is provided with a high-speed probe interface 6 and a high-speed connector interface 7. When the test environment is limited, the high-speed probe interface 6 and the high-speed connector interface 7 are directly connected to the VPX board, and the test equipment can still collect bus signals. The test equipment can collect multiple bus signals and support the analysis of multiple bus protocols.

[0056] Switch card 3 has an Ethernet switch chip and an SRIO switch chip. It can be used as a transparent relay for the interaction of multiple VPX boards, monitor and analyze the interaction process of VPX boards, and analyze and locate problems that occur during the interaction process.

[0057] The test equipment has a variety of test methods, including self-loop test and interconnection test. It can detect the communication status of VPX boards from multiple angles, helping customers locate and analyze problems quickly and accurately.

[0058] At the same time, the test baseboard 1 has an optoelectronic conversion module 5, which can be connected to the bus protocol analyzer 8 through an optical fiber cable to perform protocol interaction, CRC, and field analysis. It can simulate some protocol-level errors and send some interference data to verify the performance of the VPX board under test. It can configure test items and test methods according to customer test requirements.

[0059] In the description of this specification, the description of the terms "one embodiment", "some embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0060] The above are only preferred embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A VPX card signal testing device, characterized in that: It comprises a test baseboard (1) and a debugging board (2); The test baseboard (1) is provided with a switching card (3) and a plurality of VPX connectors (4), the switching card (3) and the plurality of VPX connectors (4) are connected with a photoelectric conversion module (5) in a one-to-one correspondence, and the switching card (3) is provided with an SGMII switching chip, an SRIO switching chip and an Ethernet switching chip; The debugging board (2) is provided with a plurality of debugging interfaces, and the switching card (3) and a plurality of VPX connectors (4) are connected to the debugging interfaces in a one-to-one correspondence.

2. The VPX card signal testing device according to claim 1, characterized in that: The test baseboard (1) includes a VPX connector (4) adapted to various types of VPX boards, including at least one adapted to 3UVPX boards.

3. The VPX board signal testing device according to claim 1, characterized in that: The test base plate (1) is provided with a high-speed probe interface (6) and a high-speed connector interface (7).

4. The VPX card signal testing device according to claim 1, characterized in that: The debugging interface includes an I2C interface, an RS232 debugging serial port, a DSP debugging interface and a JTAG debugging interface.

5. The VPX card signal testing device according to claim 1, characterized in that: The photoelectric conversion modules (5) are all connected to a bus protocol analyzer.

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