Low-insertion-loss high-isolation transceiver switch

By adding the transit branch and load in the RF circuit reception channel, and using a single-stage PIN diode series and two-stage MOSFET transistor driver circuit, the requirements of low plug-loss and high isolation transceiver switches in wireless communication systems are solved, and efficient RF signal isolation and low plug-loss transmission channels are achieved.

CN222897244UActive Publication Date: 2025-05-23CHINESE PEOPLES LIBERATION ARMY NO 6905 FACTORY
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Patent Information

Application Number
CN202421421832.6
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-06-20
Publication Date
2025-05-23
Estimated Expiration
2034-06-20

AI Technical Summary

Technical Problem

In existing wireless communication systems, it is difficult to meet higher requirements in terms of plug-in loss, isolation, switching speed and power capacity of RF transceiver switches, especially a low plug-in loss and high isolation transceiver switch is urgently needed.

Method used

A low plug-in loss high isolation transceiver switch is designed. By adding transceiver branches, reception switches, loads and absorption branches to the RF circuit reception channel, the influence of the transmitter on the receiver is reduced. A single-stage PIN diode series transmission channel and a two-stage MOSFET transistor drive circuit are used to improve the transceiver isolation and switching speed.

Benefits of technology

While keeping the transmitter insertion loss at the lowest level, the impact of the transmitter on the receiver is significantly reduced, and the isolation between the transceivers is improved, achieving an isolation effect of 65dB.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

The utility model relates to the technical field of radio frequency switches, in particular to a low-insertion-loss high-isolation transceiver switch, which reduces the influence of a transmitter on a receiver by adding a transfer branch, a receiving switch, a load and an absorption branch in a receiving channel of a radio frequency circuit, improves the transceiver isolation without changing a transmitting channel, and improves the transmission efficiency. The influence of the transmitter on the receiver is reduced under the condition that the insertion loss of the transmitting channel is kept to be the lowest, and the insertion loss of the transmitting channel is relatively low due to the fact that the transmitting channel is formed by connecting the single-stage PIN diodes in series. Compared with a single-stage MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) triode of a traditional switch driving circuit, two stages of MOSFET triodes are adopted in the driving circuit, so that the high voltage building time is shorter, the high voltage building time of the switch driving circuit is shorter, and the conduction and cut-off speeds of a radio frequency PIN diode can be effectively improved.
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Description

Technical Field

[0001] The utility model relates to the technical field of radio frequency switches, in particular to a low insertion loss and high isolation transceiver switch. Background Art

[0002] Transceiver components, also known as transmitting and receiving modules / transceiver modules, are used in almost all electronic systems. Whether it is a military radar system, a satellite communication system or a common wireless communication system on the ground, the transceiver component is its most basic component and the main part that affects the system performance. Nowadays, in order to save costs, reduce circuit volume and redundant design, a circulator or a transceiver switch is usually used to allow the receiving channel and the transmitting channel to share a pair of antennas. The circulator has the advantages of low insertion loss, easy use and no need for power supply, but its size is generally large and is not conducive to broadband applications; the RF transceiver switch can control the connection between the antenna and the transmitting channel or the receiving channel as needed, and has the characteristics of low insertion loss, high isolation, and wide bandwidth, so it has obvious advantages and is widely used.

[0003] With the development of modern wireless communication systems, higher requirements have been placed on the insertion loss, isolation, switching speed, power capacity, etc. of RF transceiver switches. Therefore, a transceiver switch with low insertion loss and high isolation is urgently needed. Utility Model Content

[0004] The technical problem solved by the utility model is that the current wireless communication system is in urgent need of a transceiver switch with low insertion loss and high isolation.

[0005] The basic solution provided by the utility model is: a low insertion loss and high isolation transceiver switch, including a radio frequency circuit and a drive circuit, wherein the radio frequency circuit includes:

[0006] A transceiver switch, a receiving switch, a load, and an antenna branch, a transmitting branch, a transfer branch, an absorbing branch, and a receiving branch for signal transmission; the transceiver switch and the receiving switch are single-pole double-throw switches;

[0007] The input end of the antenna is connected to the common end of the transceiver switch through the antenna branch, and the active end of the transceiver switch is respectively connected to one end of the transmitting branch and the transfer branch; the active end of the receiving switch is respectively connected to the other end of the transfer branch and the absorption branch, and the common end of the receiving switch is connected to one end of the receiving branch; the absorption branch is connected to one end of the load, and the other end of the load is grounded.

[0008] Further, the active end of the transceiver switch is connected to one end of the transmitting branch and the transfer branch, and the transmitting branch is connected to the positive electrode of the first PIN diode D1, the second bias circuit, the second DC blocking capacitor C2 and the transmitter in sequence along the transceiver switch; the second bias circuit includes a first choke inductor L1 and a seventh bypass capacitor C7, the first end of the first choke inductor L1 serves as the first end of the bias circuit, the first end of the seventh bypass capacitor C7 is grounded, and the second end of the first choke inductor L1 and the second end of the seventh bypass capacitor C7 are connected together as the second end K_1 of the second bias circuit and are electrically connected to the output end of the first drive circuit;

[0009] The transfer branch is connected to the positive electrode of the second PIN diode D2, the third bias circuit, the third DC blocking capacitor, the fourth DC blocking capacitor, the fourth bias circuit, the negative electrode of the third PIN diode D3 and the active end of the receiving switch in sequence along the transceiver switch; the third bias circuit includes a second choke inductor L2 and an eighth bypass capacitor C8, the first end of the second choke inductor L2 serves as the first end of the third bias circuit, the first end of the eighth bypass capacitor C8 is grounded, the second end of the second choke inductor L2 and the second end of the eighth bypass capacitor C8 are connected together as the second end K_2 of the third bias circuit and are electrically connected to the output end of the second drive circuit; the fourth bias circuit includes a third choke inductor L3 and a ninth bypass capacitor C9, the first end of the third choke inductor L3 serves as the first end of the third bias circuit, the first end of the ninth bypass capacitor C9 is grounded, the second end of the third choke inductor L3 and the second end of the ninth bypass capacitor C9 are connected together as the second end K_2 of the third bias circuit and are electrically connected to the output end of the second drive circuit.

[0010] The absorption branch is connected to the positive electrode of the fourth PIN diode D4, the fifth bias circuit, the fifth DC blocking capacitor C5 and one end of the load in sequence along the receiving switch, and the other end of the load is grounded. The fifth bias circuit includes a fourth choke inductor L4 and a tenth bypass capacitor C10, the first end of the fourth choke inductor L4 is used as the first end of the bias circuit, the first end of the tenth bypass capacitor C10 is grounded, and the second end of the fourth choke inductor L4 and the second end of the tenth bypass capacitor C10 are connected together as the second end K_1 of the fifth bias circuit and are electrically connected to the output end of the first drive circuit.

[0011] Further, the antenna branch is connected to the first bias circuit and the first DC blocking capacitor C1 in sequence along the common end of the transceiver switch, the first bias circuit includes a fifth choke inductor L5, the first end of the fifth choke inductor L5 is electrically connected to the antenna branch as the first end of the first bias circuit, and the second end of the fifth choke inductor L5 is grounded as the second end of the first bias circuit;

[0012] The receiving branch is connected to the sixth bias circuit, the sixth DC blocking capacitor C6 and the receiver in sequence along the common end of the receiving switch. The sixth bias circuit includes a sixth choke inductor L6. The first end of the sixth choke inductor L6 is electrically connected to the receiving branch as the first end of the sixth bias circuit, and the second end of the sixth choke inductor L6 is grounded as the second end of the sixth bias circuit.

[0013] Further, the driving circuit includes a first MOSFET transistor Q1, a second MOSFET transistor Q2, a voltage stabilizing diode D1, a first control level K_in1, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4 and a fifth resistor R5;

[0014] The first end of the first resistor R1 is electrically connected to the first control level K_in1, the second end of the first resistor R1 is electrically connected to the gate of the first MOSFET transistor Q1, the gate of the first MOSFET transistor Q1 is electrically connected to the first end of the second resistor R2, and the source of the first MOSFET transistor Q1 is electrically connected to the negative electrode of the power supply and the second end of R2 respectively;

[0015] The gate of the second MOSFET transistor Q2 is electrically connected to the drain of the first MOSFET transistor Q1, the negative electrode of the voltage-stabilizing diode D1, and the first end of the third resistor R3; the drain of the second MOSFET transistor Q2 is electrically connected to the first end of the fourth resistor R4, and the second end of the third resistor R3 is electrically connected to the second end of the fourth resistor R4 and the positive electrode of the power supply; the source of the second MOSFET transistor Q2 is electrically connected to the positive electrode of the voltage-stabilizing diode D1 and the first end of the fifth resistor R5, and the second end of the fifth resistor R5 is electrically connected to the RF circuit as the output end of the driving circuit.

[0016] Furthermore, the load includes a load resistor, a ceramic sheet, a copper plate and a copper foil welding sheet. The load resistor is encapsulated in the ceramic sheet, the ceramic sheet is fixed on the surface of the copper plate, the copper plate is provided with a plurality of fixing screw holes, the load resistor is led out through the copper foil welding sheet and electrically connected to the absorption branch, and the copper plate is fixed on the wall of the metal box body to achieve grounding.

[0017] Furthermore, the antenna branch, transmitting branch, transfer branch, absorbing branch and receiving branch all adopt a microstrip line transmission structure.

[0018] Furthermore, the antenna branch, the transmitting branch, the transfer branch, the absorbing branch and the receiving branch are all isolated by a metal cavity.

[0019] The principle and advantage of the utility model are: the utility model reduces the influence of the transmitter on the receiver by adding a transfer branch, a receiving switch, a load and an absorption branch to the receiving channel of the radio frequency circuit, improves the isolation between transmission and reception without changing the transmission channel, and reduces the influence of the transmitter on the receiver while keeping the insertion loss of the transmission channel at the lowest. The transmission channel adopts a single-stage PIN diode in series, which makes the insertion loss of the transmission channel lower. A two-stage MOSFET triode is used in the driving circuit. Compared with the single-stage MOSFET triode of the traditional switch driving circuit, the high voltage establishment time is faster. The high voltage establishment time of the utility model is faster, which can effectively improve the conduction and cutoff speed of the radio frequency PIN diode. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 It is a schematic diagram of an embodiment of a low insertion loss and high isolation transceiver switch of the utility model.

[0021] Figure 2 Schematic diagram of traditional transceiver switch circuit.

[0022] Figure 3 Schematic diagram of the traditional transceiver switch series circuit.

[0023] Figure 4 Schematic diagram of the traditional transceiver switch serial and parallel circuit.

[0024] Figure 5 The present invention is a schematic diagram of a load structure of a low insertion loss and high isolation transceiver switch embodiment of the present invention.

[0025] Figure 6 This is a schematic diagram of the on-resistance of a PIN diode in an embodiment of a low insertion loss and high isolation transceiver switch of the utility model.

[0026] Figure 7 This is a schematic diagram of a PIN diode cut-off resistor in an embodiment of a low insertion loss and high isolation transceiver switch of the utility model. DETAILED DESCRIPTION

[0027] The following is further described in detail through specific implementation methods:

[0028] The symbols in the drawings of the specification include: ceramic sheet 1, copper plate 2, copper foil welding sheet 3, fixing screw hole 4.

[0029] The specific implementation process is as follows:

[0030] Implementation example Figure 1As shown, a low insertion loss and high isolation transceiver switch includes a radio frequency circuit and a drive circuit, which are respectively designed on two printed boards and isolated by a metal cavity. The radio frequency circuit includes a transceiver switch, a receiving switch, a load, and an antenna branch, a transmitting branch, a transfer branch, an absorbing branch, and a receiving branch for signal transmission; the transceiver switch and the receiving switch are single-pole double-throw switches.

[0031] Specifically, the input end of the antenna is connected to the common end of the transceiver switch through the antenna branch, the active end of the transceiver switch is connected to one end of the transmitting branch and the transfer branch respectively, and the other end of the transmitting branch is connected to the transmitter; the active end of the receiving switch is connected to the other end of the transfer branch and the absorption branch respectively, the common end of the receiving switch is connected to one end of the receiving branch, and the other end of the receiving branch is connected to the receiver; the absorption branch is connected to one end of the load, and the other end of the load is grounded. By adding the transfer branch, the receiving switch, the load and the absorption branch to the receiving channel of the RF circuit, the influence of the transmitter on the receiver is reduced, the transceiver isolation is improved without changing the transmitting channel, and the influence of the transmitter on the receiver is reduced while keeping the insertion loss of the transmitting channel to the minimum. The transmitting channel adopts a single-stage PIN diode in series, which makes the insertion loss of the transmitting channel low.

[0032] The transceiver switch of the radio frequency circuit in this embodiment includes a first PIN diode D1, a second PIN diode D2, a first choke inductor L1, a second choke inductor L2, a fifth choke inductor L5, a first blocking capacitor C1, a second blocking capacitor C2, a third blocking capacitor C3, a seventh bypass capacitor C7, and an eighth bypass capacitor C8. The receiving switch is composed of a third PIN diode D3, a fourth PIN diode D4, a third choke inductor L3, a fourth choke inductor L4, a sixth choke inductor L6, a fourth blocking capacitor C4, a fifth blocking capacitor C5, a sixth blocking capacitor C6, a ninth bypass capacitor C9, and a tenth bypass capacitor C10.

[0033] Specifically, the input end of the antenna is connected to the common end of the transceiver switch through an antenna branch, and the antenna branch is connected in sequence with a first DC blocking capacitor C1 and a first bias circuit, the first bias circuit includes a fifth choke inductor L5, the first end of the fifth choke inductor L5 is electrically connected to the antenna branch as the first end of the first bias circuit, and the second end of the fifth choke inductor L5 is grounded as the second end of the first bias circuit.

[0034] The active end of the transceiver switch is connected to one end of the transmitting branch and the transfer branch. The transmitting branch is connected to the positive electrode of the first PIN diode D1, the second bias circuit, the second DC blocking capacitor C2 and the transmitter in sequence. The second bias circuit includes a first choke inductor L1 and a seventh bypass capacitor C7. The first end of the first choke inductor L1 serves as the first end of the bias circuit, the first end of the seventh bypass capacitor C7 is grounded, and the second end of the first choke inductor L1 and the second end of the seventh bypass capacitor C7 are connected in common as the second end K_1 of the second bias circuit and are electrically connected to the output end of the first drive circuit.

[0035] The transit branch is connected to the positive electrode of the second PIN diode D2, the third bias circuit, the third DC blocking capacitor, the fourth DC blocking capacitor, the fourth bias circuit, the negative electrode of the third PIN diode D3 and the active end of the receiving switch in sequence. The third bias circuit includes a second choke inductor L2 and an eighth bypass capacitor C8, the first end of the second choke inductor L2 serves as the first end of the third bias circuit, the first end of the eighth bypass capacitor C8 is grounded, the second end of the second choke inductor L2 and the second end of the eighth bypass capacitor C8 are connected together as the second end K_2 of the third bias circuit and are electrically connected to the output end of the second drive circuit. The fourth bias circuit includes a third choke inductor L3 and a ninth bypass capacitor C9, the first end of the third choke inductor L3 serves as the first end of the third bias circuit, the first end of the ninth bypass capacitor C9 is grounded, the second end of the third choke inductor L3 and the second end of the ninth bypass capacitor C9 are connected together as the second end K_2 of the third bias circuit and are electrically connected to the output end of the second drive circuit.

[0036] The active end of the receiving switch is also connected to an absorption branch, which is connected to the positive electrode of the fourth PIN diode D4, the fifth bias circuit, the fifth DC blocking capacitor C5 and one end of the load in sequence from the receiving switch, and the other end of the load is grounded. The fifth bias circuit includes a fourth choke inductor L4 and a tenth bypass capacitor C10, the first end of the fourth choke inductor L4 serves as the first end of the bias circuit, the first end of the tenth bypass capacitor C10 is grounded, and the second end of the fourth choke inductor L4 and the second end of the tenth bypass capacitor C10 are connected together as the second end K_1 of the fifth bias circuit and are electrically connected to the output end of the first drive circuit.

[0037] The common end of the receiving switch is also connected to a receiving branch, and the receiving branch is connected to a sixth bias circuit, a sixth DC blocking capacitor and a receiver in sequence along the receiving switch. The sixth bias circuit includes a sixth choke inductor L6. The first end of the sixth choke inductor L6 is electrically connected to the receiving branch as the first end of the sixth bias circuit, and the second end of the sixth choke inductor L6 is grounded as the second end of the sixth bias circuit.

[0038] The load in this embodiment includes a load resistor, a ceramic sheet 1, a copper plate 2, and a copper foil solder sheet 3. The resistor is a 50 ohm standard resistor load, such as Figure 5As shown, a 50-ohm standard resistor is encapsulated in a ceramic sheet 1, and the ceramic sheet 1 is fixed to the surface of a copper plate 2 by means of thermal conductive adhesive. The copper plate 2 is provided with a plurality of fixing screw holes 4. When in use, it is installed together with the target device box by means of screw installation, and then the copper foil welding piece 3 is welded together with the absorption branch, and the load resistor is led out through the copper foil welding piece 3 and electrically connected to the absorption branch.

[0039] The driving circuit in this embodiment includes a first driving circuit and a second driving circuit that are completely identical, and the first driving circuit includes a first MOSFET triode Q1, a second MOSFET triode Q2, a voltage stabilizing diode D1, a first control level K_in1, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4 and a fifth resistor R5;

[0040] The first end of the first resistor R1 is electrically connected to the first control level K_in1, the second end of the first resistor R1 is electrically connected to the gate of the first MOSFET transistor Q1, the gate of the first MOSFET transistor Q1 is electrically connected to the first end of the second resistor R2, and the source of the first MOSFET transistor Q1 is electrically connected to the negative electrode of the power supply and the second end of R2 respectively;

[0041] The gate of the second MOSFET transistor Q2 is electrically connected to the drain of the first MOSFET transistor Q1, the negative electrode of the voltage zener diode D1, and the first end of the third resistor R3; the drain of the second MOSFET transistor Q2 is electrically connected to the first end of the fourth resistor R4, and the second end of the third resistor R3 is electrically connected to the second end of the fourth resistor R4 and the positive electrode of the power supply; the source of the second MOSFET transistor Q2 is electrically connected to the positive electrode of the voltage zener diode D1 and the first end of the fifth resistor R5, and the second end of the fifth resistor R5 is electrically connected to the RF circuit as the output end of the drive circuit. The second drive circuit has the same structure as the first drive circuit, and is connected to the RF circuit through the K_Out2 end and the K_2 of the RF circuit, and is level controlled through the second control level K_in2, and outputs a corresponding high-voltage or negative-voltage analog signal.

[0042] In this embodiment, the first drive circuit and the second drive circuit respectively input high and low level digital control signals through the first control level K_in1 and the second control level K_in2, and output corresponding high voltage (generally greater than 200V) or negative voltage (generally -3.3V or -5V) analog signals, and the output signal is connected to the choke inductor corresponding to the radio frequency circuit. When the input of the drive circuit is a low level, the output is a high voltage (generally greater than 200V), and when the input of the drive circuit is a high level, the output is a negative voltage (generally -3.3V or -5V).

[0043] When the drive circuit output is high voltage, the corresponding PIN diode is cut off, and the corresponding branch RF channel is in the cut-off state. When the drive circuit output is negative voltage, the corresponding PIN diode is turned on, and the corresponding branch RF channel is in the turned-on state.

[0044] The transmitter and receiver in this embodiment are in half-duplex communication mode and will not work at the same time. Among them, the antenna branch, transmitting branch, transfer branch, absorption branch and receiving branch are coaxial lines, microstrip lines, coplanar waveguides or other transmission line structures. The width of the microstrip line and coplanar waveguide is related to the thickness and dielectric constant of the printed circuit board, and is generally greater than or equal to 2mm to avoid the problem of increased insertion loss due to the narrow microstrip line. All branch microstrip lines must ensure a certain spacing to avoid the problem of reduced switch isolation due to spatial coupling of the microstrip lines. When the switch design frequency is high, each branch is isolated by metal cavity isolation.

[0045] When the transmitter is working, the transceiver switch is switched to the transmitting branch, the receiving switch is switched to the absorbing branch, and the transmitter transmits the RF signal to the transmitting branch. The RF signal leaked by the transceiver switch is isolated twice by the transceiver switch and the receiving switch, and finally absorbed by the load. The RF signal transmitted to the receiving branch is very weak, ensuring the high isolation of the transceiver. Since the transmitting channel uses a single-stage PIN diode, the insertion loss of the transmitting channel is extremely low.

[0046] When the receiver is working, the transceiver switch is switched to the transfer branch, and the receiving switch is switched to the transfer branch. The RF signal received by the antenna is very weak. Although the isolation of the transceiver switch is limited, the RF signal leaked to the transmitting branch is even weaker and will not affect the performance of the transmitter.

[0047] Specifically, when working in the transmitting state, the transceiver switch switches to the transmitting branch (the first PIN diode D1 is turned on and the second PIN diode D2 is turned off), and the receiving switch switches to the absorbing branch (the fourth PIN diode D4 is turned on and the third PIN diode D3 is turned off). The transmitter transmits the RF signal to the transmitting branch. The RF signal leaked by the transceiver switch is isolated twice by the transceiver switch and the receiving switch (the second PIN diode D2 and the third PIN diode D3 are isolated twice), and finally absorbed by the load (the fourth PIN diode D4 is turned on). The RF signal transmitted to the receiving branch is very weak, ensuring the high isolation of the transceiver. Since the transmitting channel adopts a single-stage PIN diode D1, the insertion loss of the transmitting channel is extremely low; when working in the receiving state, the transceiver switch switches to the transit branch (the second PIN diode D2 is turned on and the first PIN diode D1 is turned off), and the receiving switch switches to the transit branch (the third PIN diode D3 is turned on and the fourth PIN diode D4 is turned off). The RF signal received by the antenna is very weak. Although the isolation of the transceiver switch is limited (isolation of the first PIN diode D1), the RF signal leaked to the transmitting branch is even weaker and will not affect the performance of the transmitter.

[0048] like Figure 6 As shown in FIG. 1 , the internal resistance of the PIN diode MA4P7470-1072T used in this embodiment when it is turned on is less than about 0.3 ohms when the supply current is 100 mA, so the impact on the insertion loss of the transmission channel is minimal. Figure 7 As shown in the figure, when the reverse bias supply voltage is 100V, the equivalent internal resistance is greater than 40 kilo-ohms. When the transmission signal leaks to the receiving branch, it will be isolated twice by two-stage PIN diodes D2 and D3 (the equivalent internal resistance is greater than 80 kilo-ohms). When the RF signal is 50MHz, the isolation provided by the second PIN diode D2 and the third PIN diode D3 is about 50dB. If an absorption load is used, the isolation can be increased to 65dB without affecting the insertion loss of the transmission channel.

[0049] Traditional transceiver switches such as Figure 2 As shown, there is only one single-pole double-throw switch inside. In order to increase the isolation between the transceiver, multiple diodes must be connected in series. Figure 3 As shown, or a multi-stage series-parallel structure is used as Figure 4 As shown. Using multiple diodes in series will increase the insertion loss of the transmitting channel and the receiving channel, and the number of diodes in series should not be too large, otherwise it will cause problems such as increased parasitic parameters. Using a series-parallel structure can increase the isolation between the transceiver. Figure 6 It can be seen that this will cause the transmission channel loss to increase, increase the heat generated by the equipment, and reduce reliability. Figure 4Although the serial-parallel structure circuit shown can increase the isolation, when working in the transmitting state, it only experiences the isolation of the PIN diode D_RS1 and the ground isolation of the parallel PIN diode D_RP1. Obviously, compared with the utility model, the isolation is lower, and the number of serial-parallel circuits must be increased to further improve the isolation. At this time, problems such as circuit complexity and increased power consumption are caused.

[0050] Compared with the traditional transceiver switch, the utility model adopts a single-pole double-throw switch with two single-stage PIN diodes in series, which ensures the lowest insertion loss in the transmission channel (only one PIN diode internal resistance causes insertion loss), and the receiving channel also has only two-stage PIN diode internal resistance. By introducing a load to absorb the leaked RF signal of the transmitter, the transceiver isolation is greatly improved. Moreover, the transceiver switch and the receiving switch of the RF circuit of the utility model both adopt a single-stage PIN diode series structure, the circuit is simple, and high-speed switching can be achieved by using two completely identical driving currents.

[0051] The utility model can work in UHF or even higher frequency bands, and only needs to select appropriate PIN diodes, choke inductors, DC blocking capacitors and bypass capacitors. The present embodiment was experimented with 50MHz as follows during implementation.

[0052] When the utility model works in the transmitting state, it receives the external control codes K_in1 and K_in2, and then the corresponding MOSFET transistors are turned on or off. The detailed working state of the driving circuit is shown in Table 1.

[0053] Table 1 Driving circuit working status

[0054]

[0055] The output of the driving circuit is connected to the choke inductor of the RF circuit. The detailed working status of the RF circuit is shown in Table 2.

[0056] Table 2 RF circuit working status

[0057]

[0058]

[0059] From the analysis of Table 1 and Table 2, it can be seen that the two states of control codes K_in1 and K_in2 being "00" and "11" are abnormal working states and should be avoided during use.

[0060] When the utility model works in the transmitting state, the input control codes K_in1 and K_in2 are required to be "10". The first circuit MOSFET transistor Q1 and the fourth circuit MOSFET transistor Q4 are driven to be turned on, and the second circuit MOSFET transistor Q2 and the third circuit MOSFET transistor Q3 are turned off. The driving current output K_Out1 is a negative voltage (-3.3V or -5V), and K_Out2 is a high voltage (generally greater than 200V). K_Out1 and K_Out2 are respectively connected to K_1 and K_2 of the radio frequency circuit, corresponding to the first PIN diode D1 and the fourth PIN diode D4 being turned on, and the second PIN diode D2 and the third PIN diode D3 being turned off. The transceiver switch turns on the transmitting branch and closes the transfer branch, and the receiving switch turns on the absorbing branch and closes the transfer branch, so the utility model works in the transmitting state. Therefore, after the transmitter transmits a 50MHz radio frequency signal, the 50MHz radio frequency signal can pass smoothly after reaching the first PIN diode D1 along the transmitting branch, and then reaches the antenna through the antenna branch. Due to the limited isolation of the transceiver switch (when the second PIN diode D2 is cut off, the isolation is limited), when the 50MHz RF signal reaches the first PIN diode D1, a part of the RF signal will get rid of the isolation of the second PIN diode D2 and enter the transfer branch (about -25dB), and the third PIN diode D3 is also in the cut-off state, so when the RF signal passes through the third PIN diode D3 again, it is about -50dB. At this time, the fourth PIN diode D4 is in the on state, so the RF signal can be absorbed by the load through the fourth PIN diode D4 with almost no loss. The 50MHz RF signal leaked from the receiving port is very weak, about -65dB. There is only one first PIN diode D1 in the transmitting channel, so the insertion loss of the transmitting channel is very low, about -0.1dB. The isolation between the transmitting end and the receiving end is 65dB.

[0061] When the utility model works in the receiving state, the control codes K_in1 and K_in2 need to be input as "01". The second MOSFET transistor Q2 and the third MOSFET transistor Q3 of the driving circuit are turned on, and the first MOSFET transistor Q1 and the fourth MOSFET transistor Q4 are turned off. The driving current output K_Out1 is a high voltage (generally greater than 200V), and K_Out2 is a negative voltage (-3.3V or -5V). K_Out1 and K_Out2 are respectively connected to K_1 and K_2 of the RF circuit, corresponding to the first PIN diode D1 and the fourth PIN diode D4 being turned off, and the second PIN diode D2 and the third PIN diode D3 being turned on. The transceiver switch turns off the transmitting branch and turns on the transfer branch, and the receiving switch turns off the absorbing branch and turns on the transfer branch, so the utility model works in the receiving state. The antenna receives an external 50MHz RF signal, which is generally very weak, assuming it is -60dBm. The 50MHz RF signal can pass through the transfer branch with almost no insertion loss through the antenna and the transceiver switch, enter the receiving branch, and then be received by the receiver. The entire receiving channel only has the second PIN diode D2 and the third PIN diode D3 connected in series, and the insertion loss of the receiving channel is about -0.2dB, which is within the acceptable range of the receiver. Although the first PIN diode D1 is cut off, some RF signals will still break away from its blockage and enter the transmitting branch. When a single PIN diode is cut off, the isolation is about -25dB, so the RF signal entering the transmitting branch is -85dBm, which is very weak and will not cause any impact on the transmitter.

[0062] The above-mentioned drive circuit adopts two-stage MOSFET triodes. Compared with the single-stage MOSFET triodes of the traditional switch drive circuit, the high voltage build-up time is faster, which can improve the conduction and cut-off speeds of the RF PIN diode.

[0063] In summary, compared with the traditional utility model, the utility model adds a single-pole double-throw switch and a load in the receiving channel of the RF circuit, which can significantly improve the isolation between transmission and reception, and the isolation reaches 65dB at 50MHz. The transmission channel only uses a single-stage PIN diode in series, so the insertion loss of the transmission channel is very low, about -0.1dB. The utility model uses two single-pole double-throw switches and a load in combination, which not only ensures the low insertion loss of the transmission channel, but also improves the isolation between transmission and reception.

[0064] The above are only embodiments of the utility model. The common sense such as the known specific structures and characteristics in the scheme is not described in detail here. The ordinary technicians in the relevant field know all the common technical knowledge in the technical field of the utility model before the application date or priority date, can obtain all the existing technologies in the field, and have the ability to apply the conventional experimental means before that date. The ordinary technicians in the relevant field can improve and implement this scheme in combination with their own abilities under the enlightenment given by this application. Some typical known structures or known methods should not become obstacles for ordinary technicians in the relevant field to implement this application. It should be pointed out that for the technicians in this field, without departing from the structure of the utility model, several deformations and improvements can be made, which should also be regarded as the protection scope of the utility model, which will not affect the effect of the implementation of the utility model and the practicality of the patent. The protection scope required by this application shall be based on the content of its claims, and the specific implementation methods and other records in the specification can be used to explain the content of the claims.

Claims

1. A low insertion loss and high isolation transceiver switch, comprising a radio frequency circuit and a drive circuit, characterized in that: The radio frequency circuit includes a transceiver switch, a receiving switch, a load, and an antenna branch, a transmitting branch, a transfer branch, an absorbing branch, and a receiving branch for signal transmission; the transceiver switch and the receiving switch are single-pole double-throw switches; The input end of the antenna is connected to the common end of the transceiver switch through the antenna branch, and the active end of the transceiver switch is respectively connected to one end of the transmission branch and the transfer branch; the active end of the receiving switch is respectively connected to the other end of the transfer branch and the absorption branch, and the common end of the receiving switch is connected to one end of the receiving branch; The absorption branch is connected to one end of the load, and the other end of the load is grounded.

2. The low insertion loss and high isolation transceiver switch according to claim 1, characterized in that: The active end of the transceiver switch is connected to one end of the transmitting branch and the transfer branch, and the transmitting branch is connected to the positive electrode of the first PIN diode D1, the second bias circuit, the second DC blocking capacitor C2 and the transmitter in sequence along the transceiver switch; the second bias circuit includes a first choke inductor L1 and a seventh bypass capacitor C7, the first end of the first choke inductor L1 serves as the first end of the bias circuit, the first end of the seventh bypass capacitor C7 is grounded, and the second end of the first choke inductor L1 and the second end of the seventh bypass capacitor C7 are connected together as the second end K_1 of the second bias circuit and are electrically connected to the output end of the first drive circuit; The transfer branch is connected to the positive electrode of the second PIN diode D2, the third bias circuit, the third DC blocking capacitor, the fourth DC blocking capacitor, the fourth bias circuit, the negative electrode of the third PIN diode D3 and the active end of the receiving switch in sequence along the transceiver switch; the third bias circuit includes a second choke inductor L2 and an eighth bypass capacitor C8, the first end of the second choke inductor L2 serves as the first end of the third bias circuit, the first end of the eighth bypass capacitor C8 is grounded, the second end of the second choke inductor L2 and the second end of the eighth bypass capacitor C8 are connected together as the second end K_2 of the third bias circuit and are electrically connected to the output end of the second drive circuit; the fourth bias circuit includes a third choke inductor L3 and a ninth bypass capacitor C9, the first end of the third choke inductor L3 serves as the first end of the third bias circuit, the first end of the ninth bypass capacitor C9 is grounded, the second end of the third choke inductor L3 and the second end of the ninth bypass capacitor C9 are connected together as the second end K_2 of the third bias circuit and are electrically connected to the output end of the second drive circuit; The absorption branch is connected to the positive electrode of the fourth PIN diode D4, the fifth bias circuit, the fifth DC blocking capacitor C5 and one end of the load in sequence along the receiving switch, and the other end of the load is grounded; wherein, the fifth bias circuit includes a fourth choke inductor L4 and a tenth bypass capacitor C10, the first end of the fourth choke inductor L4 serves as the first end of the bias circuit, the first end of the tenth bypass capacitor C10 is grounded, and the second end of the fourth choke inductor L4 and the second end of the tenth bypass capacitor C10 are connected together as the second end K_1 of the fifth bias circuit and electrically connected to the output end of the first drive circuit.

3. The low insertion loss and high isolation transceiver switch according to claim 2, characterized in that: The antenna branch is connected to the first bias circuit and the first DC blocking capacitor C1 in sequence along the common end of the transceiver switch, the first bias circuit includes a fifth choke inductor L5, the first end of the fifth choke inductor L5 is electrically connected to the antenna branch as the first end of the first bias circuit, and the second end of the fifth choke inductor L5 is grounded as the second end of the first bias circuit; The receiving branch is connected to the sixth bias circuit, the sixth DC blocking capacitor C6 and the receiver in sequence along the common end of the receiving switch. The sixth bias circuit includes a sixth choke inductor L6. The first end of the sixth choke inductor L6 is electrically connected to the receiving branch as the first end of the sixth bias circuit, and the second end of the sixth choke inductor L6 is grounded as the second end of the sixth bias circuit.

4. The low insertion loss and high isolation transceiver switch according to claim 3, characterized in that: The driving circuit includes a first MOSFET transistor Q1, a second MOSFET transistor Q2, a voltage stabilizing diode D1, a first control level K_in1, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4 and a fifth resistor R5; A first end of the first resistor R1 is electrically connected to the first control level K_in1, a second end of the first resistor R1 is electrically connected to the gate of the first MOSFET transistor Q1, the gate of the first MOSFET transistor Q1 is electrically connected to a first end of the second resistor R2, and a source of the first MOSFET transistor Q1 is electrically connected to a negative electrode of a power supply and a second end of R2; The gate of the second MOSFET transistor Q2 is electrically connected to the drain of the first MOSFET transistor Q1, the negative electrode of the voltage zener diode D1, and the first end of the third resistor R3; the drain of the second MOSFET transistor Q2 is electrically connected to the first end of the fourth resistor R4, and the second end of the third resistor R3 is electrically connected to the second end of the fourth resistor R4 and the positive electrode of the power supply; the source of the second MOSFET transistor Q2 is electrically connected to the positive electrode of the voltage zener diode D1 and the first end of the fifth resistor R5, and the second end of the fifth resistor R5 is electrically connected to the RF circuit as the output end of the drive circuit.

5. The low insertion loss and high isolation transceiver switch according to claim 4, characterized in that: The load includes a load resistor, a ceramic sheet, a copper plate and a copper foil welding sheet. The load resistor is encapsulated in the ceramic sheet, the ceramic sheet is fixed on the surface of the copper plate, the copper plate is provided with a plurality of fixing screw holes, and the load resistor is led out through the copper foil welding sheet and electrically connected to the absorption branch.

6. The low insertion loss and high isolation transceiver switch according to claim 5, characterized in that: The antenna branch, the transmitting branch, the transfer branch, the absorbing branch and the receiving branch all adopt a microstrip line transmission structure.

7. The low insertion loss and high isolation transceiver switch according to claim 6, characterized in that: The antenna branch, the transmitting branch, the transfer branch, the absorbing branch and the receiving branch are all isolated by a metal cavity.