Solar cell and photovoltaic module

By setting alternately distributed fine gates and inclined edges on the silicon wafer of the solar cell, the problem of small light-receiving area of ​​the existing solar cell is solved, and a higher power generation efficiency is achieved.

CN222897496UActive Publication Date: 2025-05-23ZHEJIANG AIKO SOLAR ENERGY TECH CO LTD +4
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Patent Information

Application Number
CN202421810572.1
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Priority Date
2024-04-26
Filing Date
2024-07-29
Publication Date
2025-05-23
Estimated Expiration
2034-07-29

AI Technical Summary

Technical Problem

The light-receiving area of ​​existing solar cells is small, which affects the power generation efficiency.

Method used

A solar cell is designed, including a silicon wafer and a thin gate arranged on the silicon wafer. The thin gates are alternately distributed in the first direction. The silicon wafer has an inclined edge and a connecting line. The connecting line is connected to a thin gate with less than or equal to four, ensuring that the first inclined edge is small and the connecting line is short, and the light receiving area is retained to the maximum extent.

Benefits of technology

By reducing the length of the inclined edge and connecting lines, the light receiving area of ​​the battery is maximized, thereby improving power generation efficiency.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model is applicable to the technical field of solar power generation, and provides a solar cell and a photovoltaic assembly, the solar cell comprises a silicon wafer and fine grids arranged on the silicon wafer, the fine grids comprise first fine grids and second fine grids which are alternately distributed along a first direction, the silicon wafer is provided with a first edge, a second edge, a third edge and a fourth edge, the first inclined edge is connected with the first edge and the third edge, the first connecting line is adjacent to the first inclined edge and connected with the first fine grid or the second fine grid, and the distance between the first inclined edge and the intersection point of the first edge and the third edge is smaller than or equal to 2.5 mm. The number of the first fine grids or the second fine grids connected with the first connecting lines is smaller than or equal to four. The first inclined edge is made to be very small, so that the first connecting line located at the first inclined edge is relatively short, only less than or equal to four first fine grids or second fine grids can be connected, the light receiving area of the battery piece is ensured as far as possible, and the conversion efficiency of the battery piece is ensured.
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Description

[0001] This application claims priority to the Chinese patent application with application number 202420895917.1 and application name “Bus-free back-contact solar cell, battery module and photovoltaic system” filed on April 26, 2024 with the State Intellectual Property Office of China, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The utility model belongs to the technical field of solar power generation, and in particular relates to a solar cell and a photovoltaic component. Background Art

[0003] Solar cells are devices that directly convert light energy into electrical energy through the photoelectric effect. Crystalline silicon cells use silicon wafers as substrates and are divided into P-type cells and N-type cells based on the differences in silicon wafers. There is no essential difference in the power generation principles of these two types of cells, and both are based on PN junctions to separate photogenerated carriers.

[0004] In the production process of solar cells, the crystal column is cut and smoothed to obtain thin slices of suitable size and shape, and qualified silicon wafers can be obtained after subsequent etching, polishing, cleaning and evaluation processes. For silicon wafers, the size of the front side (light-receiving side) of the silicon wafer plays a vital role in the power conversion efficiency. The use of square silicon wafers is the best choice, and when the square silicon wafers form a square array, the gaps between adjacent silicon wafers are very small or even non-existent, ensuring the power generation efficiency.

[0005] The existing silicon wafers are all chamfered, and the edges of the chamfered silicon wafers have lower central stress, making them stronger. However, the chamfers of existing silicon wafers are usually made larger, resulting in a smaller light-receiving surface area of ​​the silicon wafer, affecting the power generation efficiency. Utility Model Content

[0006] The embodiments of the utility model provide a solar cell and a photovoltaic module, aiming to solve the problem that the existing solar cell has a small light-receiving surface area that affects the power generation efficiency.

[0007] The utility model is implemented in this way: a solar cell comprises:

[0008] A silicon wafer, on which a plurality of fine gates are arranged, the fine gates comprising first fine gates and second fine gates alternately distributed along a first direction;

[0009] Silicon wafers have:

[0010] A first edge and a second edge disposed opposite to each other along a second direction, and a third edge and a fourth edge disposed opposite to each other along the first direction, wherein the second direction is perpendicular to the first direction;

[0011] a first inclined edge connecting the first edge and the third edge; and

[0012] A first connecting line disposed adjacent to the first inclined edge, the first connecting line being connected to at least one first fine grid or at least one second fine grid;

[0013] The intersection of the first inclined edge and the first edge is the first intersection, the intersection of the first inclined edge and the third edge is the second intersection, the distance between the first intersection and the second intersection is less than or equal to 2.5 mm, and the number of first fine grids or second fine grids connected by the first connecting line is less than or equal to four.

[0014] Furthermore, the first inclined edge is a straight line or an arc.

[0015] Further, the first connecting line is not parallel to the first inclined edge.

[0016] Further, the first connecting line includes a first connecting portion and a second connecting portion, and a width of the first connecting portion is smaller than a width of the second connecting portion.

[0017] Furthermore, the first connection portion is connected to the second connection portion, and the first connection portion is a slanted line.

[0018] Furthermore, the second connection portion and the first connection portion are connected via a thin grid.

[0019] Further, the second connection portion and the first connection portion are parallel to the first direction.

[0020] Furthermore, the ratio of the width of the fine gate to the width of the first connection line is 1:1.2 to 1:2.

[0021] Furthermore, the ratio of the width of the fine gate to the width of the first connection line is 1:1.6-1:1.8.

[0022] Furthermore, the distance between the first intersection point and the second intersection point is 0.7 mm to 2.5 mm.

[0023] Furthermore, the distance between the first intersection point and the second intersection point is 1.2 mm to 1.6 mm.

[0024] Further, the silicon wafer includes a second inclined edge connecting the first edge and the fourth edge;

[0025] A second connecting line adjacent to the second inclined edge is arranged on the silicon wafer, and the second connecting line is connected to at least one first fine gate or at least one second fine gate;

[0026] The first connection line and the second connection line are connected to fine gates having the same polarity.

[0027] Further, the silicon wafer includes a third inclined edge connecting the second edge and the third edge;

[0028] A third connecting line adjacent to the third inclined edge is arranged on the silicon wafer, and the third connecting line is connected to at least one first fine gate or at least one second fine gate;

[0029] The first connection line and the third connection line are connected to fine gates having opposite polarities.

[0030] Furthermore, an angle between the first connecting line and the second direction is greater than an angle between the third connecting line and the second direction.

[0031] Further, the first connecting line is connected to the first fine gate, and along the second direction, the distance between the end point of the second fine gate adjacent to the first connecting line and the first connecting line is smaller than the distance between the first connecting line and the first inclined edge; or

[0032] The first connecting line is connected to the second fine grid. Along the second direction, the distance between the end point of the first fine grid adjacent to the first connecting line and the first connecting line is smaller than the distance between the first connecting line and the first inclined edge.

[0033] Further, along the second direction, a distance between the first connecting line and the first inclined edge is greater than a distance between the third connecting line and the third inclined edge.

[0034] Further, the first connection line is connected to the first fine gate, and the third connection line is connected to the second fine gate;

[0035] Along the second direction, the width of the first connection line is smaller than the width of the third connection line.

[0036] Furthermore, the line width of the second fine gate is greater than the line width of the first fine gate.

[0037] In a second aspect, the present application also provides a photovoltaic module, comprising the solar cell as described above.

[0038] The beneficial effect of the present application is that the solar cell of the present application comprises a silicon wafer and a fine grid arranged on the silicon wafer (an intermediate layer may be arranged between the fine grid and the silicon wafer), the fine grid comprises a first fine grid and a second fine grid alternately distributed along a first direction, the silicon wafer has a first edge and a second edge arranged oppositely along a second direction, and a third edge and a fourth edge arranged oppositely along the first direction, the second direction is perpendicular to the first direction, the first inclined edge connects the first edge and the third edge, the first connecting line is adjacent to the first inclined edge, the first connecting line is connected to the first fine grid or the second fine grid, the intersection of the first inclined edge and the first edge is the first intersection, the intersection of the first inclined edge and the third edge is the second intersection, the distance between the first intersection and the second intersection is less than or equal to 2.5 mm, and the number of the first fine grid or the second fine grid connected by the first connecting line is less than or equal to four. Through the above arrangement, the first inclined edge can be made very small, and then the first connecting line located at the first inclined edge is shorter, and can only connect less than or equal to four first fine grids or second fine grids, so as to ensure the light receiving area of ​​the cell as much as possible and ensure the conversion efficiency of the cell. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Figure 1 is a module schematic diagram of a photovoltaic system provided in an embodiment of the present application;

[0040] Figure 2 is a module schematic diagram of a battery assembly provided in an embodiment of the present application;

[0041] Figure 3 is a schematic diagram of the planar structure of the back side of a solar cell provided in an embodiment of the present application;

[0042] Figure 4 yes Figure 3 A partial enlarged schematic diagram of a solar cell at a first conductive contact structure;

[0043] Figure 5 yes Figure 3 Another partial enlarged schematic diagram of the solar cell at the first conductive contact structure;

[0044] Figure 6 yes Figure 3 Another partial enlarged schematic diagram of the solar cell at the first conductive contact structure;

[0045] Figure 7 yes Figure 3 Another partial enlarged schematic diagram of the solar cell at the first conductive contact structure;

[0046] Figure 8 yes Figure 3 A partial enlarged schematic diagram of a solar cell at a second conductive contact structure;

[0047] Fig. 9 yes Figure 3 Another partial enlarged schematic diagram of the solar cell at the second conductive contact structure;

[0048] Fig.10 yes Figure 3 Another partial enlarged schematic diagram of the solar cell at the second conductive contact structure;

[0049] Fig.11 yes Figure 3 Another partial enlarged schematic diagram of the solar cell at the second conductive contact structure;

[0050] Fig.12 is another planar structural schematic diagram of the back side of the solar cell provided in an embodiment of the present application;

[0051] Fig.13 This is another schematic plan view of the back side of the solar cell provided in the embodiment of the present application.

[0052] Fig.14 is a schematic structural diagram of an embodiment of a solar cell provided by the present application;

[0053] Fig.15 yes Fig.14 A magnified schematic diagram of part A;

[0054] Fig.16 yes Fig.14 A magnified schematic diagram of part B;

[0055] Fig.17 This is a schematic structural diagram of an embodiment of a solar cell provided by the present application, in which the chamfered edge is arc-shaped;

[0056] Fig.18 This is a schematic structural diagram of a solar cell according to an embodiment of the present application, in which the chamfered edge is a combination of an arc and a straight line;

[0057] Fig.19 This is a schematic diagram of a structure in which the connection wires of a solar cell according to an embodiment of the present application are in a stepped shape;

[0058] Fig. 20 This is a schematic diagram of the line width between the fine grid and the connecting line of an embodiment of a solar cell provided by the present application;

[0059] Fig.21 yes Fig.14 A magnified schematic diagram of part C;

[0060] Fig. 22 is a schematic structural diagram of a first inclined edge of an embodiment of a solar cell provided in the present application;

[0061] Fig.23 It is a schematic structural diagram of the first inclined edge of an embodiment of a solar cell provided in the present application. DETAILED DESCRIPTION

[0062] In order to make the purpose, technical solution and advantages of the utility model clearer, the utility model is further described in detail below in conjunction with the accompanying drawings and embodiments. Examples of embodiments are shown in the accompanying drawings, in which the same or similar reference numerals throughout represent the same or similar elements or elements with the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the utility model, and cannot be understood as limiting the utility model. In addition, it should be understood that the specific embodiments described herein are only used to explain the utility model and are not used to limit the utility model.

[0063] In the description of the present invention, it should be understood that the terms "length", "width", "up", "down", "left", "right", "horizontal", "top", "bottom", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings. They are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, they should not be understood as limitations on the present invention.

[0064] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more features. In the description of the present utility model, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0065] In the description of the present utility model, it should be noted that, unless otherwise clearly specified and limited, the terms "installation", "connection" and "connection" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection, or mutual communication; it can be a direct connection, or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present utility model can be understood according to specific circumstances.

[0066] In the present utility model, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly below and obliquely below the second feature, or simply indicates that the first feature is lower in level than the second feature.

[0067] The disclosure below provides many different embodiments or examples for realizing different structures of the utility model. In order to simplify the disclosure of the utility model, the components and settings of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the utility model. In addition, the utility model can repeat reference numbers and / or reference letters in different examples, and this repetition is for the purpose of simplification and clarity, and does not indicate the relationship between the various embodiments and / or settings discussed in itself. In addition, the utility model provides various specific examples of processes and materials, but those of ordinary skill in the art can be aware of the application of other processes and / or the use of other materials.

[0068] The solar cell of the present application includes a silicon wafer and a fine grid arranged on the silicon wafer (an intermediate layer may be arranged between the fine grid and the silicon wafer), the fine grid includes a first fine grid and a second fine grid alternately distributed along a first direction, the silicon wafer has a first edge and a second edge arranged oppositely along a second direction, and a third edge and a fourth edge arranged oppositely along the first direction, the second direction is perpendicular to the first direction, the first inclined edge connects the first edge and the third edge, the first connecting line is adjacent to the first inclined edge, the first connecting line is connected to the first fine grid or the second fine grid, the intersection of the first inclined edge and the first edge is the first intersection, the intersection of the first inclined edge and the third edge is the second intersection, the distance between the first intersection and the second intersection is less than or equal to 2.5 mm, and the number of the first fine grid or the second fine grid connected by the first connecting line is less than or equal to four. Through the above arrangement, the first inclined edge can be made very small, and then the first connecting line located at the first inclined edge is shorter, and can only connect less than or equal to four first fine grids or second fine grids, so as to ensure the light receiving area of ​​the cell as much as possible and the conversion efficiency of the cell.

[0069] Embodiment 1

[0070] See also Figure 1-Figure 2The photovoltaic system 1000 in the embodiment of the utility model may include the battery assembly 200 in the embodiment of the utility model, and the battery assembly 200 in the embodiment of the utility model may include a plurality of battery strings, and the battery string may include a plurality of busbar-free back-contact solar cells 100 in the embodiment of the utility model. In the utility model, a plurality of busbar-free back-contact solar cells 100 in the battery assembly 200 may be serially connected in sequence through welding strips to form a battery string. The battery strings in the battery assembly 200 may be connected in series, in parallel, or in series-parallel combination to realize the current bus output, for example, the connection between the battery strings may be realized through bus bars.

[0071] See also Figure 3 The busbar-free back-contact solar cell 100 in the embodiment of the utility model may include a silicon wafer 10 , a plurality of first fine grids 20 , a plurality of second fine grids 30 , a plurality of first conductive contact structures 40 and a plurality of second conductive contact structures 50 .

[0072] The silicon wafer 10 has a front side and a back side 11 opposite to each other, the back side 11 has a plurality of first regions 111 and a plurality of second regions 112, a plurality of first fine gates 20 and a plurality of second fine gates 30 are arranged on the back side 11 of the silicon wafer 10, the plurality of first fine gates 20 and the plurality of second fine gates 30 are alternately arranged in sequence along a first direction, and the first fine gates 20 and the second fine gates 30 extend along a second direction, and the second direction intersects the first direction. Specifically, Figure 3 As shown, the first direction and the second direction may be the longitudinal direction and the lateral direction of the main-grid-free back-contact solar cell 100, respectively. Of course, in other embodiments, the first direction and the second direction may also be other directions, for example, both may be the diagonal directions of the silicon wafer 10, respectively, and no specific limitation is made here.

[0073] The first conductive contact structure 40 is disposed in the first region 111, the first conductive contact structure 40 is connected to a plurality of first fine gates 20, and the second fine gates 30 are disconnected at the first conductive contact structure 40. The second conductive contact structure 50 is disposed in the second region 112, the second conductive contact structure 50 is connected to a plurality of second fine gates 30, and the first fine gates 20 are disconnected at the second conductive contact structure 50.

[0074] In the busbar-free back-contact solar cell 100, the battery assembly 200 and the photovoltaic system 1000 of the embodiment of the utility model, in the first area 111 and the second area 112 on the back side 11 of the silicon wafer 10, the first conductive contact structure 40 is arranged in the first area 111 and connected to a plurality of first fine grids 20, and the second conductive contact structure 50 is arranged in the second area 112 and connected to a plurality of second fine grids 30, and the first conductive contact structure 40 and the second conductive contact structure 50 can be used to contact the positive and negative electrode probes of the test equipment respectively. In this way, by arranging a plurality of first conductive contact structures 40 and a plurality of second conductive contact structures 50, the first conductive contact structure 40 and the second conductive contact structure 50 have a larger area than a single first fine grid 20 and a second fine grid 30, and when the busbar-free back-contact solar cell 100 is subjected to hot spot, EL and other tests, the positive and negative electrode probes of the test equipment can form a stable contact with the first conductive contact structure 40 and the second conductive contact structure 50, thereby reducing the difficulty of the test and improving the reliability and stability of the test. At the same time, when the soldering strip is subsequently welded, the first conductive contact structure 40 and the second conductive contact structure 50 can serve as points for welding with the soldering strip. Since the first conductive contact structure 40 and the second conductive contact structure 50 are respectively connected to a plurality of first fine grids 20 and a plurality of second fine grids 30, there is no need to set solder points or soldering layers on all the fine grids during welding, thereby reducing the use of soldering slurry.

[0075] Specifically, it can be understood that in the present invention, the back side 11 of the silicon wafer 10 has a plurality of first doping layers (not shown in the figure) and second doping layers (not shown in the figure), which are respectively a P-type doping layer and an N-type doping layer, and a back passivation layer (not shown in the figure) is provided on the first doping layer and the second doping layer, and the first fine gate 20 is correspondingly arranged above the first doping layer and penetrates the back passivation layer to form an ohmic contact with the first doping layer, and the second fine gate 30 is correspondingly arranged on the second doping layer and penetrates the back passivation layer to form an ohmic contact with the second doping layer.

[0076] Taking the hot spot test as an example, when performing a hot spot test on the busbar-free back-contact solar cell 100 of the present application, the positive pole probe and the negative pole probe of the test equipment can be respectively formed into a stable contact with the first conductive contact structure 40 and the second conductive contact structure 50, and then the scene of the busbar-free back-contact solar cell 100 being blocked is simulated to observe the temperature of various parts of the busbar-free back-contact solar cell 100.

[0077] In some embodiments, the area of ​​the first region 111 may be 5-60 mm 2 , that is, the orthographic projection area of ​​the first conductive contact structure 40 on the back surface 11 may be 5-60 mm 2 .

[0078] In this way, setting the area of ​​the first region 111 within this reasonable range can avoid the first region 111 being too small, which causes the first conductive contact structure 40 to be unable to form a stable contact with the test probe; and can also avoid the first region 111 being too large, which causes the area on the back side 11 where no metal fine grid is set to be small, thereby affecting the current collection efficiency.

[0079] Specifically, in such an embodiment, the area of ​​the first region 111 may be, for example, 5mm2, 10mm2, 15mm2, 20mm2, 25mm2, 30mm2, 35mm2, 40mm2, 45mm2, 50mm2, 55mm2, 60mm2 or any value between 5mm2-60mm2, and is not limited here.

[0080] In some embodiments, the area of ​​the second region 112 may be 5-60 mm 2 , that is, the orthographic projection area of ​​the second conductive contact structure 50 on the back surface 11 may be 5-60 mm 2 .

[0081] In this way, setting the area of ​​the second region 112 within this reasonable range can avoid the area of ​​the second region 112 being too small, resulting in the second conductive contact structure 50 being unable to form a stable contact with the test probe, and can also avoid the area of ​​the second region 112 being too large, resulting in a small area on the back side 11 where no metal fine grid is set, thereby affecting the current collection efficiency.

[0082] Specifically, in such an embodiment, the area of ​​the second region 112 may be, for example, any value between 5mm2, 10mm2, 15mm2, 20mm2, 25mm2, 30mm2, 35mm2, 40mm2, 45mm2, 50mm2, 55mm2, 60mm2 and 60mm2, without limitation thereto.

[0083] In some embodiments, the first conductive contact structure 40 and the second conductive contact structure 50 may both be pad points, that is, solder points for soldering with solder ribbons.

[0084] In this way, the first conductive contact structure 40 and the second conductive contact structure 50 can achieve stable and reliable contact with the test probe and also serve as solder joints for welding contact, thereby reducing the number of solder joints in subsequent welding.

[0085] See also Figure 3-Figure 5 In some embodiments, the first conductive contact structure 40 may include a plurality of first conductive connection lines 41 arranged in the first region 111 at intervals along the second direction, and the first conductive connection lines 41 are cross-arranged with and connected to a plurality of first fine gates 20 .

[0086] In this way, the test probe only needs to contact any one of the first conductive connection lines 41 in the mesh structure within the first region 111 to form a stable electrical contact, thereby improving the reliability of the contact.

[0087] Furthermore, if Figure 5 As shown, in such an embodiment, a plurality of first conductive connection lines 41 and a plurality of first fine gates 20 enclose a first filling region 411; or

[0088] like Figure 6 As shown, a plurality of first conductive connection lines 41 and a plurality of first fine grids 20 intersect to form a first mesh structure 412 .

[0089] In this way, the first conductive connection line 41 and several first fine gates 20 form a first filling area 411 or a first mesh structure 412. During testing, the test probe only needs to contact any first conductive connection line 41 in the first area 111 or any first conductive connection line 41 in the first mesh structure 412 and the first fine gate 20 to form a stable electrical contact, thereby improving the contact reliability.

[0090] In addition, if Figure 6 and Figure 7 As shown, in some embodiments, in order to further improve the contact stability of the test probe, the first conductive contact structure 40 may further include a first conductive material 413 filled in the adjacent first filling region 411 or the first mesh structure 412. In this way, the area of ​​the first conductive contact structure 40 can be increased, so that the first conductive contact structure 40 can form a more reliable and stable contact with the test probe during testing, and, in such an embodiment, when the first conductive contact structure 40 acts as a solder joint, the reliability of welding can be improved.

[0091] Of course, in some embodiments, the first conductive material 413 may not be filled in the first conductive contact structure 40. If the first conductive contact structure 40 is needed to act as a soldering point, during subsequent welding, it may be filled with solder or other conductive welding materials in the first filling area 411 or the first mesh structure 412 to be welded to the soldering strip.

[0092] See also Figure 8 and Fig. 9 In some embodiments, the second conductive contact structure 50 includes a plurality of second conductive connection lines 51 arranged in the second region 112 at intervals along the second direction, and the second conductive connection lines 51 are cross-arranged with and connected to the plurality of second fine gates 30 .

[0093] In this way, the test probe only needs to contact any second conductive connection line 51 in the mesh structure in the second area 112 to form a stable electrical contact, thereby improving the reliability of the contact.

[0094] Furthermore, if Fig. 9 As shown, in such an embodiment, a plurality of second conductive connection lines 51 and a plurality of second fine gates 30 enclose a second filling region 511; or

[0095] like Figure 8 As shown, a plurality of second conductive connection lines 51 and a plurality of second fine grids 30 intersect to form a second mesh structure 512 .

[0096] In this way, the second conductive connection line 51 and several second fine gates 30 form a second filling area 511 or a second mesh structure 512. During testing, the test probe only needs to contact any second conductive connection line 51 in the second area 112 or any second conductive connection line 51 in the second mesh structure 512 with the second fine gate 30 to form a stable electrical contact, thereby improving the reliability of the contact.

[0097] In addition, if Fig.10 and Fig.11 As shown, in some embodiments, in order to further improve the contact stability of the test probe, the second conductive contact structure 50 may further include a second conductive material 513 filled in the adjacent second filling region 511 or the second mesh structure 512. In this way, the area of ​​the second conductive contact structure 50 can be increased, so that the second conductive contact structure 50 can form a more reliable and stable contact with the test probe during testing, and, in such an embodiment, when the second conductive contact structure 50 acts as a solder joint, the reliability of welding can be improved.

[0098] Of course, in some embodiments, the second conductive material 513 may not be filled in the second conductive contact structure 50. If the second conductive contact structure 50 is needed to act as a soldering point, during subsequent welding, it may be filled with solder or other conductive welding materials in the second filling area 511 or the second mesh structure 512 to be welded to the welding strip.

[0099] See also Figure 3-Figure 5 In some embodiments, each first conductive contact structure 40 is connected to 2-7 first fine gates 20 .

[0100] In this way, through such a setting, the first conductive contact structure 40 can have a relatively large area. When it acts as a welding point, 2-7 welding points of the welding strips can be reduced, thereby reducing the use of slurry and improving the reliability of welding. It can also avoid that too many first fine grids 20 are connected to the first conductive contact structure 40, resulting in large transmission losses.

[0101] Specifically, in such an embodiment, the number of first fine gates 20 correspondingly connected to each first conductive contact structure 40 may be, for example, 2, 3, 4, 5, 6 or 7. Figure 3 As shown, each first conductive contact structure 40 is connected to seven first fine gates 20 .

[0102] See also Figure 3 , Figure 8 and Fig. 9 In some embodiments, each second conductive contact structure 50 is connected to 2-7 second fine gates 30 .

[0103] In this way, through such a setting, the second conductive contact structure 50 can have a relatively large area. When it acts as a welding point, 2-7 welding points of the welding strips can be reduced, thereby reducing the use of slurry and improving the reliability of welding. It can also avoid that too many second fine grids 30 corresponding to the second conductive contact structure 50 are connected, resulting in large transmission losses.

[0104] Specifically, in such an embodiment, the number of second fine gates 30 correspondingly connected to each second conductive contact structure 50 may be, for example, 2, 3, 4, 5, 6 or 7. Figure 3 As shown, each second conductive contact structure 50 is connected to seven second fine gates 30 .

[0105] As described above, in some embodiments, the first conductive contact structure 40 and the second conductive contact structure 50 can both be used for welding with welding points. Specifically, the first conductive contact structure 40 can be welded with a welding strip for busing and outputting the current collected by the first fine grid 20, and the second conductive contact structure 50 can be welded with a welding strip for busing and outputting the current collected by the second fine grid 30.

[0106] In this way, the first conductive contact structure 40 and the second conductive contact structure 50 can serve as solder joints of the soldering tape while achieving stable contact with the test probe, thereby realizing functional reuse.

[0107] Specifically, in this case, the specific structures of the first conductive contact structure 40 and the second conductive contact structure 50 can be understood with reference to the above.

[0108] See also Figure 3 In some embodiments, the silicon wafer 10 has a first edge 101 and a second edge 102 along a first direction, and both the first edge 101 and the second edge 102 have a plurality of first conductive contact structures 40 and a second conductive contact structure 50;

[0109] At the first edge 101, a plurality of first conductive contact structures 40 and a plurality of second conductive contact structures 50 are alternately arranged in sequence along the second direction;

[0110] At the second edge 102 , a plurality of first conductive contact structures 40 and a plurality of second conductive contact structures 50 are also alternately arranged in sequence along the second direction.

[0111] In this way, by disposing both the first conductive contact structure 40 and the second conductive contact structure 50 at the edge of the silicon wafer 10 , it is possible to facilitate contact with a test probe.

[0112] For further information, see Figure 3 In such an embodiment, the first conductive contact structure 40 located at the first edge 101 is connected to the first fine gate 20 closest to the first edge 101, and the second conductive contact structure 50 located at the first edge 101 is connected to the second fine gate 30 closest to the first edge 101; and / or

[0113] The first conductive contact structure 40 located at the second edge 102 is connected to the first fine gate 20 closest to the second edge 102 , and the second conductive contact structure 50 located at the second edge 102 is connected to the second fine gate 30 closest to the second edge 102 .

[0114] In this way, the first conductive contact structure 40 and the second conductive contact structure 50 are both arranged at the outermost positions of the first edge 101 and the outermost positions of the second edge 102. When the first conductive contact structure 40 and the second conductive contact structure 50 act as welding points, the first conductive contact structure 40 and the second conductive contact structure 50 can act as the starting welding point and / or the ending welding point during welding, thereby ensuring the stability of welding.

[0115] See also Figure 3 and Fig.12 , in some embodiments, the first conductive contact structure 40 located at the first edge 101 and the first conductive contact structure 40 located at the second edge 102 are aligned in the first direction;

[0116] The second conductive contact structure 50 located at the first edge 101 and the second conductive contact structure 50 located at the second edge 102 are aligned in the first direction.

[0117] In this way, the first conductive contact structure 40 of the first edge 101 is aligned with the first conductive contact structure 40 of the second edge 102, and the second conductive contact structure 50 of the first edge 101 is aligned with the second conductive contact structure 50 of the second edge 102. The two aligned first conductive contact structures 40 can respectively serve as the starting point and the ending point of the welding of the welding strip for collecting the current of the first fine grid 20, and the two aligned second conductive contact structures 50 can respectively serve as the starting point and the ending point of the welding of the welding strip for collecting the current of the second fine grid 30, thereby ensuring the reliability of welding, and there is no need to set additional starting point and ending point.

[0118] See also Fig.12 In some embodiments, at least one first conductive contact structure 40 aligned with the first conductive contact structures 40 at the first edge 101 and the second edge 102 is provided between the two first conductive contact structures 40 aligned in the first direction; and / or

[0119] There is at least one second conductive contact structure 50 between the two second conductive contact structures 50 aligned in the first direction and aligned with the second conductive contact structures 50 located at the first edge 101 and the second edge 102 .

[0120] In this way, at least one first conductive contact structure 40 is arranged between two first conductive contact structures 40 aligned in opposite directions. When the first conductive contact structure 40 acts as a welding point, at least three first conductive contact structures 40 can be welded to the welding point to further ensure the reliability of welding. Similarly, at least one second conductive contact structure 50 is arranged between two second conductive contact structures 50 aligned in opposite directions. When the second conductive contact structure 50 acts as a welding point, at least three second conductive contact structures 50 can be welded to the welding point to further ensure the reliability of welding.

[0121] See also Figure 3 and Figure 4 In some embodiments, the silicon wafer 10 further has a third edge 103 and a fourth edge 104 opposite to each other along the second direction, and a first edge busbar line 60 is disposed at the third edge 103;

[0122] When the conductive contact structure closest to the third edge 103 along the first direction is the first conductive contact structure 40, the first edge busbar line 60 connects the portion of the second fine gate 30 disconnected at the first conductive contact structure 40 located at the third edge 103 and at least one second fine gate 30 not disconnected at the first conductive contact structure 40;

[0123] When the conductive contact structure closest to the third edge 103 along the first direction is the second conductive contact structure 50 , the first edge bus line 60 connects the portion of the first fine gate 20 disconnected at the second conductive contact structure 50 located at the third edge 103 and at least one first fine gate 20 not disconnected at the first conductive contact structure 40 .

[0124] Specifically, the conductive contact structure closest to the third edge 103 along the first direction is the first conductive contact structure 40, and when the first conductive contact structure 40 located closest to the third edge 103 acts as a welding point for welding with the welding strip, since the second fine grid 30 needs to be disconnected at the first conductive contact structure 40, in this case, the current of the portion of the second fine grid 30 located between the first conductive contact structure 40 and the third edge 103 cannot be collected and converged. In this embodiment, by setting a first edge convergence grid line 60, the current collected by the portion of the second fine grid 30 can be converged to at least one undisconnected second fine grid 30, thereby realizing the convergence of the current of the portion of the fine grid and reducing efficiency loss.

[0125] When the conductive contact structure closest to the third edge 103 along the first direction is the second conductive contact structure 50, and when the second conductive contact structure 50 located closest to the third edge 103 acts as a welding point for welding with the welding strip, since the first fine grid 20 needs to be disconnected at the second conductive contact structure 50, in this case, the current of the portion of the first fine grid 20 located between the second conductive contact structure 50 and the third edge 103 cannot be collected and converged. In this embodiment, by setting a first edge convergence grid line 60, the current collected by the portion of the first fine grid 20 can be converged to at least one undisconnected first fine grid 20, thereby realizing the convergence of the current of the portion of the fine grid and reducing efficiency loss.

[0126] See also Figure 3 and Figure 8 In some embodiments, a second edge busbar line 70 is provided at the fourth edge 104;

[0127] When the conductive contact structure closest to the fourth edge 104 along the first direction is the first conductive contact structure 40, the second edge busbar line 70 connects the portion of the second fine grid 30 disconnected at the first conductive contact structure 40 located at the fourth edge 104 and at least one second fine grid 30 not disconnected at the first conductive contact structure 40;

[0128] When the conductive contact structure closest to the fourth edge 104 along the first direction is the second conductive contact structure 50, the second edge busbar line 70 connects the portion of the first fine grid 20 disconnected at the second conductive contact structure 50 located at the fourth edge 104 and at least one first fine grid 20 not disconnected at the first conductive contact structure 40;

[0129] Specifically, the conductive contact structure closest to the fourth edge 104 along the first direction is the first conductive contact structure 40, and when the first conductive contact structure 40 located closest to the fourth edge 104 acts as a welding point for welding with the welding strip, since the second fine grid 30 needs to be disconnected at the first conductive contact structure 40, in this case, the current of the portion of the second fine grid 30 located between the first conductive contact structure 40 and the fourth edge 104 cannot be collected and converged. In this embodiment, by setting a second edge convergence grid line 70, the current collected by the portion of the second fine grid 30 can be converged to at least one undisconnected second fine grid 30, thereby realizing the convergence of the current of the portion of the fine grid and reducing efficiency loss.

[0130] When the conductive contact structure closest to the fourth edge 104 along the first direction is the second conductive contact structure 50, and when the second conductive contact structure 50 located closest to the fourth edge 104 acts as a welding point for welding with the welding strip, since the first fine grid 20 needs to be disconnected at the second conductive contact structure 50, in this case, the current of the portion of the first fine grid 20 located between the second conductive contact structure 50 and the fourth edge 104 cannot be collected and converged. In this embodiment, by setting a second edge convergence grid line 70, the current collected by the portion of the first fine grid 20 can be converged to at least one undisconnected first fine grid 20, thereby realizing the convergence of the current of the portion of the fine grid and reducing efficiency loss.

[0131] See also Fig.13 In some embodiments, the silicon wafer 10 has a first center line L1 and a second center line L2 that are perpendicular to each other, the first center line L1 is parallel to the second direction, the second center line L2 is parallel to the first direction, in the first direction, the silicon wafer 10 is symmetrical about the first center line L1, and in the second direction, the silicon wafer 10 is symmetrical about the second center line L2;

[0132] The first conductive contact structure 40 and the second conductive contact structure 50 are both arranged on the first center line L1. In the first direction, the first conductive contact structure 40 is located on both sides of the first center line L1 and is symmetrically arranged about the first center line L1. The second conductive contact structure 50 is located on both sides of the first center line L1 and is also symmetrically arranged about the first center line L1.

[0133] The first fine grids 20 on both sides of the first center line L1 are symmetrical about the first center line L1, and the second fine grids 30 on both sides of the first center line L1 are also symmetrical about the first center line L1;

[0134] A first conductive contact structure 40 and a second conductive contact structure 50 are arranged on both sides of the second center line L2. The first conductive contact structure 40 located on both sides of the second center line L2 is symmetrically arranged about the second center line L2, and the second conductive contact structure 50 located on both sides of the second center line L2 is also symmetrically arranged about the second center line L2.

[0135] In this way, the rotational symmetry of the first conductive contact structure 40 and the second conductive contact structure 50 can be achieved. In this way, during the manufacturing process, when the first fine grid 20 and the second fine grid 30 are set after printing the first conductive contact structure 40, the main grid-free back contact solar cell 100 can be moved and replaced at will without the need for alignment and calibration.

[0136] Specifically, Fig.13 As shown, in such an embodiment, the same number of first conductive contact structures 40 (for example, 1, 2 or 3) are provided on both sides of the second center line L2, and the first conductive contact structures 40 on both sides are symmetrical about the second center line L2. The same number of second conductive contact structures 50 are also provided, and the second conductive contact structures 50 on both sides are also symmetrical about the second center line L2. At the same time, for each conductive contact structure, its center point is located on the first center line L1, and the parts of each conductive contact structure located on both sides of the first center line L1 are symmetrical about the first center line L1.

[0137] Furthermore, in such an embodiment, no additional fine gates may be provided at the first center line L1. Of course, in order to maximize the utilization of the area of ​​the silicon wafer 10, a central fine gate 80 may also be provided at the first center line L1, and the central fine gate 80 and the fine gates (the first fine gate 20 or the second fine gate 30, Fig.13 It is shown that the second fine gate 30) has the same polarity.

[0138] Thus, by setting the central fine gate 80 with the same polarity as the fine gates closest to the first edge 101 and the second edge 102, all the fine gates on both sides of the midline grid line can be symmetrical about the central fine gate 80, so as to achieve the purpose of being able to move and replace the fine gates during the process of setting the fine gates. It is not difficult to understand that in such an embodiment, there may be a doping layer corresponding to its polarity under the central fine gate 80, and the central fine gate 80 penetrates the passivation layer and contacts the doping layer below, thereby improving the area utilization and improving the current collection capability.

[0139] Specifically, Fig.13As shown, when the fine gates closest to the first edge 101 and the second edge 102 are both the second fine wires 30, the central fine gate 80 is the same gate wire as the second fine gate 30, which is equivalent to that the first fine gates 20 and the second fine gates 30 are evenly spaced and alternately arranged on the silicon wafer 10, and the fine gates located at the upper and lower edges in the first direction are both the second fine gates 30, the second fine gates 30 are N, and the first fine gates 20 are N-1, and the extra second gate wire 30 is the central fine gate 80 that coincides with the first center line L1. Similarly, when the fine gates closest to the first edge 101 and the second edge 102 are both the first fine wires 20, the central fine gate 80 is a fine gate with the same polarity as the first fine gate 20, and the details are not repeated here.

[0140] Please continue reading Fig.13 In such an embodiment, the first conductive contact structure 40 may include a first Pad point 401 located on the first center line L1 and two first connecting lines 402 respectively connected to the two ends of the first Pad point and extending along the first direction, the first connecting line 402 is connected to at least one first fine gate 20, and the second conductive contact structure 50 may include a second Pad point 501 located on the first center line L1 and two second connecting lines 502 respectively connected to the two ends of the second Pad point 501 and extending along the first direction, the second connecting line 502 is connected to at least one second fine gate 30.

[0141] In this way, stable contact with the probe can be achieved through the Pad point, and then part of the fine grid can be connected through the connecting wire, so as to achieve stable testing of electrical performance and hot spots.

[0142] Furthermore, in such an embodiment, the width of the first connecting line 402 may be greater than the width of the first fine gate 20, and the width of the second connecting line 502 may be greater than the width of the second fine gate 30. The widths of the first connecting line 402 and the second connecting line 502 refer to their lengths in the second direction, and the widths of the first fine gate 20 and the second fine gate 30 refer to their lengths in the first direction.

[0143] Embodiment 2

[0144] like Figures 14 to 23 As shown, one embodiment of the present application provides a solar cell, comprising:

[0145] A silicon wafer 100, on which a plurality of fine gates are arranged, the fine gates including first fine gates 200 and second fine gates 300 alternately distributed along a first direction;

[0146] The silicon wafer 100 has:

[0147] A first edge 111 and a second edge 112 are arranged opposite to each other along a second direction, and a third edge 113 and a fourth edge 114 are arranged opposite to each other along the first direction, wherein the second direction is perpendicular to the first direction;

[0148] a first inclined edge 121 connecting the first edge 111 and the third edge 113; and

[0149] A first connection line 410 is disposed adjacent to the first inclined edge 121 , and the first connection line 410 is connected to at least one first fine grid 200 or at least one second fine grid 300 :

[0150] The intersection of the first inclined edge 121 and the first edge 111 is the first intersection J2, the intersection of the first inclined edge 121 and the third edge 113 is the second intersection J1, the distance between the first intersection J2 and the second intersection J1 is less than or equal to 2.5 mm, and the number of first fine grids 200 or second fine grids 300 connected by the first connecting line 410 is less than or equal to four.

[0151] During implementation, the silicon wafer 100, the first fine gate 200 and the second fine gate 300 can respectively refer to the silicon wafer 10, the first fine gate 20 and the second fine gate 30 in the above-mentioned embodiment 1. The silicon wafer 100 is a silicon substrate, and the silicon substrate can be an N-type silicon wafer or a P-type silicon wafer. The N-type silicon wafer is obtained by adding a pentavalent element (such as phosphorus, arsenic or bismuth, etc.) to the intrinsic semiconductor silicon, and the P-type silicon wafer is obtained by adding a trivalent element (such as boron, gallium or indium, etc.) to the intrinsic semiconductor silicon, which will not be described in detail.

[0152] The silicon wafer 100 has a front side and a back side, wherein the front side of the silicon wafer 100 corresponds to the light-receiving side of the solar cell, and similarly, the back side of the silicon wafer 100 corresponds to the backlight side of the solar cell.

[0153] In some embodiments, the fine gates may be disposed on the front or back of the silicon wafer 100, wherein the fine gates refer to metal fine gates, including first fine gates 200 and second fine gates 300, and the first fine gates 200 and second fine gates 300 are alternately disposed along the first direction. Exemplarily, taking the first direction as the vertical direction as an example, the first fine gates 200 and the second fine gates 300 are alternately disposed from top to bottom on the silicon wafer 100, and a second fine gate 300 is disposed between two adjacent first fine gates 200, and similarly, a first fine gate 200 is disposed between two adjacent second fine gates 300, and no further description is given.

[0154] The silicon wafer 100 is in a sheet or plate shape and has four edges, namely a third edge 113 and a fourth edge 114 arranged opposite to each other along a first direction, and a first edge 111 and a second edge 112 arranged opposite to each other along a second direction, wherein the second direction is perpendicular to the first direction.

[0155] For example, taking the first direction as the vertical direction, the second direction is the horizontal direction. In this case, the first edge 111 and the second edge 112 can be regarded as the left edge and the right edge of the silicon wafer 100. Similarly, the third edge 113 and the fourth edge 114 can be regarded as the upper edge and the lower edge of the silicon wafer 100. In other embodiments, when the first direction is the horizontal direction, the second direction is the vertical direction. In this case, the first edge 111 and the second edge 112 can be regarded as the upper edge and the lower edge of the silicon wafer 100. Similarly, the third edge 113 and the fourth edge 114 can be regarded as the left edge and the right edge of the silicon wafer 100. No further description is given.

[0156] The silicon wafer 100 is provided with a first inclined edge 121, the first inclined edge 121 connects the first edge 111 and the third edge 113, and a first connecting wire 410 is provided adjacent to the first inclined edge 121, and the first connecting wire 410 can connect the first fine gate 200 or the second fine gate 300. At the same time, since the distance between the first intersection J2 and the second intersection J1 is less than 2.5 mm, that is, by designing the first inclined edge 121 into a chamfered area with a smaller range, the number of the first fine gates 200 or the second fine gates 300 that can be connected by the first connecting wire 410 is less than or equal to four. Exemplarily, taking the first connecting wire 410 connecting the first fine gate 200 as an example, the first connecting wire 410 can connect four first fine gates 200, or the first connecting wire 410 can connect three first fine gates 200, or the first connecting wire 410 can connect two first fine gates 200, or the first connecting wire 410 can connect one first fine gate 200.

[0157] Optionally, the distance between the first intersection J2 and the second intersection J1 is less than or equal to 2.5 mm. For example, the distance between the first intersection J2 and the second intersection J1 can be designed to be 0.9 mm, 1.1 mm, 1.2 mm, 1.5 mm, 1.6 mm, 1.8 mm, 2.0 mm, 2.4 mm or any value between 0.7 mm and 2.5 mm. Preferably, the distance between the first intersection J2 and the second intersection J1 is 1.2 mm to 1.6 mm. For example, the preset threshold is 1.3 mm, 1.4 mm, 1.45 mm, 1.5 mm or any value between 1.2 mm and 1.6 mm, without limitation.

[0158] In some possible embodiments, the silicon wafer 100 includes a second inclined edge 122, a third inclined edge 123 and a fourth inclined edge 124, wherein the second inclined edge 122 connects the first edge 111 and the fourth edge 114, the third inclined edge 123 connects the second edge 112 and the third edge 113, and the fourth inclined edge 124 connects the second edge 112 and the fourth edge 114.

[0159] A second connecting line 420, a third connecting line 430 and a fourth connecting line 440 are also provided on the silicon wafer 100, wherein the second connecting line 420 is adjacent to the second inclined edge 122, the third connecting line 430 is adjacent to the third inclined edge 123, and the fourth connecting line 440 is adjacent to the fourth inclined edge 124, and the second connecting line 420, the third connecting line 430 and the fourth connecting line 440 are all connected to at least one first fine gate or at least one second fine gate.

[0160] During implementation, the first connection line 410 and the second connection line 420 are connected to fine gates with the same polarity, and the first connection line 410 and the third connection line 430 are connected to fine gates with opposite polarities. For example, when the first connection line 410 is connected to the first fine gate 200, the second connection line 420 is also connected to the first fine gate 200, the third connection line 430 is connected to the second fine gate 300, and the fourth connection line 430 is also connected to the second fine gate 300.

[0161] It should be noted that the above-mentioned intersection points of the first inclined edge 121 and the corresponding edge as J1 and J2 are illustrative illustrations of the embodiments of the present application, rather than specific limitations of the present application. In some other embodiments, the second inclined edge 122, the third inclined edge 123 and the fourth inclined edge 124 can refer to the above-mentioned first inclined edge 121 and will not be elaborated on.

[0162] In some possible embodiments, taking the first connecting line 410 connecting the first fine gate 200 as an example, the first connecting line 410 can connect two first fine gates 200, the third connecting line 430 connects one second fine gate 300, the second connecting line 420 connects two first fine gates 200, and the fourth connecting line 440 connects one second fine gate 300.

[0163] Optionally, the first connection line 410 may connect three first fine grids 200, the third connection line 430 may connect two second fine grids 300, the second connection line 420 may connect three first fine grids 200, and the fourth connection line 440 may connect two second fine grids 300. Optionally, the first connection line 410 may connect four first fine grids 200, the third connection line 430 may connect three second fine grids 300, the second connection line 420 may connect four first fine grids 200, and the fourth connection line 440 may connect three second fine grids 300.

[0164] It should be noted that the number of fine grids connected by the connecting lines at the above-mentioned inclined edges is an example of an embodiment of the present application, and is not a specific limitation of the present application. In some other embodiments, the number of fine grids connected by the connecting lines at each inclined edge can be set according to needs without limitation.

[0165] The solar cell of the present application includes a silicon wafer 100 and fine grids arranged on the silicon wafer 100, the fine grids include first fine grids 200 and second fine grids 300 alternately distributed along a first direction, the silicon wafer 100 has a first edge 111 and a second edge 112 arranged opposite to each other along a second direction, and a third edge 113 and a fourth edge 114 arranged opposite to each other along the first direction, the second direction is perpendicular to the first direction, a first inclined edge 121 connecting the first edge 111 and the third edge 113; and a first connecting line 410 arranged adjacent to the first inclined edge 121, the first connecting line 410 is connected to at least one first fine grid 200 or at least one second fine grid 300, the intersection of the first inclined edge 121 and the first edge 111 is a first intersection J2, the intersection of the first inclined edge 121 and the third edge 113 is a second intersection J1, the distance between the first intersection J2 and the second intersection J1 is less than or equal to 2.5 mm, and the number of the first fine grids 200 or the second fine grids 300 connected by the first connecting line 410 is less than or equal to four. Through the above arrangement, the first inclined edge 121 can be made very small, and thus the first connecting line 410 located at the first inclined edge 121 is shorter and can only connect less than or equal to four first fine grids 200 or second fine grids 300, thereby ensuring the light receiving area of ​​the battery cell as much as possible and ensuring the conversion efficiency of the battery cell.

[0166] In some optional embodiments, the first inclined edge 121 is a straight line or an arc.

[0167] In implementation, each inclined edge can be a straight line. Taking the first inclined edge 121 as an example, Fig.14 , Fig.15 and Fig.16 In some possible embodiments, each inclined edge may also be in an arc shape. For example, the first inclined edge 121 is as follows. Fig.17 Of course, each inclined edge can also be a combination of straight lines and arcs, such as Fig.18 shown.

[0168] In some optional embodiments, the connection lines are not parallel to the corresponding inclined edges. For example, the first connection line 410 is not parallel to the first inclined edge 121, the second connection line 420 is not parallel to the second inclined edge 122, the third connection line 430 is not parallel to the third inclined edge 123, and the fourth connection line 440 is not parallel to the fourth inclined edge 124. Fig.21 As shown, no further elaboration is given.

[0169] In some optional embodiments, the first connection line 410 includes a first connection portion 450 and a second connection portion 460 , the first connection portion 450 is used to connect two fine grids of the same polarity, and the second connection portion 460 is connected to the first connection portion 450 .

[0170] The connecting line can be designed as a ladder as a whole, such as Fig.19 As shown, illustratively, taking the first connecting wire 410 connecting the first fine gate 200 and the second connecting wire 420 connecting the second fine gate 300 as an example, the first first fine gate 200, the first second fine gate 300, the second first fine gate 200, the second second fine gate 300, ..., the Nth first fine gate 200 and the Nth second fine gate 300 are sequentially distributed from top to bottom on the silicon wafer 100. The first end of the first connecting portion 450 of the first connecting wire 410 is connected to the first first fine gate 200, the second end of the first connecting portion 450 of the first connecting wire 410 is connected to the second first fine gate 200, and the second connecting portion 460 of the first connecting wire 410 is perpendicular or substantially perpendicular to the first connecting portion 450 of the first connecting wire 410. Similarly, the first end of the first connection portion 450 of the second connection line 420 is connected to the first second fine grid 300, the second end of the first connection portion 450 of the second connection line 420 is connected to the second second fine grid 300, and the second connection portion 460 of the second connection line 420 is perpendicular or substantially perpendicular to the first connection portion 450 of the second connection line 420.

[0171] In implementation, the second connection part 460 and the first connection part 450 are connected through a thin grid, and optionally, the second connection part 460 and the first connection part 450 are parallel to the first direction, and optionally, the first connection part 450 is an oblique line. The first connection part 450 and the second connection part 460 are distributed along the current direction, that is, the first end of the first connection part 450 is connected to the first first thin grid 200, and the second end of the first connection part 450 is connected to the second first thin grid 200. At this time, the first connection part 450 flows with the current of the first first thin grid 200, and the second connection part 460 is connected to the first connection part 450. At this time, the second connection part 460 flows with the sum of the currents of the first first thin grid 200 and the second first thin grid 200. By designing the width of the first connection part 450 to be smaller than the width of the second connection part 460, the line resistance (resistance) of the second connection part 460 can be effectively reduced, thereby reducing the overall power loss of the connection line and improving the power generation efficiency of the solar cell.

[0172] In some optional embodiments, the width of the connecting line 400 is greater than the width of the fine grid. In implementation, the width of the connecting line 400 is related to the line resistance. Generally, the larger the line width, the smaller the line resistance. The line resistance loss of connecting lines with different line widths is different. For example, when the line width of the connecting line 400 is 150um, the line resistance loss is 0.0095W. When the line width of the connecting line 400 is 300um, the line resistance loss is 0.0048W. When the line width of the connecting line 400 is gradual, for example, when the width of the connecting line 400 gradually changes from 150um to 300um, the line resistance loss is 0.0062W. Fig. 20As shown, using a connecting line 400 with a larger width can effectively reduce the line resistance of the connecting line 400, thereby reducing the loss of current flowing through the connecting line 400.

[0173] Optionally, the connection line 400 is designed with a large width to effectively reduce the line resistance of the connection line 400. However, the large line width of the connection line 400 will also block the light receiving area of ​​the solar cell, resulting in a decrease in the power generation efficiency of the solar cell. At this time, the ratio of the width of the fine grid to the width of the connection line 400 can be designed to be 1:1.2 to 1:2, for example, the ratio of the width of the fine grid to the width of the connection line 400 can be designed to be 1:1:3, 1:1.5 or 1:1.9, etc. Preferably, the ratio of the width of the fine grid to the width of the connection line 400 is 1:1.6-1:1.8, for example, the ratio of the width of the fine grid to the width of the connection line 400 can be designed to be 1:1:7, or 1:1.75, etc., without limitation. Through the above settings, the line resistance of the connection line 400 and the power generation efficiency of the solar cell can be effectively taken into account.

[0174] In some optional embodiments, the angle between the first connection line 410 and the second direction is greater than the angle between the third connection line 420 and the second direction. Similarly, the angle between the second connection line 420 and the second direction is greater than the angle between the fourth connection line 440 and the second direction.

[0175] In implementation, the second direction refers to a direction parallel to the fine grids. Taking the above-mentioned first fine grids 200 and second fine grids 300 as an example of alternately arranging in the longitudinal direction, the second direction is the transverse direction, that is, the first fine grids 200 and second fine grids 300 extend in the transverse direction. Exemplarily, taking the angle between the first connecting line 410 and the second direction as Z1 as an example, the angle between the third connecting line 430 and the second direction as Z2, then Z1>Z2, similarly, the angle between the second connecting line 420 and the second direction as Z3, the angle between the fourth connecting line 440 and the second direction as Z4, then Z3>Z4.

[0176] In some optional embodiments, the first connection line 410 and the second connection line 420 are both used to connect the first fine gate 200, and the third connection line 430 and the fourth connection line 440 are both used to connect the second fine gate 300;

[0177] Along the second direction, when the first connecting line 410 is connected to the first fine gate 200, the distance between the endpoint of the second fine gate 300 adjacent to the first connecting line 410 and the first connecting line 410 is smaller than the distance between the first connecting line 410 and the first inclined edge 121; or when the first connecting line 410 is connected to the second fine gate 300, the distance between the endpoint of the first fine gate 200 adjacent to the first connecting line 410 and the first connecting line 410 is smaller than the distance between the first connecting line 410 and the first inclined edge 121.

[0178] Optionally, taking the first connecting line 410 connecting the first first fine grid 200 as an example, Fig. 22 As shown, at this time, the first connection line 410 is spaced apart from the second fine gate 300, the distance between the first connection line 410 and the end of the second fine gate 300 is considered as D1, and the distance between the first connection line 410 and the first inclined edge 121 is considered as D2, then D1<D2.

[0179] In some possible embodiments, when the connection line is arranged at intervals with a plurality of fine gates, for example, the first fine gate 200, the first fine gate 300, the second fine gate 200, and the second fine gate 300 are sequentially arranged from top to bottom. Fig.23 As shown. The first connecting line 410 connects the first first fine grid 200 and the second first fine grid 200. At this time, the first connecting line 410 and the first second fine grid 300 and the second second fine grid 300 are all spaced apart, and the fine grid closest to the connecting line is selected to confirm the distance. For example, if the distance between the first connecting line 410 and the end of the first second fine grid 300 is less than the distance between the first connecting line 410 and the end of the second second fine grid 300, the distance between the first connecting line 410 and the end of the first second fine grid 300 is regarded as D1, and the distance between the first connecting line 410 and the first inclined edge 121 is regarded as D2, then D1<D2.

[0180] Similarly, in some other embodiments, the second connection line 420 , the third connection line 430 , and the fourth connection line 440 may refer to the design of the first connection line 410 , and will not be described in detail.

[0181] In some optional embodiments, along the second direction, the distance between the first connection line 410 and the first inclined edge 121 is greater than the distance between the third connection line 430 and the third inclined edge 123 .

[0182] Taking the second direction as the horizontal direction as an example, the first inclined edge 121 is located at the upper left corner of the silicon wafer 100, the second inclined edge 122 is located at the lower left corner of the silicon wafer 100, the third inclined edge 123 is located at the upper right corner of the silicon wafer 100, and the fourth inclined edge 124 is located at the lower right corner of the silicon wafer 100. The distance between the first connecting line 410 and the edge of the first inclined edge 121 is greater than the distance between the third connecting line 430 and the edge of the third inclined edge 123. Similarly, the distance between the second connecting line 420 and the edge of the second inclined edge 122 is greater than the distance between the fourth connecting line 440 and the edge of the fourth inclined edge 124.

[0183] Optionally, the connection line is not parallel to the corresponding inclined edge, for example, the first connection line 410 is not parallel to the first inclined edge 121, and similarly, the second connection line 420 is not parallel to the second inclined edge 122, and the third connection line 430 and the fourth connection line 440 are similar, which will not be described in detail. The point of the inclined edge closest to the connection line can be selected to confirm the distance. Taking the first connection line 410 as an example, if the distance between the upper end point of the first connection line 410 and the first inclined edge 121 is greater than the distance between the lower end point of the first connection line 410 and the first inclined edge 121, the distance between the lower end point of the first connection line 410 and the first inclined edge 121 is regarded as the distance between the first connection line 410 and the first inclined edge 121. Of course, the average value of the distances between the two ends of the first connection line 410 and the first inclined edge 121 can also be selected as the distance between the first connection line 410 and the first inclined edge 121, which will not be described in detail.

[0184] In some optional embodiments, the first connecting line 410 is connected to the first fine gate 200, the third connecting line 430 is connected to the second fine gate 300, and along the second direction, the width of the first connecting line 410 is smaller than the width of the third connecting line 430. Similarly, the second connecting line 420 is connected to the first fine gate 200, the fourth connecting line 440 is connected to the second fine gate 300, and along the second direction, the width of the second connecting line 420 is smaller than the width of the fourth connecting line 440.

[0185] In some optional embodiments, the line width of the second fine gate 300 is greater than the line width of the first fine gate 200 .

[0186] In some optional embodiments, taking the first direction as the longitudinal direction as an example, the second direction is the transverse direction, and the second fine gates 300 and the first fine gates 200 are alternately arranged on the silicon wafer 100 along the first direction, so that the first fine gates 200 and the second fine gates 300 are symmetrically distributed up and down, and illustratively, when the first fine gate 200 is closest to the third edge 113, the first fine gate is also closest to the fourth edge 114. In addition, the first fine gates 200 and the second fine gates 300 are asymmetrical left and right.

[0187] Embodiment 2

[0188] In some optional embodiments, the present application provides a photovoltaic module, comprising the solar cell as described above.

[0189] The photovoltaic module is composed of at least one solar cell. The first fine grid 200 in the solar cell is connected by the positive electrode welding ribbon 500, and the second fine grid 300 is connected by the negative electrode welding ribbon 600. The welding ribbons of adjacent solar cells can be connected in series or in parallel, which will not be described in detail.

[0190] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the structure and implementation principle of the photovoltaic assembly described above can refer to the corresponding structure and implementation principle in the aforementioned embodiment 1, and will not be repeated here.

[0191] The solar cell of the present application includes a silicon wafer 100 and fine grids arranged on the silicon wafer 100, the fine grids include first fine grids 200 and second fine grids 300 alternately distributed along a first direction, the silicon wafer 100 has a first edge 111 and a second edge 112 arranged opposite to each other along a second direction, and a third edge 113 and a fourth edge 114 arranged opposite to each other along the first direction, the second direction is perpendicular to the first direction, a first inclined edge 121 connecting the first edge 111 and the third edge 113; and a first connecting line 410 arranged adjacent to the first inclined edge 121, the first connecting line 410 is connected to at least one first fine grid 200 or at least one second fine grid 300, the intersection of the first inclined edge 121 and the first edge 111 is a first intersection J2, the intersection of the first inclined edge 121 and the third edge 113 is a second intersection J1, the distance between the first intersection J2 and the second intersection J1 is less than or equal to 2.5 mm, and the number of the first fine grids 200 or the second fine grids 300 connected by the first connecting line 410 is less than or equal to four. Through the above arrangement, the first inclined edge 121 can be made very small, and thus the first connecting line 410 located at the first inclined edge 121 is shorter and can only connect less than or equal to four first fine grids 200 or second fine grids 300, thereby ensuring the light receiving area of ​​the battery cell as much as possible and ensuring the conversion efficiency of the battery cell.

[0192] The above are only preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A solar cell, characterized in that include: A silicon wafer, on which a plurality of fine gates are arranged, wherein the fine gates include first fine gates and second fine gates alternately distributed along a first direction; The silicon wafer has: a first edge and a second edge disposed opposite to each other along a second direction, and a third edge and a fourth edge disposed opposite to each other along the first direction, wherein the second direction is perpendicular to the first direction; a first inclined edge connecting the first edge and the third edge; as well as a first connecting line disposed adjacent to the first inclined edge, the first connecting line being connected to at least one of the first fine grids or at least one of the second fine grids; The intersection of the first inclined edge and the first edge is a first intersection, the intersection of the first inclined edge and the third edge is a second intersection, the distance between the first intersection and the second intersection is less than or equal to 2.5 mm, and the number of the first fine grids or the second fine grids connected by the first connecting line is less than or equal to four.

2. The solar cell according to claim 1, wherein: The first inclined edge is a straight line or an arc.

3. The solar cell according to claim 2, characterized in that The first connection line is not parallel to the first inclined edge.

4. The solar cell according to any one of claims 1 to 2, characterized in that The first connecting line includes a first connecting portion and a second connecting portion, and a width of the first connecting portion is smaller than a width of the second connecting portion.

5. The solar cell according to claim 4, characterized in that The first connection portion is connected to the second connection portion, and the first connection portion is a slanted line.

6. The solar cell according to claim 4, characterized in that The second connection portion and the first connection portion are connected via a thin grid.

7. The solar cell according to claim 6, characterized in that The second connection portion and the first connection portion are parallel to the first direction.

8. The solar cell according to claim 4, characterized in that The ratio of the width of the fine gate to the width of the first connection line is 1:1.2 to 1:

2.

9. The solar cell according to claim 8, characterized in that The ratio of the width of the fine gate to the width of the first connecting line is 1:1.6-1:1.

8.

10. The solar cell according to claim 1, wherein: The distance between the first intersection point and the second intersection point is 0.7 mm to 2.5 mm.

11. The solar cell according to claim 10, wherein: The distance between the first intersection point and the second intersection point is 1.2 mm to 1.6 mm.

12. The solar cell according to claim 1, wherein: The silicon wafer includes a second inclined edge connecting the first edge and the fourth edge; A second connecting line adjacent to the second inclined edge is disposed on the silicon wafer, and the second connecting line is connected to at least one of the first fine gates or at least one of the second fine gates; The first connection line and the second connection line are connected to fine gates having the same polarity.

13. The solar cell according to claim 12, wherein: The silicon wafer comprises a third inclined edge connecting the second edge and the third edge; A third connecting line adjacent to the third inclined edge is disposed on the silicon wafer, and the third connecting line is connected to at least one of the first fine gates or at least one of the second fine gates; The first connection line and the third connection line are connected to fine gates having opposite polarities.

14. The solar cell according to claim 13, wherein: An angle between the first connection line and the second direction is greater than an angle between the third connection line and the second direction.

15. The solar cell according to claim 1, wherein: The first connecting line is connected to the first fine gate, and along the second direction, the distance between the end point of the second fine gate adjacent to the first connecting line and the first connecting line is smaller than the distance between the first connecting line and the first inclined edge; or The first connecting line is connected to a second fine gate, and along the second direction, a distance between an end point of the first fine gate adjacent to the first connecting line and the first connecting line is smaller than a distance between the first connecting line and the first inclined edge.

16. The solar cell according to claim 13, wherein: Along the second direction, a distance between the first connection line and the first inclined edge is greater than a distance between the third connection line and the third inclined edge.

17. The solar cell according to claim 13, wherein: The first connection line is connected to the first fine gate, and the third connection line is connected to the second fine gate; Along the second direction, the width of the first connecting line is smaller than the width of the third connecting line.

18. The solar cell according to claim 1, wherein: A line width of the second fine gate is greater than a line width of the first fine gate.

19. A photovoltaic module, characterized in that: Comprising the solar cell according to any one of claims 1 to 18.