Clock group device
By combining the atomic clock module, crystal oscillator module and phase-locking loop module in the clock set device, the phase-locking synthesis of frequency signals is solved, and the problems in the prior art such as high stability, good phase noise and high accuracy are achieved, and more efficient frequency signal output is achieved to ensure the stable operation of the communication system.
Patent Information
- Application Number
- CN202421739084.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-22
- Publication Date
- 2025-05-27
- Estimated Expiration
- 2034-07-22
AI Technical Summary
The existing clock set device cannot output frequency signals with the advantages of high stability, good phase noise and high accuracy, which affects the stability of the communication system.
A clock set device is designed, including an atomic clock module, a crystal oscillator module and a phase-locking loop module. Through the phase-locking loop module, the atomic clock frequency signal output by the atomic clock module and the crystal oscillator frequency signal output by the crystal oscillator module are phase-locked to achieve frequency synthesis.
Through frequency synthesis, the accuracy and stability of the frequency signal are improved and the phase noise of the frequency signal is reduced, so that the clock set device can output frequency signals with the advantages of high stability, good phase noise and high accuracy, meeting the long-term and stable operation needs of the communication system.
Smart Images
Figure CN222916027U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of frequency sources, and specifically provides a clock group device. Background Art
[0002] As the transmission signal frequency continues to increase, in order to ensure the long-term stable and reliable operation of the communication system, a clock device is usually required to provide a frequency signal with high stability, high precision and good phase noise.
[0003] In the prior art, the frequency sources commonly used in clock group devices include atomic clocks and crystal oscillators. The frequency signals output by atomic clocks have the advantages of high precision and high long-term stability, while the frequency signals output by crystal oscillators have the advantages of high short-term stability and good phase noise. However, the existing clock group devices can only output frequency signals generated by a single type of frequency source, resulting in the frequency signals output by them not having the advantages of high stability, good phase noise, high precision, etc., which affects the stability of the communication system and cannot meet the use requirements.
[0004] Therefore, this field needs a new technical solution to solve the above problems. Utility Model Content
[0005] The utility model aims to solve the above technical problem, that is, to solve the problem that the existing clock group device cannot output a frequency signal with the advantages of high stability, good phase noise, high precision, etc.
[0006] The utility model provides a clock group device, the clock group device comprising:
[0007] Atomic clock module;
[0008] Crystal oscillator module;
[0009] A phase-locked loop module, wherein the input end of the phase-locked loop module is respectively connected to the output end of the atomic clock module and the output end of the crystal oscillator module, and the output end of the phase-locked loop module is connected to the input end of the crystal oscillator module.
[0010] In a preferred technical solution of the above clock group device, the atomic clock module includes a plurality of atomic clocks, and the output ends of the plurality of atomic clocks are respectively connected to the input end of the phase-locked loop module.
[0011] In a preferred technical solution of the above-mentioned clock group device, a part of the multiple atomic clocks are high-performance atomic clocks, and another part are low-power atomic clocks.
[0012] In the preferred technical solution of the clock group device, the phase-locked loop module includes a plurality of phase-locked loops, and the phase-locked loops correspond to the atomic clocks one by one;
[0013] The input end of each phase-locked loop is respectively connected to the output end of the crystal oscillator module and the output end of the atomic clock corresponding thereto, and the output end thereof is connected to the input end of the crystal oscillator module.
[0014] In the preferred technical solution of the above clock group device, the phase-locked loop is an analog phase-locked loop or a digital phase-locked loop.
[0015] In the preferred technical solution of the above clock group device, the clock group device also includes a switch module, the input end of the switch module is respectively connected to the output end of the atomic clock module and the output end of the crystal oscillator module, and the output end is connected to the user end.
[0016] In the preferred technical solution of the above clock group device, the switch module includes a first input end and a second input end, the first input end is connected to the output end of the atomic clock module, and the second input end is connected to the output end of the crystal oscillator module.
[0017] In the preferred technical solution of the above clock group device, the crystal oscillator module is a temperature compensated crystal oscillator or a constant temperature crystal oscillator.
[0018] In the preferred technical solution of the above clock group device, the frequency of the atomic clock module is in the range of 1 MHz to 100 MHz.
[0019] In the preferred technical solution of the above clock group device, the frequency of the crystal oscillator module is in the range of 1 MHz to 100 MHz.
[0020] It will be understood by those skilled in the art that the clock group device of the present application phase-locks the atomic clock frequency signal output by the atomic clock module and the crystal oscillator frequency signal output by the crystal oscillator module by setting a phase-locked loop module, thereby achieving frequency synthesis, improving the accuracy and stability of the frequency signal, and reducing the phase noise of the frequency signal, so that the clock group device can output a frequency signal with the advantages of high stability, good phase noise, and high accuracy, thereby meeting the use requirements and ensuring that the communication system can operate stably for a long time. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] The preferred embodiments of the present invention are described below in conjunction with the accompanying drawings, in which:
[0022] Figure 1 It is a schematic diagram of the clock assembly device of the utility model;
[0023] Figure 2 This is a schematic diagram of the principle of the clock group device of the utility model. Figure 1 ;
[0024] Figure 3 This is a schematic diagram of the principle of the clock group device of the utility model. Figure 2 ;
[0025] Figure 4 This is a schematic diagram of the principle of the clock group device of the utility model. Figure 3 ;
[0026] Figure 5 This is a schematic diagram of the principle of the clock group device of the utility model. Figure 4 ;
[0027] Figure 6 This is a schematic diagram of the principle of the clock group device of the utility model. Figure 5 .
[0028] Reference numerals:
[0029] 1. Atomic clock module; 11. First atomic clock; 12. Second atomic clock;
[0030] 2. Crystal oscillator module;
[0031] 3. Phase-locked loop module; 31. First phase-locked loop; 32. Second phase-locked loop;
[0032] 4. Switch module;
[0033] F1, the first atomic clock frequency signal; F2, the second atomic clock frequency signal; F3, the crystal oscillator frequency signal; F4, the changed crystal oscillator frequency signal;
[0034] S1, first control signal; S2, second control signal. DETAILED DESCRIPTION
[0035] The preferred embodiments of the present invention are described below with reference to the accompanying drawings. It should be understood by those skilled in the art that these embodiments are only used to explain the technical principles of the present invention and are not intended to limit the protection scope of the present invention.
[0036] It should be noted that in the description of the present invention, the terms "upper", "lower", "left", "right" and the like indicating directions or positional relationships are based on the directions or positional relationships shown in the drawings, which are only for the convenience of description, and do not indicate or imply that the device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance.
[0037] In addition, it should be noted that in the description of the present invention, unless otherwise clearly specified and limited, the terms "connection", "setting" and "installation" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, a direct connection, or an indirect connection through an intermediate medium. For those skilled in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0038] First refer to Figure 1 , the clock group device of the present application is described. Among them, Figure 1 It is a schematic diagram of a clock assembly device of the present utility model.
[0039] like Figure 1 As shown, in order to solve the problem that the existing clock group device cannot output a frequency signal with the advantages of high stability, good phase noise, high precision, etc., the clock group device of the present application includes an atomic clock module 1, a crystal oscillator module 2 and a phase-locked loop module 3, and the input end of the phase-locked loop module 3 is respectively connected to the output end of the atomic clock module 1 and the output end of the crystal oscillator module 2, and its output end is connected to the input end of the crystal oscillator module 2.
[0040] The clock group device of the present application phase-locks the atomic clock frequency signal output by the atomic clock module 1 and the crystal oscillator frequency signal output by the crystal oscillator module 2 by setting a phase-locked loop module 3, thereby realizing frequency synthesis, improving the accuracy and stability of the frequency signal, and reducing the phase noise of the frequency signal, so that the clock group device can output a frequency signal with the advantages of high stability, good phase noise, and high accuracy, thereby meeting the use requirements and ensuring that the communication system can operate stably for a long time.
[0041] See below for further reference Figure 1 , a preferred implementation of the clock group device of the present application is introduced. Those skilled in the art will understand that the implementation described below is only used to illustrate the principle of the present application and is not intended to limit the scope of protection of the present application. On the premise that the clock group device includes at least an atomic clock module 1, a crystal oscillator module 2 and a phase-locked loop module 3, those skilled in the art can adjust the following settings so that the present application can be applicable to more specific application scenarios.
[0042] See also Figure 1 The clock group device includes an atomic clock module 1, a crystal oscillator module 2 and a phase-locked loop module 3; wherein the atomic clock module 1 includes two atomic clocks, namely a first atomic clock 11 and a second atomic clock 12; the phase-locked loop module 3 includes two phase-locked loops, namely a first phase-locked loop 31 and a second phase-locked loop 32. The output end of the first atomic clock 11 is connected to the input end of the first phase-locked loop 31; the output end of the crystal oscillator module 2 is connected to the input end of the first phase-locked loop 31, and the input end of the crystal oscillator module 2 is connected to the output end of the first phase-locked loop 31. The output end of the second atomic clock 12 is connected to the input end of the second phase-locked loop 32; the output end of the crystal oscillator module 2 is connected to the input end of the second phase-locked loop 32, and the input end of the crystal oscillator module 2 is connected to the output end of the second phase-locked loop 32.
[0043] It is worth mentioning that the crystal oscillator module 2 can not only output the crystal oscillator frequency signal F3, but also receive the control signal generated by the phase-locked loop module 3, change the crystal oscillator frequency signal F3 according to the control signal, and output the changed crystal oscillator frequency signal F4.
[0044] Specifically, when the first atomic clock 11, the first phase-locked loop 31 and the crystal oscillator module 2 are working, the first atomic clock 11 can output the first atomic clock frequency signal F1 to the first phase-locked loop 31, and the crystal oscillator module 2 can output the crystal oscillator frequency signal F3 to the first phase-locked loop 31. After receiving the output signal of the first atomic clock 11 and the crystal oscillator frequency signal F3, the first phase-locked loop 31 can phase-lock the two signals to generate a first control signal S1, and output the first control signal S1 to the crystal oscillator module 2. After receiving the first control signal S1, the crystal oscillator module 2 changes the crystal oscillator frequency signal F3 and outputs the changed crystal oscillator frequency signal F4.
[0045] Similarly, when the second atomic clock 12, the second phase-locked loop 32 and the crystal oscillator module 2 are working, the second atomic clock 12 can output the second atomic clock frequency signal F2 to the second phase-locked loop 32, and the crystal oscillator module 2 can output the crystal oscillator frequency signal F3 to the second phase-locked loop 32. After receiving the output signal of the second atomic clock 12 and the crystal oscillator frequency signal F3, the second phase-locked loop 32 can phase-lock the two signals to generate a second control signal S2, and output the second control signal S2 to the crystal oscillator module 2. After receiving the second control signal S2, the crystal oscillator module 2 changes the crystal oscillator frequency signal F3 and outputs the changed crystal oscillator frequency signal F4.
[0046] Although, Figure 1 The figure shows that two atomic clocks and two phase-locked loops are set, and the atomic clocks and the phase-locked loops are connected in a one-to-one correspondence; however, this is only exemplary and not restrictive, and those skilled in the art can flexibly adjust the number of atomic clocks and phase-locked loops according to needs, as long as the phase-locked loops can be connected in a one-to-one correspondence with the atomic clocks. For example, three atomic clocks and three phase-locked loops can also be set, and the atomic clocks and the phase-locked loops are connected in a one-to-one correspondence.
[0047] It should be noted that the first atomic clock 11 is a high-performance atomic clock, which is a relatively high-precision, high-power atomic clock, and has the characteristics of high long-term stability, high precision, and high power consumption, such as the first atomic clock 11 is a hydrogen atomic clock, a cesium atomic clock, or a rubidium atomic clock. The second atomic clock 12 is a low-power atomic clock, which is a relatively low-precision, low-power atomic clock, and has the characteristics of low power consumption, high long-term stability, and high precision, such as the second atomic clock 12 is a CPT atomic clock. By setting different types of atomic clocks, the clock group device can include different types of frequency sources to meet different usage requirements.
[0048] Of course, the present application does not limit the frequencies of the first atomic clock 11 and the second atomic clock 12, and those skilled in the art can flexibly adjust them according to the needs, as long as their output frequencies are within the range of 1 MHz to 100 MHz. For example, the frequency of the first atomic clock 11 is 10 MHz or 100 MHz, and / or the frequency of the crystal oscillator module 2 of the second atomic clock 12 is 10 MHz or 100 MHz.
[0049] In addition, the present application does not limit the frequency and type of the crystal oscillator module 2, and those skilled in the art can flexibly adjust it according to the needs, as long as its output frequency is within the range of 1MHz to 100MHz. For example, the frequency of the crystal oscillator module 2 is 10MHz or 100MHz. For example, the crystal oscillator module 2 is a temperature compensated crystal oscillator or a constant temperature crystal oscillator.
[0050] It should also be noted that the present application does not limit the types of the first phase-locked loop 31 and the second phase-locked loop 32, and those skilled in the art can flexibly adjust them according to needs. For example, the first phase-locked loop 31 is an analog phase-locked loop or a digital phase-locked loop; and / or, the second phase-locked loop 32 is an analog phase-locked loop or a digital phase-locked loop.
[0051] Continue reading Figure 1 The clock group device also includes a switch module 4, the output end of the switch module 4 is connected to the user end (not shown in the figure); the switch module 4 includes a first input end and a second input end, the number of the first input ends is two, the two first input ends are respectively connected to the output end of the first atomic clock 11 and the output end of the second atomic clock 12, and the second input end is connected to the output end of the crystal oscillator module 2.
[0052] It is understandable that the number of first input terminals is not fixed in the present application, and those skilled in the art can flexibly adjust it according to the actual product situation. For example, when the number of atomic clocks is 3, the number of first input terminals is also 3, and the first input terminals are connected to the atomic clocks one by one.
[0053] Specifically, when the first atomic clock 11 is working, the first atomic clock 11 can output the first atomic clock frequency signal F1 to the switch module 4. After receiving the first atomic clock frequency signal F1, the switch module 4 can output the received first atomic clock frequency signal F1 to the user end for user use.
[0054] Similarly, when the second atomic clock 12 is working, the second atomic clock 12 can output the second atomic clock frequency signal F2 to the switch module 4. After receiving the second atomic clock frequency signal F2, the switch module 4 can output the received second atomic clock frequency signal F2 to the user end for user use.
[0055] Similarly, when the crystal oscillator module 2 is working, the crystal oscillator module 2 can output the crystal oscillator frequency signal F3 to the switch module 4. After receiving the crystal oscillator frequency signal F3, the switch module 4 can output the received crystal oscillator frequency signal F3 to the user end for the user to use.
[0056] Combine the following Figures 2 to 6 , introduces various working modes of the clock group device of the present application. Among them, Figure 2 This is a schematic diagram of the principle of the clock group device of the utility model. Figure 1 ; Figure 3 This is a schematic diagram of the principle of the clock group device of the utility model. Figure 2 ; Figure 4 This is a schematic diagram of the principle of the clock group device of the utility model. Figure 3 ; Figure 5 This is a schematic diagram of the principle of the clock group device of the utility model. Figure 4 ; Figure 6 This is a schematic diagram of the principle of the clock group device of the utility model. Figure 5 .
[0057] The working mode of the clock group device of the present application will be described below in conjunction with the following embodiments.
[0058] Embodiment 1
[0059] like Figure 2 As shown, when only the first atomic clock 11 is powered on, the output end of the switch module 4 is connected to the first input end corresponding to the output end of the first atomic clock 11, and the clock group device is in the first atomic clock mode, that is, the high-performance atomic clock mode.
[0060] Specifically, the first atomic clock 11 outputs the first atomic clock frequency signal F1 to the switch module 4. After receiving the first atomic clock frequency signal F1, the switch module 4 outputs the first atomic clock frequency signal F1 to the user end for use by the user. In this working mode, the clock group device has the characteristics of the first atomic clock 11, that is, it has the characteristics of high long-term stability, high precision but high power consumption.
[0061] Embodiment 2
[0062] like Figure 3 As shown, when only the second atomic clock 12 is powered on, the output end of the switch module 4 is connected to the first input end corresponding to the output end of the second atomic clock 12, and the clock group device is in the second atomic clock mode, that is, the low power atomic clock mode.
[0063] Specifically, the second atomic clock 12 outputs the second atomic clock frequency signal F2 to the switch module 4. After receiving the second atomic clock frequency signal F2, the switch module 4 outputs the second atomic clock frequency signal F2 to the user end for use by the user. In this working mode, the clock group device has the characteristics of the second atomic clock 12, that is, it has the characteristics of low power consumption, high long-term stability, and high accuracy.
[0064] Embodiment 3
[0065] like Figure 4 As shown, when only the crystal oscillator module 2 is powered on, the output end of the switch module 4 is connected to the second input end, and the clock group device is in the crystal oscillator mode.
[0066] Specifically, the crystal oscillator module 2 outputs the crystal oscillator frequency signal F3 to the switch module 4. After receiving the crystal oscillator frequency signal F3, the switch module 4 outputs the crystal oscillator frequency signal F3 to the user end for the user to use. In this working mode, the clock group device has the characteristics of the crystal oscillator module 2, that is, it has the characteristics of high short-term stability and good phase noise.
[0067] Embodiment 4
[0068] like Figure 5 As shown, when the first atomic clock 11, the first phase-locked loop 31 and the crystal oscillator module 2 are powered on, the output end of the switch module 4 is connected to the second input end, and the clock group device is in the first atomic clock phase-locked crystal oscillator mode, that is, the high-performance atomic clock combined crystal oscillator mode.
[0069] Specifically, the first atomic clock 11 outputs the first atomic clock frequency signal F1 to the first phase-locked loop 31, and the crystal oscillator frequency signal F3 output by the crystal oscillator module 2 is divided into two paths, one path is output to the first phase-locked loop 31, and the other path is output to the switch module 4; after receiving the first atomic clock frequency signal F1 and the crystal oscillator frequency signal F3, the first phase-locked loop 31 phase-locks the two signals and generates a first control signal S1. Afterwards, the first phase-locked loop 31 outputs the first control signal S1 to the crystal oscillator module 2. After receiving the first control signal S1, the crystal oscillator module 2 can change the crystal oscillator frequency signal F3 according to the first control signal S1 and output the changed crystal oscillator frequency signal F4 in two paths, one path is output to the first phase-locked loop 31 to continue to generate the first control signal S1 to control the crystal oscillator module 2, and the other path is output to the switch module 4. After receiving the crystal oscillator frequency signal F3 and the changed crystal oscillator frequency signal F4, the switch module 4 outputs the crystal oscillator frequency signal F3 and the changed crystal oscillator frequency signal F4 to the user end for user use. In this working mode, the clock group device has the characteristics of both the first atomic clock 11 and the crystal oscillator module 2, that is, it has the characteristics of high short-term stability, good phase noise, high long-term stability, high precision but high power consumption. In this working mode, except for high power consumption, the comprehensive performance of the clock group device is optimal.
[0070] Embodiment 5
[0071] like Figure 6 As shown, when the second atomic clock 12, the second phase-locked loop 32 and the crystal oscillator module 2 are powered on, the output end of the switch module 4 is connected to the second input end, and the clock group device is in the second atomic clock phase-locked crystal oscillator mode, that is, the low-power atomic clock combined crystal oscillator mode.
[0072] Specifically, the second atomic clock 12 outputs the second atomic clock frequency signal F2 to the second phase-locked loop 32, and the crystal oscillator frequency signal F3 output by the crystal oscillator module 2 is divided into two paths, one path is output to the second phase-locked loop 32, and the other path is output to the switch module 4; after receiving the second atomic clock frequency signal F2 and the crystal oscillator frequency signal F3, the second phase-locked loop 32 phase-locks the two signals and generates a second control signal S2. Afterwards, the second phase-locked loop 32 outputs the second control signal S2 to the crystal oscillator module 2. After receiving the second control signal S2, the crystal oscillator module 2 can change the crystal oscillator frequency signal F3 according to the second control signal S2 and output the changed crystal oscillator frequency signal F3 in two paths, one path is output to the second phase-locked loop 32 to continue to generate the second control signal S2 to control the crystal oscillator module 2, and the other path is output to the switch module 4. After receiving the crystal oscillator frequency signal F3 and the changed crystal oscillator frequency signal F4, the switch module 4 outputs the crystal oscillator frequency signal F3 and the changed crystal oscillator frequency signal F4 to the user end for user use. In this working mode, the clock group device has the characteristics of the second atomic clock 12 and the crystal oscillator module 2, that is, it has the characteristics of high short-term stability, good phase noise, low power consumption, high long-term stability and high accuracy.
[0073] In summary, the clock group device of the present application has a variety of different working modes, specifically including: high-performance atomic clock mode, low-power atomic clock mode, crystal oscillator mode, high-performance atomic clock combined crystal oscillator mode and low-power atomic clock combined crystal oscillator mode. In different working modes, the clock group device has different characteristics, so that the clock group device can be applied to different working environments to meet different indicator requirements.
[0074] So far, the technical solution of the present invention has been described in conjunction with the preferred embodiments shown in the accompanying drawings. However, it is easy for those skilled in the art to understand that the protection scope of the present invention is obviously not limited to these specific embodiments. Without departing from the principle of the present invention, those skilled in the art can make equivalent changes or substitutions to the relevant technical features, and the technical solutions after these changes or substitutions will fall within the protection scope of the present invention.
Claims
1. A clock assembly device, characterized in that: The clock group device comprises: Atomic clock module; Crystal oscillator module; A phase-locked loop module, wherein the input end of the phase-locked loop module is respectively connected to the output end of the atomic clock module and the output end of the crystal oscillator module, and the output end of the phase-locked loop module is connected to the input end of the crystal oscillator module.
2. The clock assembly according to claim 1, characterized in that: The atomic clock module includes a plurality of atomic clocks, and output ends of the plurality of atomic clocks are respectively connected to input ends of the phase-locked loop module.
3. The clock assembly according to claim 2, characterized in that: A portion of the multiple atomic clocks are high-performance atomic clocks, and another portion are low-power atomic clocks.
4. The clock assembly according to claim 2, characterized in that: The phase-locked loop module includes a plurality of phase-locked loops, and the phase-locked loops correspond to the atomic clocks one by one; The input end of each phase-locked loop is respectively connected to the output end of the crystal oscillator module and the output end of the atomic clock corresponding thereto, and the output end thereof is connected to the input end of the crystal oscillator module.
5. The clock assembly according to claim 4, characterized in that: The phase-locked loop is an analog phase-locked loop or a digital phase-locked loop.
6. The clock assembly according to claim 1, characterized in that: The clock group device also includes a switch module, the input end of the switch module is respectively connected to the output end of the atomic clock module and the output end of the crystal oscillator module, and the output end of the switch module is connected to the user end.
7. The clock assembly according to claim 6, characterized in that: The switch module includes a first input end and a second input end, the first input end is connected to the output end of the atomic clock module, and the second input end is connected to the output end of the crystal oscillator module.
8. The clock assembly according to claim 1, characterized in that: The crystal oscillator module is a temperature compensated crystal oscillator or a constant temperature crystal oscillator.
9. The clock assembly according to claim 1, characterized in that: The frequency of the atomic clock module is in the range of 1 MHz to 100 MHz.
10. The clock assembly according to claim 1, characterized in that: The frequency of the crystal oscillator module is in the range of 1 MHz to 100 MHz.