EMMC power-off test device

Abstract

The utility model discloses an eMMC power-off testing device. The eMMC power-off testing device comprises a master control module, a power-off control module, a touch screen module, a lamp control module, a power output interface module and a power supply module, the main control module is electrically connected with the touch screen module and the lamp control module. The power-off control module is connected with the power supply module and the master control module, and the power-off control module is electrically connected with the eMMC test board through the power output interface module. According to the utility model, 5V and 12V two-path power-off control is respectively and automatically carried out through the power-off control module, so that manual power-off operation is avoided, and the eMMC power-off test efficiency is improved; through the touch screen module, touch control can be performed, corresponding parameters can be set, and quick power-off, power-off at fixed time intervals and power-off at random time intervals can be realized; and meanwhile, the lamp control assembly is arranged, so that each state in the power-off test process can be visually reminded, the operation is simple, and the applicability is high.

Description

Technical Field

[0001] The utility model relates to the technical field of storage chips, in particular to an eMMC power-off test device. Background Art

[0002] eMMC (Embedded Multi Media Card) is a storage chip that integrates NAND Flash and a Flash controller on the same silicon wafer, and eMMC is commonly found in mobile terminals such as mobile phones and tablet computers.

[0003] Before leaving the factory, eMMC needs to undergo reliability tests for POR and PON. Among them, POR (Power Off Recovery) refers to data recovery in the case of accidental power-off. In theory, the data written into the storage chip should not be lost when powered off. PON (Power Off Notification) refers to the power-off notification mechanism of eMMC: the host will notify that power-off is about to occur before power-off, save the eMMC data, and then the host will officially power off after the maximum delay time.

[0004] Currently, the power-off test of eMMC is all carried out by manually powering off the eMMC test board, which is inefficient and has certain risks. Therefore, a device is needed that can control power-on and power-off timing, support the setting of the number of test cycles, and monitor the test status. Summary of the Utility Model

[0005] In view of the above problems, the present utility model is proposed to provide an eMMC power-off test device that overcomes the above problems or at least partially solves the above problems.

[0006] Other characteristics and advantages of the present utility model will become apparent through the following detailed description, or be learned partially through the practice of the present utility model.

[0007] According to the first aspect of the embodiments of the present utility model, an eMMC power-off test device is provided, which is applied to the power-off test of an eMMC test board. The eMMC power-off test device includes: a main control module, a power-off control module, a touch screen module, a light control module, a power output interface module, and a power supply module; the main control module is electrically connected to the touch screen module through an SPI bus, the main control module is electrically connected to the light control module in an I2C manner, and the main control module is connected to the eMMC test board in a USB or I2C manner; the power-off control module is respectively connected to the power supply module and the main control module, and the power-off control module is electrically connected to the eMMC test board through the power output interface module.

[0008] In some embodiments of the present utility model, the power-off control module includes a 5V power-off control circuit and a 12V power-off control circuit, and the structures of the 5V power-off control circuit and the 12V power-off control circuit are the same.

[0009] In some embodiments of the present utility model, the 5V power-off control circuit includes a first power input port, a second power port, a control signal input port, a first bead, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a first resistor, a second resistor, a third resistor, a fourth resistor, a P-channel field effect transistor, and an NPN bipolar junction transistor;

[0010] The first power input port is connected to the 1st pin of the first bead, the 2nd pin of the first bead is connected to the 2nd pin of the first capacitor, the 1st pin of the first capacitor is connected to the GND terminal, the 2nd pin of the first bead is connected to the 2nd pin of the second capacitor, the 1st pin of the second capacitor is connected to the GND terminal, the 2nd pin of the first bead is connected to the 1st pin of the first resistor, the 2nd pin of the first bead is connected to the 3rd pin of the P-channel field effect transistor, the 2nd pin of the first resistor is connected to the 1st pin of the P-channel field effect transistor, the 2nd pin of the P-channel field effect transistor is connected to the 2nd pin of the third capacitor, the 1st pin of the third capacitor is connected to the GND terminal, the 2nd pin of the P-channel field effect transistor is connected to the 2nd pin of the fourth capacitor, the 1st pin of the fourth capacitor is connected to the GND terminal, the 2nd pin of the P-channel field effect transistor is connected to the second power port, the 2nd pin of the P-channel field effect transistor is connected to the 2nd pin of the fourth resistor, the 1st pin of the P-channel field effect transistor is connected to the 3rd pin of the NPN bipolar junction transistor, the 2nd pin of the NPN bipolar junction transistor is connected to the GND terminal, the 1st pin of the NPN bipolar junction transistor is connected to the 2nd pin of the third resistor, the 1st pin of the third resistor is connected to the GND terminal, the 2nd pin of the third resistor is connected to the 1st pin of the second resistor, and the 2nd pin of the second resistor is connected to the control signal input port.

[0011] In some embodiments of the present utility model, pin 1, pin 5, pin 6, and pin 17 of the touch screen module interface are respectively connected to the GND terminal. Pin 3, pin 9, pin 10, pin 11, pin 12, pin 13, pin 14, pin 15, and pin 18 of the touch screen module interface are left floating. Pin 2 of the touch screen module interface is connected to the 3.3V power supply terminal output by the power supply module. Pin 4 of the touch screen module interface is connected to pin 29 of the main control module. Pin 7 of the touch screen module interface is connected to pin 15 of the main control module. Pin 8 of the touch screen module interface is connected to pin 17 of the main control module. Pin 16 of the touch screen module interface is connected to pin 38 of the main control module. Pin 19 of the touch screen module interface is connected to pin 39 of the main control module. Pin 20 of the touch screen module interface is connected to pin 40 of the main control module. Pin 21 of the touch screen module interface is connected to pin 21 of the main control module. Pin 22 of the touch screen module interface is connected to pin 22 of the main control module. Pin 23 of the touch screen module interface is connected to pin 32 of the main control module. Pin 24 of the touch screen module interface is connected to pin 33 of the main control module. Pin 7 of the touch screen module interface is connected to pin 2 of the tenth resistor. Pin 8 of the touch screen module interface is connected to pin 2 of the eleventh resistor. Pin 1 of the tenth resistor and pin 1 of the eleventh resistor are both connected to the power supply module.

[0012] In some embodiments of the present utility model, the power supply module includes a power input module and a step-down chip module. The step-down chip module includes a 3.3V step-down module and a 5V step-down module. The 3.3V step-down module and the 5V step-down module are respectively connected to the power input module.

[0013] In some embodiments of the present utility model, the power input module includes a power input interface, a rocker switch, a fuse, an anti-reverse connection diode, an electrostatic and surge protection tube, a power indicator light, and a forty-second resistor;

[0014] Pins 2 and 3 of the power input interface are both connected to the GND terminal. Pin 4 of the power input interface is connected to pin 1 of the third magnetic bead. Pin 2 of the third magnetic bead is connected to pin 1 of the rocker switch. Pin 2 of the rocker switch is connected to pin 1 of the fuse. Pin 2 of the fuse is connected to pin 1 of the anti-reverse connection diode. Pin 2 of the anti-reverse connection diode is connected to the GND terminal. Pin 2 of the fuse is connected to pin 2 of the electrostatic and surge protection tube. Pin 1 of the electrostatic and surge protection tube is connected to the GND terminal. Pin 2 of the fuse is connected to pin 2 of the power indicator light. Pin 1 of the power indicator light is connected to pin 1 of the forty-second resistor. Pin 2 of the forty-second resistor is connected to the GND terminal. Pin 2 of the fuse is connected to the 12V power supply terminal.

[0015] In some embodiments of the present utility model, the 3.3V step-down module includes a second step-down chip, a third bead, a thirty-fifth resistor, a thirty-eighth resistor, a forty-first resistor, a second power inductor, an eighteenth capacitor, a power supply indicator light, a thirty-ninth resistor, a twentieth capacitor, a twenty-first capacitor, a twenty-second capacitor, and a twenty-third capacitor;

[0016] The 12V power supply terminal of the power input module is connected to the 1st pin of the third bead, the 2nd pin of the third bead is connected to the 1st pin of the twentieth capacitor, the 2nd pin of the twentieth capacitor is connected to the GND terminal, the 2nd pin of the third bead is connected to the 1st pin of the thirty-fifth resistor, the 2nd pin of the thirty-fifth resistor is connected to the 4th pin of the second step-down chip, the 1st pin of the thirty-fifth resistor is connected to the 5th pin of the second step-down chip, the 2nd pin of the second step-down chip is connected to the GND terminal, the 6th pin of the second step-down chip is connected to the 1st pin of the second power inductor, the 1st pin of the second power inductor is connected to the 1st pin of the eighteenth capacitor, the 2nd pin of the eighteenth capacitor is connected to the 1st pin of the second step-down chip, the 2nd pin of the second power inductor is connected to the 1st pin of the thirty-eighth resistor, the 2nd pin of the thirty-eighth resistor is connected to the 3rd pin of the second step-down chip, the 2nd pin of the thirty-eighth resistor is connected to the 1st pin of the forty-first resistor, the 2nd pin of the forty-first resistor is connected to the GND terminal, the 1st pin of the forty-first resistor is connected to the 2nd pin of the twenty-first capacitor, the 1st pin of the twenty-first capacitor is connected to the 2nd pin of the second power inductor, the 1st pin of the twenty-first capacitor is connected to the 1st pin of the twenty-second capacitor, the 1st pin of the twenty-first capacitor is connected to the 1st pin of the twenty-third capacitor, the 2nd pin of the twenty-second capacitor is connected to the GND terminal, the 2nd pin of the twenty-third capacitor is connected to the GND terminal, the 1st pin of the twenty-third capacitor is connected to the 1st pin of the thirty-ninth resistor, the 2nd pin of the thirty-ninth resistor is connected to the 2nd pin of the power supply indicator light, the 1st pin of the power supply indicator light is connected to the GND terminal, and the 1st pin of the twenty-third capacitor is connected to the 3.3V power supply terminal.

[0017] In some embodiments of the present utility model, the 5V step-down module includes a first step-down chip, a second bead, a thirty-sixth resistor, a thirty-seventh resistor, a fortieth resistor, a first power inductor, a fourteenth capacitor, a fifteenth capacitor, a sixteenth capacitor, a seventeenth capacitor, and a nineteenth capacitor;

[0018] The 12V power supply terminal output by the power input module is connected to pin 1 of the second bead. Pin 2 of the second bead is connected to pin 1 of the fifteenth capacitor. Pin 2 of the fifteenth capacitor is connected to the GND terminal. Pin 2 of the second bead is connected to pin 1 of the thirty-sixth resistor. Pin 2 of the thirty-sixth resistor is connected to pin 4 of the first step-down chip. Pin 1 of the thirty-fifth resistor is connected to pin 5 of the first step-down chip. Pin 2 of the first step-down chip is connected to the GND terminal. Pin 6 of the first step-down chip is connected to pin 1 of the first power inductor. Pin 1 of the first power inductor is connected to pin 1 of the fourteenth capacitor. Pin 2 of the fourteenth capacitor is connected to pin 1 of the first step-down chip. Pin 2 of the first power inductor is connected to pin 1 of the thirty-seventh resistor. Pin 2 of the thirty-seventh resistor is connected to pin 3 of the first step-down chip. Pin 2 of the thirty-seventh resistor is connected to pin 1 of the fortieth resistor. Pin 2 of the fortieth resistor is connected to the GND terminal. Pin 1 of the fortieth resistor is connected to pin 2 of the sixteenth capacitor. Pin 1 of the sixteenth capacitor is connected to pin 2 of the first power inductor. Pin 1 of the sixteenth capacitor is connected to pin 1 of the seventeenth capacitor. Pin 1 of the sixteenth capacitor is connected to pin 1 of the nineteenth capacitor. Pin 2 of the seventeenth capacitor is connected to the GND terminal. Pin 2 of the nineteenth capacitor is connected to the GND terminal. Pin 1 of the nineteenth capacitor is connected to the 5V power supply terminal.

[0019] In some embodiments of the present invention, the lamp control module includes a lamp control chip and a light-emitting diode assembly connected to each other. The light-emitting diode assembly includes a first indicator light, a second indicator light, a third indicator light, a fourth indicator light, a fifth indicator light, and a sixth indicator light.

[0020] Pin 42 of the main control module is connected to pin 4 of the lamp control chip, pin 43 of the main control module is connected to pin 5 of the lamp control chip, pin 18 of the main control module is connected to pin 29 of the lamp control chip, pins 9 and 33 of the lamp control chip are connected to the GND terminal, pins 16, 19, 20, 21, 22, 23, and 24 of the lamp control chip are left floating, pins 6 and 7 of the lamp control chip are connected to pin 2 of the thirty-fourth resistor, pin 1 of the thirty-fourth resistor is connected to the GND terminal, pin 28 of the lamp control chip is connected to pin 1 of the twenty-first resistor, pin 2 of the twenty-first resistor is connected to the power supply module, pin 1 of the lamp control chip is connected to pin 2 of the twenty-eighth resistor, pin 2 of the lamp control chip is connected to pin 2 of the twenty-ninth resistor, pin 3 of the lamp control chip is connected to pin 2 of the thirty-second resistor, pin 10 of the lamp control chip is connected to pin 2 of the thirty-third resistor, pin 11 of the lamp control chip is connected to pin 2 of the thirty-first resistor, pin 12 of the lamp control chip is connected to pin 2 of the thirtieth resistor, pin 13 of the lamp control chip is connected to pin 2 of the twenty-seventh resistor, pin 14 of the lamp control chip is connected to pin 2 of the twenty-fifth resistor, pin 15 of the lamp control chip is connected to pin 2 of the twenty-fourth resistor, pin 17 of the lamp control chip is connected to pin 2 of the twentieth resistor, pin 18 of the lamp control chip is connected to pin 2 of the eighteenth resistor, pin 19 of the lamp control chip is connected to pin 2 of the sixteenth resistor, pin 25 of the lamp control chip is connected to pin 2 of the fifteenth resistor, pin 26 of the lamp control chip is connected to pin 2 of the seventeenth resistor, pin 27 of the lamp control chip is connected to pin 2 of the nineteenth resistor, pin 30 of the lamp control chip is connected to pin 2 of the twenty-third resistor, pin 31 of the lamp control chip is connected to pin 2 of the twenty-second resistor, pin 32 of the lamp control chip is connected to pin 2 of the twenty-sixth resistor, pin 7 of the lamp control chip is connected to pin 2 of the thirty-fourth resistor, pin 1 of the thirty-fourth resistor is connected to the GND terminal, pins 9 and 33 of the lamp control chip are connected to the GND terminal;

[0021] The first pin of the fifteenth resistor is connected to the first pin of the first indicator light, the first pin of the seventeenth resistor is connected to the second pin of the first indicator light, the first pin of the nineteenth resistor is connected to the third pin of the first indicator light, the first pin of the sixteenth resistor is connected to the first pin of the second indicator light, the first pin of the eighteenth resistor is connected to the second pin of the second indicator light, the first pin of the twentieth resistor is connected to the third pin of the second indicator light, the first pin of the twenty-third resistor is connected to the first pin of the third indicator light, the first pin of the twenty-second resistor is connected to the second pin of the third indicator light, the first pin of the twenty-sixth resistor is connected to the third pin of the third indicator light, the first pin of the twenty-fourth resistor is connected to the first pin of the fourth indicator light, the first pin of the twenty-fifth resistor is connected to the second pin of the fourth indicator light, the first pin of the twenty-seventh resistor is connected to the third pin of the fourth indicator light, the first pin of the twenty-eighth resistor is connected to the first pin of the fifth indicator light, the first pin of the twenty-ninth resistor is connected to the second pin of the fifth indicator light, the first pin of the thirty-second resistor is connected to the third pin of the fifth indicator light, the first pin of the thirtieth resistor is connected to the first pin of the sixth indicator light, the first pin of the thirty-first resistor is connected to the second pin of the sixth indicator light, and the first pin of the thirty-third resistor is connected to the third pin of the sixth indicator light.

[0022] The technical solution provided in the embodiment of the present invention has at least the following technical effects or advantages:

[0023] An eMMC power-off test device provided in an embodiment of the present invention. The device automatically performs power-off control for two paths of 5V and 12V respectively through a power-off control module, avoiding manual power-off operations, and improving the eMMC power-off test efficiency; through a touch screen module, touch control can be performed to set corresponding parameters to achieve fast power-off, power-off at a fixed time interval, and power-off at a random time interval; at the same time, a lamp control component is provided, which can visually remind each state in the power-off test process, with simple operation and high applicability.

[0024] The above description is only an overview of the technical solution of the present invention. In order to be able to understand the technical means of the present invention more clearly, it can be implemented according to the content of the description. And in order to make the above and other purposes, features and advantages of the present invention more obvious and understandable, the following specifically gives the specific implementation manners of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required to be used in the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0026] Figure 1 It is a schematic diagram of the principle structure of an eMMC power-off test device provided in an embodiment of the present invention;

[0027] Figure 2 Circuit reference schematic diagram of the 5V power-off control circuit;

[0028] Figure 3 Circuit reference schematic diagram of the touch screen module;

[0029] Figure 4 Circuit reference schematic diagram of the power input module;

[0030] Figure 5 Circuit reference schematic diagram of the 3.3V step-down module;

[0031] Figure 6 Circuit reference schematic diagram of the 5V step-down module;

[0032] Figure 7 Circuit reference schematic diagram of the power output interface module;

[0033] Figure 8 Circuit reference schematic diagram of the main control chip module;

[0034] Figure 9 Circuit reference schematic diagram of the reset circuit;

[0035] Figure 10 Circuit reference schematic diagram of the lamp control chip;

[0036] Figure 11 Circuit reference schematic diagram of the light-emitting diode assembly;

[0037] Figure 12 Flow schematic diagram of a method for eMMC power-off test provided by an embodiment of the present utility model.

[0038] Explanation of reference numerals:

[0039] 1. Power supply module; 2. Power-off control module; 3. Main control module; 4. Touch screen module; 5. Power output interface module; 6. Lamp control module; 7. Buzzer module; 8. eMMC test board; 11. Power input module; 12. Step-down chip module; 21. 5V power-off control circuit; 22. 12V power-off control circuit; 60. Light-emitting diode assembly; 121. 3.3V step-down module; 122. 5V step-down module; U2. Lamp control chip. Detailed implementation manners

[0040] Hereinafter, exemplary embodiments of the present disclosure will be described in more detail with reference to the accompanying drawings.

[0041] Various structural schematic diagrams according to embodiments of the present disclosure are shown in the accompanying drawings. These figures are not drawn to scale, where certain details are enlarged for the purpose of clear expression, and some details may be omitted. The shapes of various regions and layers shown in the figures, as well as their relative sizes and positional relationships, are merely exemplary and may deviate in practice due to manufacturing tolerances or technical limitations. Those skilled in the art can additionally design regions / layers with different shapes, sizes, and relative positions according to actual needs.

[0042] In the context of the present disclosure, when a layer / element is referred to as being "on" another layer / element, the layer / element can be directly on the other layer / element, or there can be an intermediate layer / element between them. Additionally, if a layer / element is "on" another layer / element in one orientation, then when the orientation is reversed, the layer / element can be "under" the other layer / element. In the context of the present disclosure, similar or identical components may be denoted by the same or similar reference numerals.

[0043] To better understand the above technical solutions, the above technical solutions will be described in detail below in conjunction with specific embodiments. It should be understood that the embodiments of the present disclosure and the specific features in the embodiments are detailed descriptions of the technical solutions of the present invention, rather than limitations on the technical solutions of the present invention. Without conflict, the technical features in the embodiments of the present invention and the embodiments can be combined with each other.

[0044] Figure 1 is a schematic diagram of the principle structure of an eMMC power-off test device provided by an embodiment of the present invention, which is applied to the power-off test of the eMMC test board 8, as Figure 1 shown, the eMMC power-off test device includes: a main control module 3, a power-off control module 2, a touch screen module 4, a light control module 6, a power output interface module 5, and a power supply module 1; the main control module 3 is electrically connected to the touch screen module 4 through an SPI bus, the main control module 3 is electrically connected to the light control module 6 in an I2C manner, and the main control module 3 is connected to the eMMC test board 8 in a USB or I2C manner; the power-off control module 2 is respectively connected to the power supply module 1 and the main control module 3, and the power-off control module 2 is electrically connected to the eMMC test board 8 through the power output interface module 5.

[0045] In other embodiments of the present invention, the eMMC power-off test device may further include a buzzer module 7, and the buzzer module 7 is electrically connected to the main control module 3 through an SPI bus, and is used for beeping and alarming when a fault occurs during the test.

[0046] The user controls the tests of each port through the touch screen, and the test status is fed back to the touch screen module 4 for real-time display. Specifically: The user selects the power output port of the power supply module 1 on the touch screen module 4, then selects test parameters such as the power-off state, power-off time interval, number of power-off cycles, and load state, and clicks OK; The touch screen module 4 sends the test parameters selected by the user to the main control module 3 through the SPI interface; The main control module 3 judges the power output port and real-time status selected by the user. If the selected channel requires the start of the power-off test state, the power-off parameters of the power-off control module 2 are set through the main control module 3, including the power-off time interval, number of power-off test cycles, and load state; If the selected channel requires a pause state, it goes to the main control module 3 to control the power-off control module to stop the power-off cycle; The load state of the eMMC control board is updated through the communication interface; The eMMC control board returns a command indicating that the load state has been set through the communication interface; The main control module 3 updates the lamp control state of each output of the lamp control module 6 in real time; The main control controls the power-off control module to perform a power-off cycle. The test channel, the set number of test cycles per path, the number of completed cycles, the power-off interval time, and the words "Test in progress" are displayed on the touch screen. At this time, the indicator light of the power output channel for the power-off test flashes green; The main control module 3 controls the power-off control module to stop the power-off cycle. The paused channel, the set number of test cycles per path, the number of completed cycles, the power-off interval time, and the words "Test paused" are displayed on the touch screen. At this time, the indicator light of the power output channel for the power-off pause flashes orange; When the touch screen sends a test start command to the main control, it goes to the main control module 3 to control the power-off control module to perform a power-off cycle; If a short-circuit protection is triggered during the test, the main control will stop the power-off test and display the words "Power short circuit" on the touch screen. At this time, the indicator light of the power output channel with the error lights up red, and the buzzer component emits a buzzer alarm. When the touch screen module 4 sends a test start command to the main control module 3, it goes to the main control module 3 to control the power-off control module to perform a power-off cycle; After the power-off test is completed, the touch screen module 4 displays the test results, including the number of completed cycles and the words "Test ended". At this time, the indicator light of the lamp control module 6 is in a constant yellow light state.

[0047] In the embodiment of the present invention, the power-off control module 2 includes two paths, namely a 5V power-off control circuit 21 and a 12V power-off control circuit 22, which respectively control the power-off control functions of 5V and 12V, and the structures of the 5V power-off control circuit 21 and the 12V power-off control circuit 22 are the same. The following takes the 5V power-off control circuit 21 as an example for description. Refer to Figure 2 as shown Figure 2It is a circuit reference schematic diagram of the 5V power-off control circuit 21. The 5V power-off control circuit 21 includes a first power input port P1, a second power port P2, a control signal input port P3, a first bead FB1, a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a P-channel field effect transistor G1, and an NPN-type triode Q1;

[0048] The first power input port P1 is connected to the pin 1 of the first bead FB1. The pin 2 of the first bead FB1 is connected to the pin 2 of the first capacitor C1. The pin 1 of the first capacitor C1 is connected to the GND terminal. The pin 2 of the first bead FB1 is connected to the pin 2 of the second capacitor C2. The pin 1 of the second capacitor C2 is connected to the GND terminal. The pin 2 of the first bead FB1 is connected to the pin 1 of the first resistor R1. The pin 2 of the first bead FB1 is connected to the pin 3 of the P-channel field effect transistor G1. The pin 2 of the first resistor R1 is connected to the pin 1 of the P-channel field effect transistor G1. The pin 2 of the P-channel field effect transistor G1 is connected to the pin 2 of the third capacitor C3. The pin 1 of the third capacitor C3 is connected to the GND terminal. The pin 2 of the P-channel field effect transistor G1 is connected to the pin 2 of the fourth capacitor C4. The pin 1 of the fourth capacitor C4 is connected to the GND terminal. The pin 2 of the P-channel field effect transistor G1 is connected to the second power port P2. The pin 2 of the P-channel field effect transistor G1 is connected to the pin 2 of the fourth resistor R4. The pin 1 of the fourth resistor R4 is connected to the pin 2 of the first indicator LED1. The pin 1 of the first indicator LED1 is connected to the GND terminal. The pin 1 of the P-channel field effect transistor G1 is connected to the pin 3 of the NPN-type triode Q1. The pin 2 of the NPN-type triode Q1 is connected to the GND terminal. The pin 1 of the NPN-type triode Q1 is connected to the pin 2 of the third resistor R3. The pin 1 of the third resistor R3 is connected to the GND terminal. The pin 2 of the third resistor R3 is connected to the pin 1 of the second resistor R2. The pin 2 of the second resistor R2 is connected to the control signal input port P3.

[0049] When the pin of the main control connected to the control signal input port P3 outputs a high level, the NPN-type triode Q1 is saturated and turned on, Vce is equal to 0V, and the pin 1 of the P-channel field effect transistor G1 is connected to the GND terminal. At this time, the P-channel field effect transistor G1 is turned on, and the first power input port P1 supplies power to the second power port P2. When the pin of the main control connected to the control signal input port P3 outputs a low level, the NPN-type triode Q1 is turned off, the P-channel field effect transistor G1 is turned off, and the first power input port P1 stops supplying power to the second power port P2.

[0050] The pins of the main control connected to the control signal input port P3 can switch between high and low levels at a certain time interval to achieve power-off cycling. There is a power-off control circuit for each of the 12V and 5V paths. The time interval can be selected according to actual requirements, and the embodiments of the present invention have no limitation on this.

[0051] In the embodiments of the present invention, the touch screen module 4 may include a 2.8-inch graphic OLED display, a CTP capacitive touch panel, and a 4-wire SPI interface; the resolution of the touch screen module 4 is, for example, 256x64 pixels, and the effective display area size is 69.1mm x 17.26mm. In some embodiments of the present invention, an iron frame and a plurality of screw holes may also be provided on the touch screen module 4 for easy installation and use.

[0052] The product model of the touch screen module 4 is, for example, WEN025664A-CTP, refer to Figure 3 as shown Figure 3 is a circuit reference schematic diagram of the touch screen module 4. Pin 1, Pin 5, Pin 6, and Pin 17 of the touch screen module 4 interface are respectively connected to the GND terminal. Pins 3, 9, 10, 11, 12, 13, 14, 15, and 18 of the touch screen module 4 interface are left floating. Pin 2 of the touch screen module 4 interface is connected to the 3.3V power supply terminal output by the power supply module 1. Pin 4 of the touch screen module 4 interface is connected to Pin 29 of the main control module 3. Pin 7 of the touch screen module 4 interface is connected to Pin 15 of the main control module 3. Pin 8 of the touch screen module 4 interface is connected to Pin 17 of the main control module 3. Pin 16 of the touch screen module 4 interface is connected to Pin 38 of the main control module 3. Pin 19 of the touch screen module 4 interface is connected to Pin 39 of the main control module 3. Pin 20 of the touch screen module 4 interface is connected to Pin 40 of the main control module 3. Pin 21 of the touch screen module 4 interface is connected to Pin 21 of the main control module 3. Pin 22 of the touch screen module 4 interface is connected to Pin 22 of the main control module 3. Pin 23 of the touch screen module 4 interface is connected to Pin 32 of the main control module 3. Pin 24 of the touch screen module 4 interface is connected to Pin 33 of the main control module 3. Pin 7 of the touch screen module 4 interface is connected to Pin 2 of the tenth resistor R10. Pin 8 of the touch screen module 4 interface is connected to Pin 2 of the eleventh resistor R11. Pin 1 of the tenth resistor R10 and Pin 1 of the eleventh resistor R11 are both connected to the 3.3V power supply terminal output by the power supply module 1.

[0053] In the embodiment of the present utility model, the touch screen module 4 communicates with the main control module 3 through an SPI interface. The user can directly input commands on the touch screen module 4 to control power-off, and at the same time, the touch screen module 4 real-time feedbacks the test status and / or test results. When the main control module 3 is powered on, the 33rd pin of the main control module 3 will be pulled low, and at this time, the touch screen module 4 starts to reset and display the current test status and / or test results.

[0054] In the embodiment of the present utility model, the power supply module 1 includes a power input module 11 and a step-down chip module 12 that are electrically connected to each other; among them, the first step-down chip U3 (product model is, for example, SY8120B1ABC) and the second step-down chip U4 (product model is, for example, SY8120B1ABC) in the step-down chip module 12 both support soft start to prevent the impact of inrush current during power-off, and can set cycle-by-cycle current limit protection and overvoltage protection.

[0055] In the embodiment of the present utility model, refer to Figure 4 as shown Figure 4 is a circuit reference schematic diagram of the power input module 11. The power input module 11 includes a power input interface J4, a rocker switch SW5, a fuse F1, an anti-reverse connection diode D8, an electrostatic and surge protection tube D9, a power indicator LED8, and a forty-second resistor R42;

[0056] The 2nd and 3rd pins of the power input interface J4 are both connected to the GND terminal. The 4th pin of the power input interface J4 is connected to the 1st pin of the third magnetic bead FB3. The 2nd pin of the third magnetic bead FB3 is connected to the 1st pin of the rocker switch SW5. The 2nd pin of the rocker switch SW5 is connected to the 1st pin of the fuse F1. The 2nd pin of the fuse F1 is connected to the 1st pin of the anti-reverse connection diode D8. The 2nd pin of the anti-reverse connection diode D8 is connected to the GND terminal. The 2nd pin of the fuse F1 is connected to the 2nd pin of the electrostatic and surge protection tube D9. The 1st pin of the electrostatic and surge protection tube D9 is connected to the GND terminal. The 2nd pin of the fuse F1 is connected to the 2nd pin of the power indicator LED8. The 1st pin of the power indicator LED8 is connected to the 1st pin of the forty-second resistor R42. The 2nd pin of the forty-second resistor R42 is connected to the GND terminal. The 2nd pin of the fuse F1 is connected to the 12V power supply terminal INPUT_12V.

[0057] The forty-second resistor R42 is a current-limiting resistor. The electrostatic and surge protection tube D9 plays an ESD protection role. The fuse F1 plays a short-circuit protection role. The anti-reverse connection diode D8 plays an anti-reverse connection role. When the input power is reversely connected, the anti-reverse connection diode D8 conducts in the reverse direction with a large current, and at this time, the fuse F1 will melt to protect the components at the rear stage of the circuit. The rocker switch SW5 is the main power hard switch of the whole board, and its rated current is 6A. The power input interface J4 is a conventional DC power adapter socket, and its rated current is 5A.

[0058] In the embodiment of the present utility model, the step-down chip module 12 includes a 3.3V step-down module 121 and a 5V step-down module 122, and the 3.3V step-down module 121 and the 5V step-down module 122 are respectively connected to the power input module 11.

[0059] In the embodiment of the present utility model, refer to Figure 5 as shown Figure 5 is a circuit reference schematic diagram of the 3.3V step-down module 121. The 3.3V step-down module 121 includes a second step-down chip U4, a third bead FB3, a thirty-fifth resistor R35, a thirty-eighth resistor R38, a forty-first resistor R41, a second power inductor L2, an eighteenth capacitor C18, a power supply indicator LED7, a thirty-ninth resistor R39, a twentieth capacitor C20, a twenty-first capacitor C21, a twenty-second capacitor C22, and a twenty-third capacitor C23;

[0060] The 12V power supply terminal INPUT_12V of the power input module 11 is connected to the 1st pin of the third bead FB3. The 2nd pin of the third bead FB3 is connected to the 1st pin of the twentieth capacitor C20. The 2nd pin of the twentieth capacitor C20 is connected to the GND terminal. The 2nd pin of the third bead FB3 is connected to the 1st pin of the thirty-fifth resistor R35. The 2nd pin of the thirty-fifth resistor R35 is connected to the 4th pin of the second step-down chip U4. The 1st pin of the thirty-fifth resistor R35 is connected to the 5th pin of the second step-down chip U4. The 2nd pin of the second step-down chip U4 is connected to the GND terminal. The 6th pin of the second step-down chip U4 is connected to the 1st pin of the second power inductor L2. The 1st pin of the second power inductor L2 is connected to the 1st pin of the eighteenth capacitor C18. The 2nd pin of the eighteenth capacitor C18 is connected to the 1st pin of the second step-down chip U4. The 2nd pin of the second power inductor L2 is connected to the 1st pin of the thirty-eighth resistor R38. The 2nd pin of the thirty-eighth resistor R38 is connected to the 3rd pin of the second step-down chip U4. The 2nd pin of the thirty-eighth resistor R38 is connected to the 1st pin of the forty-first resistor R41. The 2nd pin of the forty-first resistor R41 is connected to the GND terminal. The 1st pin of the forty-first resistor R41 is connected to the 2nd pin of the twenty-first capacitor C21. The 1st pin of the twenty-first capacitor C21 is connected to the 2nd pin of the second power inductor L2. The 1st pin of the twenty-first capacitor C21 is connected to the 1st pin of the twenty-second capacitor C22. The 1st pin of the twenty-first capacitor C21 is connected to the 1st pin of the twenty-third capacitor C23. The 2nd pin of the twenty-second capacitor C22 is connected to the GND terminal. The 2nd pin of the twenty-third capacitor C23 is connected to the GND terminal. The 1st pin of the twenty-third capacitor C23 is connected to the 1st pin of the thirty-ninth resistor R39. The 2nd pin of the thirty-ninth resistor R39 is connected to the 2nd pin of the power supply indicator LED7. The 1st pin of the power supply indicator LED7 is connected to the GND terminal. The 1st pin of the twenty-third capacitor C23 is connected to the 3.3V power supply terminal.

[0061] In an embodiment of the present utility model, the thirty-fifth resistor R35 is a pull-up resistor, the thirty-eighth resistor R38 and the forty-first resistor R41 are voltage-dividing resistors, the thirty-ninth resistor R39 is a current-limiting resistor, the eighteenth capacitor C18 is a bootstrap capacitor, and the twentieth capacitor C20, the twenty-first capacitor C21, the twenty-second capacitor C22, and the twenty-third capacitor C23 are all decoupling capacitors.

[0062] In an embodiment of the present utility model, refer to Figure 6 as shown in Figure 6 FIG. is a circuit reference schematic diagram of the 5V buck module 122. The 5V buck module 122 includes a first buck chip U3, a second bead FB2, a thirty-sixth resistor R36, a thirty-seventh resistor R37, a fortieth resistor R40, a first power inductor L1, a fourteenth capacitor C14, a fifteenth capacitor C15, a sixteenth capacitor C16, a seventeenth capacitor C17, and a nineteenth capacitor C19;

[0063] The 12V power supply terminal INPUT_12V output by the power input module 11 is connected to the 1st pin of the second bead FB2. The 2nd pin of the second bead FB2 is connected to the 1st pin of the fifteenth capacitor C15. The 2nd pin of the fifteenth capacitor C15 is connected to the GND terminal. The 2nd pin of the second bead FB2 is connected to the 1st pin of the thirty-sixth resistor R36. The 2nd pin of the thirty-sixth resistor R36 is connected to the 4th pin of the first buck chip U3. The 1st pin of the thirty-fifth resistor R35 is connected to the 5th pin of the first buck chip U3. The 2nd pin of the first buck chip U3 is connected to the GND terminal. The 6th pin of the first buck chip U3 is connected to the 1st pin of the first power inductor L1. The 1st pin of the first power inductor L1 is connected to the 1st pin of the fourteenth capacitor C14. The 2nd pin of the fourteenth capacitor C14 is connected to the 1st pin of the first buck chip U3. The 2nd pin of the first power inductor L1 is connected to the 1st pin of the thirty-seventh resistor R37. The 2nd pin of the thirty-seventh resistor R37 is connected to the 3rd pin of the first buck chip U3. The 2nd pin of the thirty-seventh resistor R37 is connected to the 1st pin of the fortieth resistor R40. The 2nd pin of the fortieth resistor R40 is connected to the GND terminal. The 1st pin of the fortieth resistor R40 is connected to the 2nd pin of the sixteenth capacitor C16. The 1st pin of the sixteenth capacitor C16 is connected to the 2nd pin of the first power inductor L1. The 1st pin of the sixteenth capacitor C16 is connected to the 1st pin of the seventeenth capacitor C17. The 1st pin of the sixteenth capacitor C16 is connected to the 1st pin of the nineteenth capacitor C19. The 2nd pin of the seventeenth capacitor C17 is connected to the GND terminal. The 2nd pin of the nineteenth capacitor C19 is connected to the GND terminal. The 1st pin of the nineteenth capacitor C19 is connected to the 5V power supply terminal INPUT_5V.

[0064] In the embodiment of the present utility model, the thirty-sixth resistor R36 is a pull-up resistor, the thirty-seventh resistor R37 and the fortieth resistor R40 are voltage-dividing resistors, the fourteenth capacitor C14 is a bootstrap capacitor, and the fifteenth capacitor C15, sixteenth capacitor C16, seventeenth capacitor C17 and nineteenth capacitor C19 are all decoupling capacitors.

[0065] In the embodiment of the present utility model, the power output interface module 5 is respectively connected to the 5V power-off control circuit 21 and the 12V power-off control circuit 22. Refer to Figure 7 As shown, the power output interface module 5 includes 3 USB-A female sockets and 3 round head diameter sockets. The USB-A female sockets can be externally connected to line groups such as Type-C and Micro USB, and the round head diameter sockets can be self-wired to various power adapter DC male plugs.

[0066] In the embodiment of the present utility model, the main control module 3 includes a main control chip module, a crystal oscillator and a reset circuit. The main control chip module is respectively connected to the reset circuit and the crystal oscillator. The product model of the main control chip module is, for example, STM32F103CXT2.

[0067] Refer to Figure 8 As shown, it is the reference circuit diagram corresponding to the main control chip module. The 21st and 22nd pins of the main control chip module are the I2C interfaces for controlling the eMMC test board 8, the 25th, 26th, 27th and 28th pins of the main control chip module are the SPI interfaces for controlling the eMMC test board 8, and the 12th, 13th, 30th and 31st pins of the main control chip module are the debug serial port interfaces. The 10th, 11th and 15th pins of the main control chip module are the enable pins for controlling the 5V power-off control circuit 21, and the 17th, 45th and 46th pins of the main control chip module are the enable pins for controlling the 12V power-off control circuit 22. The crystal oscillator uses an 8MHz passive crystal oscillator, and the load first capacitor C1, load second capacitor C2 and sixth resistor R6 form a Π-type network to generate a 180° phase shift to meet the oscillation condition; the main control module 3 communicates with the touch screen module 4 through SPI. The user can control the multi-channel power output through the touch screen module 4. The power supply module 1 defaults to output 12V and 5V, and supports overvoltage protection and short-circuit protection. The power supply has two output interfaces, USB-A and round head diameter sockets, to adapt to different control boards, and each output interface has three.

[0068] Refer to Figure 9 As shown, it is the circuit reference schematic diagram of the reset circuit. The NRST network of the reset circuit needs to be connected to the 7th pin of the main control chip module. Its RC circuit provides a certain reset time for the main control chip module, and the external button supports one-key reset for easy debugging.

[0069] In the embodiment of the present utility model, the lamp control module 6 includes a lamp control chip U2 and a light-emitting diode assembly 60 which are connected to each other. The lamp control chip U2 is an 8-bit flash microcontroller embedded with an 8051 chip, and the product model is, for example, QFN32. The lamp control chip U2 internally includes a 28MHz high-precision oscillator, does not require external components to provide the system frequency, supports 24 channels of PWM, with a current of 20mA * 15 and 50mA * 9, and supports the I2C communication interface. The light-emitting diode assembly 60 includes six parallel-connected light-emitting diodes (i.e., the first indicator LED1, the second indicator LED2, the third indicator LED3, the fourth indicator LED4, the fifth indicator LED5, and the sixth indicator LED6). The light-emitting color of the light-emitting diodes is red, yellow, and emerald green, with a common anode, and the default current size of each channel of light-emitting diodes can be controlled through a current-limiting resistor.

[0070] In the embodiment of the present utility model, refer to Figures 10 - 11 as shown Figure 10 is the reference circuit schematic diagram of the lamp control chip U2, Figure 11It is a schematic diagram of the reference circuit for the light-emitting diode component 60. Among them, pin 42 of the main control module 3 is connected to pin 4 of the lamp control chip U2, pin 43 of the main control module 3 is connected to pin 5 of the lamp control chip U2, pin 18 of the main control module 3 is connected to pin 29 of the lamp control chip U2, pins 9 and 33 of the lamp control chip U2 are connected to the GND terminal, pins 16, 19, 20, 21, 22, 23, and 24 of the lamp control chip U2 are left floating, pins 6 and 7 of the lamp control chip U2 are connected to pin 2 of the thirty-fourth resistor R34, pin 1 of the thirty-fourth resistor R34 is connected to the GND terminal, pin 28 of the lamp control chip U2 is connected to pin 1 of the twenty-first resistor R21, pin 2 of the twenty-first resistor R21 is connected to the 3.3V power supply terminal output by the power supply module 1, pin 1 of the lamp control chip U2 is connected to pin 2 of the twenty-eighth resistor R28, pin 2 of the lamp control chip U2 is connected to pin 2 of the twenty-ninth resistor R29, pin 3 of the lamp control chip U2 is connected to pin 2 of the thirty-second resistor R32, pin 10 of the lamp control chip U2 is connected to pin 2 of the thirty-third resistor R33, pin 11 of the lamp control chip U2 is connected to pin 2 of the thirty-first resistor R31, pin 12 of the lamp control chip U2 is connected to pin 2 of the thirtieth resistor R30, pin 13 of the lamp control chip U2 is connected to pin 2 of the twenty-seventh resistor R27, pin 14 of the lamp control chip U2 is connected to pin 2 of the twenty-fifth resistor R25, pin 15 of the lamp control chip U2 is connected to pin 2 of the twenty-fourth resistor R24, pin 17 of the lamp control chip U2 is connected to pin 2 of the twentieth resistor R20, pin 18 of the lamp control chip U2 is connected to pin 2 of the eighteenth resistor R18, pin 19 of the lamp control chip U2 is connected to pin 2 of the sixteenth resistor R16, pin 25 of the lamp control chip U2 is connected to pin 2 of the fifteenth resistor R15, pin 26 of the lamp control chip U2 is connected to pin 2 of the seventeenth resistor R17, pin 27 of the lamp control chip U2 is connected to pin 2 of the nineteenth resistor R19, pin 30 of the lamp control chip U2 is connected to pin 2 of the twenty-third resistor R23, pin 31 of the lamp control chip U2 is connected to pin 2 of the twenty-second resistor R22, pin 32 of the lamp control chip U2 is connected to pin 2 of the twenty-sixth resistor R26, pin 7 of the lamp control chip U2 is connected to pin 2 of the thirty-fourth resistor R34, pin 1 of the thirty-fourth resistor R34 is connected to the GND terminal, pins 9 and 33 of the lamp control chip U2 are connected to the GND terminal, pin 1 of the fifteenth resistor R15 is connected to pin 1 of the first indicator LED1, pin 1 of the seventeenth resistor R17 is connected to pin 2 of the first indicator LED1, pin 1 of the nineteenth resistor R19 is connected to pin 3 of the first indicator LED1, pin 1 of the sixteenth resistor R16 is connected to pin 1 of the second indicator LED2, pin 1 of the eighteenth resistor R18 is connected to pin 2 of the second indicator LED2, pin 1 of the twentieth resistor R20 is connected to pin 3 of the second indicator LED2, pin 1 of the twenty-third resistor R23 is connected to pin 1 of the third indicator LED3, pin 1 of the twenty-second resistor R22 is connected to pin 2 of the third indicator LED3,Pin 1 of the twenty-sixth resistor R26 is connected to pin 3 of the third indicator LED3. Pin 1 of the twenty-fourth resistor R24 is connected to pin 1 of the fourth indicator LED4. Pin 1 of the twenty-fifth resistor R25 is connected to pin 2 of the fourth indicator LED4. Pin 1 of the twenty-seventh resistor R27 is connected to pin 3 of the fourth indicator LED4. Pin 1 of the twenty-eighth resistor R28 is connected to pin 1 of the fifth indicator LED5. Pin 1 of the twenty-ninth resistor R29 is connected to pin 2 of the fifth indicator LED5. Pin 1 of the thirty-second resistor R32 is connected to pin 3 of the fifth indicator LED5. Pin 1 of the thirtieth resistor R30 is connected to pin 1 of the sixth indicator LED6. Pin 1 of the thirty-first resistor R31 is connected to pin 2 of the sixth indicator LED6. Pin 1 of the thirty-third resistor R33 is connected to pin 3 of the sixth indicator LED6. Pin 2 of the sixth bead FB6 is connected to the 3.3V power supply terminal output by the power supply module 1. Pin 1 of the sixth bead FB6 is connected to the power supply for lamp control A3V3. Pin 8 of the lamp control chip U2 is connected to the power supply for lamp control A3V3. Pins 4 of the first indicator LED1, the second indicator LED2, the third indicator LED3, the fourth indicator LED4, the fifth indicator LED5, and the sixth indicator LED6 are all connected to the power supply for lamp control A3V3.,

[0071] The lamp control chip U2 communicates with the main control module 3 through I2C. Each output supports PWM to adjust the light brightness to achieve different lighting effects to represent the state of the power-off device.

[0072] Combined with Figure 10 As shown, the lamp control chip U2 is powered by the power supply for lamp control A3V3. The 3.3V power supply terminal output by the power supply module 1 uses a sixth bead FB6 for isolation to obtain the power supply for lamp control A3V3 to prevent the unstable operation of the lamp control chip from affecting the power supply of the main control module 3.

[0073] In the embodiment of the present invention, when the device starts the power-off test, the screen of the touch screen module 4 displays the test channel, the set number of test cycles per path, the number of completed cycles, the power-off interval time, and the word "Test in progress". At this time, the lamp control chip controls the corresponding indicator light, for example, in a flashing green light state.

[0074] When the power-off test of the device ends, the screen of the touch screen module 4 displays the number of completed cycles and the word "Test ended". At this time, the corresponding indicator light, for example, is in a constantly lit yellow light state.

[0075] When the device test is paused, the screen of the touch screen module 4 displays the pause channel, the set number of test cycles per path, the number of completed cycles, the power-off interval time, and the word "Test paused". At this time, the lamp control chip controls the corresponding indicator light, for example, in a flashing orange light state.

[0076] When the device has short - circuit protection, the screen of the touch - screen module 4 displays the words "Power short - circuit", and at this time, the lamp - control chip controls the corresponding indicator light, for example, the red light is always on.

[0077] Compared with the prior art, the eMMC power - off test device described in the embodiments of the present utility model has the following advantages:

[0078] 1. The power - off control module 2 automatically performs power - off control for both 5V and 12V circuits respectively, avoiding manual power - off operations and improving the eMMC power - off test efficiency;

[0079] 2. It can simulate the power - off data saving situation of eMMC under different loads and different operating states;

[0080] 3. Through the touch - screen module 4, touch control can be performed to set corresponding parameters, such as power - off time interval, number of power - off cycles, etc., to achieve fast power - off, fixed - time - interval power - off, and random - time - interval power - off;

[0081] 4. The light - emitting diode component 60 and the buzzer component are provided, which can visually remind each state in the power - off test process;

[0082] 5. It is compatible with most eMMC control boards on the market. When in use, only the power - off device needs to be connected to the existing eMMC control board, with simple operation and high applicability.

[0083] On the basis of the above - mentioned embodiments, as an implementation of the device shown above, the present utility model provides an embodiment of the test method of the eMMC power - off test device. This method embodiment corresponds to Figure 1 the device embodiment shown above. Referring to Figure 1 shown, the test method of the eMMC power - off test device includes the following steps: Figure 12

[0084] S1. The user selects the power output port of the power - supply module 1 through the touch - screen module 4, and then determines the selected test parameters. The test parameters include power - off state, power - off time interval, number of power - off cycles, and load state;

[0085] S2. The touch - screen module 4 sends the test parameters selected by the user to the main - control module 3 through the SPI interface;

[0086] S3. The main - control module 3 judges the power output port selected by the user and the real - time state. If the selected channel requires the start - power - off - test state, step S4 is executed; if the selected channel requires the pause state, step S8 is executed;

[0087] ​S4. Set the power-off parameters of the power-off control module 2 through the main control module 3, and update the load status of the eMMC control board through the communication interface. The power-off parameters include the power-off time interval, the number of power-off test cycles, and the load status.

[0088] S5. Return a command indicating that the load status has been set through the communication interface of the eMMC control board.

[0089] S6. Update the lamp control status of each output of the lamp control module 6 in real time through the main control module 3.

[0090] S7. Control the power-off control module 2 to perform a power-off cycle through the main control module 3. When the test is over, execute step S10.

[0091] S8. Control the power-off control module 2 to stop the power-off cycle through the main control module 3. When the touch screen module 4 sends a test start command to the main control module 3 again, execute step S7.

[0092] S9. If a short-circuit protection is triggered during the test, the main control module 3 controls to stop the power-off test. When the touch screen module 4 sends a test start command to the main control module 3 again, execute step S7.

[0093] S10. When the power-off test is over, display the test result on the touch screen module.

[0094] The eMMC power-off test device described in the above embodiments can execute the test method of the eMMC power-off test device provided by the embodiments of the present invention. The test method of the eMMC power-off test device has the corresponding components and beneficial effects of the eMMC power-off test device described in the above embodiments. For details, please refer to the embodiments of the eMMC power-off test device above. The embodiments of the present invention will not be repeated here.

[0095] In the specification provided here, a large number of specific details are described. However, it can be understood that the embodiments of the present invention can be practiced without these specific details. In some instances, well-known methods, structures, and technologies are not shown in detail so as not to obscure the understanding of this specification.

[0096] Similarly, it should be understood that, for the purpose of streamlining the present disclosure and assisting in understanding one or more of the various utility model aspects, in the above description of the exemplary embodiments of the present utility model, the various features of the present utility model are sometimes grouped together into a single embodiment, figure, or description thereof. However, the disclosed method should not be construed as reflecting an intention that the claimed present utility model requires more features than those expressly recited in each claim. Rather, as reflected by the claims, the utility model aspects lie in less than all the features of the single embodiments disclosed previously. Thus, the claims following the detailed description hereby expressly incorporate the detailed description, where each claim itself serves as a separate embodiment of the present utility model.

[0097] It should be noted that the above embodiments illustrate the present utility model rather than limit the present utility model, and those skilled in the art can design alternative embodiments without departing from the scope of the appended claims.

Claims

1. An eMMC power-off test device, applied to the power-off test of an eMMC test board, characterized in that: The eMMC power-off test device includes: a main control module, a power-off control module, a touch screen module, a light control module, a power output interface module and a power supply module; the main control module is electrically connected to the touch screen module via an SPI bus, the main control module is electrically connected to the light control module via I2C, and the main control module is connected to the eMMC test board via USB or I2C; the power-off control module is respectively connected to the power supply module and the main control module, and the power-off control module is electrically connected to the eMMC test board via the power output interface module.

2. The eMMC power-off test device according to claim 1, characterized in that: The power-off control module includes a 5V power-off control circuit and a 12V power-off control circuit, and the structures of the 5V power-off control circuit and the 12V power-off control circuit are the same.

3. The eMMC power-off test device according to claim 2, characterized in that: The 5V power-off control circuit includes a first power input port, a second power port, a control signal input port, a first magnetic bead, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a first resistor, a second resistor, a third resistor, a fourth resistor, a P-channel field effect transistor and an NPN transistor; The first power input port is connected to pin 1 of the first magnetic bead, pin 2 of the first magnetic bead is connected to pin 2 of the first capacitor, pin 1 of the first capacitor is connected to the GND end, pin 2 of the first magnetic bead is connected to pin 2 of the second capacitor, pin 1 of the second capacitor is connected to the GND end, pin 2 of the first magnetic bead is connected to pin 1 of the first resistor, pin 2 of the first magnetic bead is connected to pin 3 of the P-channel field effect transistor, pin 2 of the first resistor is connected to pin 1 of the P-channel field effect transistor, pin 2 of the P-channel field effect transistor is connected to pin 2 of the third capacitor, pin 1 of the third capacitor is connected to the GND end, and the P-channel Pin 2 of the field effect transistor is connected to pin 2 of the fourth capacitor, pin 1 of the fourth capacitor is connected to the GND end, pin 2 of the P-channel field effect transistor is connected to the second power supply port, pin 2 of the P-channel field effect transistor is connected to pin 2 of the fourth resistor, pin 1 of the P-channel field effect transistor is connected to pin 3 of the NPN transistor, pin 2 of the NPN transistor is connected to the GND end, pin 1 of the NPN transistor is connected to pin 2 of the third resistor, pin 1 of the third resistor is connected to the GND end, pin 2 of the third resistor is connected to pin 1 of the second resistor, and pin 2 of the second resistor is connected to the control signal input port.

4. The eMMC power-off test device according to claim 1, characterized in that: Pin 1, Pin 5, Pin 6, and Pin 17 of the touch screen module interface are connected to the GND end respectively, Pin 3, Pin 9, Pin 10, Pin 11, Pin 12, Pin 13, Pin 14, Pin 15, and Pin 18 of the touch screen module interface are suspended, Pin 2 of the touch screen module interface is connected to the 3.3V power supply end output by the power supply module, Pin 4 of the touch screen module interface is connected to Pin 29 of the main control module, Pin 7 of the touch screen module interface is connected to Pin 15 of the main control module, Pin 8 of the touch screen module interface is connected to Pin 17 of the main control module, Pin 16 of the touch screen module interface is connected to Pin 38 of the main control module, and Pin 10 of the touch screen module interface is connected to Pin 11 of the main control module. Pin 19 is connected to pin 39 of the main control module, pin 20 of the touch screen module interface is connected to pin 40 of the main control module, pin 21 of the touch screen module interface is connected to pin 21 of the main control module, pin 22 of the touch screen module interface is connected to pin 22 of the main control module, pin 23 of the touch screen module interface is connected to pin 32 of the main control module, pin 24 of the touch screen module interface is connected to pin 33 of the main control module, pin 7 of the touch screen module interface is connected to pin 2 of the tenth resistor, pin 8 of the touch screen module interface is connected to pin 2 of the eleventh resistor, and pin 1 of the tenth resistor and pin 1 of the eleventh resistor are both connected to the power supply module.

5. The eMMC power-off test device according to claim 1, characterized in that: The power supply module includes a power input module and a step-down chip module. The step-down chip module includes a 3.3V step-down module and a 5V step-down module. The 3.3V step-down module and the 5V step-down module are respectively connected to the power input module.

6. The eMMC power-off test device according to claim 5, characterized in that: The power input module includes a power input interface, a boat switch, a fuse, an anti-reverse connection diode, an electrostatic and surge protection tube, a power indicator light and a forty-second resistor; Pins 2 and 3 of the power input interface are both connected to the GND end, pin 4 of the power input interface is connected to pin 1 of the third magnetic bead, pin 2 of the third magnetic bead is connected to pin 1 of the boat switch, pin 2 of the boat switch is connected to pin 1 of the fuse, pin 2 of the fuse is connected to pin 1 of the anti-reverse diode, pin 2 of the anti-reverse diode is connected to the GND end, pin 2 of the fuse is connected to pin 2 of the static and surge protection tube, pin 1 of the static and surge protection tube is connected to the GND end, pin 2 of the fuse is connected to pin 2 of the power indicator light, pin 1 of the power indicator light is connected to pin 1 of the forty-second resistor, pin 2 of the forty-second resistor is connected to the GND end, and pin 2 of the fuse is connected to the 12V power supply end.

7. The eMMC power-off test device according to claim 6, characterized in that: The 3.3V step-down module includes a second step-down chip, a third magnetic bead, a thirty-fifth resistor, a thirty-eighth resistor, a forty-first resistor, a second power inductor, an eighteenth capacitor, a power indicator light, a thirty-ninth resistor, a twentieth capacitor, a twenty-first capacitor, a twenty-second capacitor and a twenty-third capacitor; The 12V power supply end of the power input module is connected to pin 1 of the third magnetic bead, pin 2 of the third magnetic bead is connected to pin 1 of the twentieth capacitor, pin 2 of the twentieth capacitor is connected to the GND end, pin 2 of the third magnetic bead is connected to pin 1 of the thirty-fifth resistor, pin 2 of the thirty-fifth resistor is connected to pin 4 of the second buck chip, pin 1 of the thirty-fifth resistor is connected to pin 5 of the second buck chip, pin 2 of the second buck chip is connected to the GND end, pin 6 of the second buck chip is connected to pin 1 of the second power inductor, pin 1 of the second power inductor is connected to pin 1 of the eighteenth capacitor, pin 2 of the eighteenth capacitor is connected to pin 1 of the second buck chip, pin 2 of the second power inductor is connected to pin 1 of the thirty-eighth resistor, and pin 2 of the thirty-eighth resistor is connected to pin 1 of the second buck chip. Pin 3 of the thirty-eighth resistor is connected, pin 2 of the thirty-first resistor is connected to pin 1 of the forty-first resistor, pin 2 of the forty-first resistor is connected to the GND terminal, pin 1 of the forty-first resistor is connected to pin 2 of the twenty-first capacitor, pin 1 of the twenty-first capacitor is connected to pin 2 of the second power inductor, pin 1 of the twenty-first capacitor is connected to pin 1 of the twenty-second capacitor, pin 1 of the twenty-first capacitor is connected to pin 1 of the twenty-third capacitor, pin 2 of the twenty-second capacitor is connected to the GND terminal, pin 2 of the twenty-third capacitor is connected to the GND terminal, pin 1 of the twenty-third capacitor is connected to pin 1 of the thirty-ninth resistor, pin 2 of the thirty-ninth resistor is connected to pin 2 of the power supply indicator light, pin 1 of the power supply indicator light is connected to the GND terminal, and pin 1 of the twenty-third capacitor is connected to the 3.3V power supply terminal.

8. The eMMC power-off test device according to claim 7, characterized in that: The 5V step-down module includes a first step-down chip, a second magnetic bead, a thirty-sixth resistor, a thirty-seventh resistor, a fortieth resistor, a first power inductor, a fourteenth capacitor, a fifteenth capacitor, a sixteenth capacitor, a seventeenth capacitor and a nineteenth capacitor; The 12V power supply end output by the power input module is connected to pin 1 of the second magnetic bead, pin 2 of the second magnetic bead is connected to pin 1 of the fifteenth capacitor, pin 2 of the fifteenth capacitor is connected to the GND end, pin 2 of the second magnetic bead is connected to pin 1 of the thirty-sixth resistor, pin 2 of the thirty-sixth resistor is connected to pin 4 of the first buck chip, pin 1 of the thirty-fifth resistor is connected to pin 5 of the first buck chip, pin 2 of the first buck chip is connected to the GND end, pin 6 of the first buck chip is connected to pin 1 of the first power inductor, pin 1 of the first power inductor is connected to pin 1 of the fourteenth capacitor, pin 2 of the fourteenth capacitor is connected to pin 1 of the first buck chip, and pin 1 of the first buck chip is connected to pin 2 of the first buck chip. Pin 2 of a power inductor is connected to pin 1 of the thirty-seventh resistor, pin 2 of the thirty-seventh resistor is connected to pin 3 of the first step-down chip, pin 2 of the thirty-seventh resistor is connected to pin 1 of the fortieth resistor, pin 2 of the fortieth resistor is connected to the GND terminal, pin 1 of the fortieth resistor is connected to pin 2 of the sixteenth capacitor, pin 1 of the sixteenth capacitor is connected to pin 2 of the first power inductor, pin 1 of the sixteenth capacitor is connected to pin 1 of the seventeenth capacitor, pin 1 of the sixteenth capacitor is connected to pin 1 of the nineteenth capacitor, pin 2 of the seventeenth capacitor is connected to the GND terminal, pin 2 of the nineteenth capacitor is connected to the GND terminal, and pin 1 of the nineteenth capacitor is connected to the 5V power supply terminal.

9. The eMMC power-off test device according to claim 8, characterized in that: The light control module includes a light control chip and a light emitting diode assembly connected to each other, and the light emitting diode assembly includes a first indicator light, a second indicator light, a third indicator light, a fourth indicator light, a fifth indicator light and a sixth indicator light; Pin 42 of the main control module is connected to pin 4 of the light control chip, pin 43 of the main control module is connected to pin 5 of the light control chip, pin 18 of the main control module is connected to pin 29 of the light control chip, pins 9 and 33 of the light control chip are connected to the GND end, pins 16, 19, 20, 21, 22, 23, and 24 of the light control chip are left floating, pins 6 and 7 of the light control chip are connected to pin 2 of the thirty-fourth resistor, pin 1 of the thirty-fourth resistor is connected to the GND end, pin 28 of the light control chip is connected to pin 1 of the twenty-first resistor, pin 2 of the twenty-first resistor is connected to the power supply module, pin 1 of the light control chip is connected to pin 2 of the twenty-eighth resistor, pin 2 of the light control chip is connected to pin 2 of the twenty-ninth resistor, pin 3 of the light control chip is connected to pin 2 of the thirty-second resistor, pin 10 of the light control chip is connected to pin 2 of the thirty-third resistor, pin 11 of the light control chip is connected to pin 2 of the thirty-first resistor, and pin 12 of the light control chip is connected to pin 2 of the 30th resistor. 2 pin of the light control chip is connected to 2 pin of the 27th resistor, 14 pin of the light control chip is connected to 2 pin of the 25th resistor, 15 pin of the light control chip is connected to 2 pin of the 24th resistor, 17 pin of the light control chip is connected to 2 pin of the 20th resistor, 18 pin of the light control chip is connected to 2 pin of the 18th resistor, 19 pin of the light control chip is connected to 2 pin of the 16th resistor, 25 pin of the light control chip is connected to 2 pin of the 15th resistor, 26 pin of the light control chip is connected to 2 pin of the 17th resistor, 27 pin of the light control chip is connected to 2 pin of the 19th resistor, 30 pin of the light control chip is connected to 2 pin of the 23rd resistor, 31 pin of the light control chip is connected to 2 pin of the 22nd resistor, 32 pin of the light control chip is connected to 2 pin of the 26th resistor, pin 7 of the light control chip is connected to 2 pin of the 34th resistor, pin 1 of the 34th resistor is connected to the GND end, and pins 9 and 33 of the light control chip are connected to the GND terminal; Pin 1 of the fifteenth resistor is connected to pin 1 of the first indicator light, pin 1 of the seventeenth resistor is connected to pin 2 of the first indicator light, pin 1 of the nineteenth resistor is connected to pin 3 of the first indicator light, pin 1 of the sixteenth resistor is connected to pin 1 of the second indicator light, pin 1 of the eighteenth resistor is connected to pin 2 of the second indicator light, pin 1 of the twentieth resistor is connected to pin 3 of the second indicator light, pin 1 of the twenty-third resistor is connected to pin 1 of the third indicator light, pin 1 of the twenty-second resistor is connected to pin 2 of the third indicator light, pin 1 of the twenty-sixth resistor is connected to pin 3 of the third indicator light, and pin 1 of the second Pin 1 of the fourteenth resistor is connected to pin 1 of the fourth indicator light, pin 1 of the twenty-fifth resistor is connected to pin 2 of the fourth indicator light, pin 1 of the twenty-seventh resistor is connected to pin 3 of the fourth indicator light, pin 1 of the twenty-eighth resistor is connected to pin 1 of the fifth indicator light, pin 1 of the twenty-ninth resistor is connected to pin 2 of the fifth indicator light, pin 1 of the thirty-second resistor is connected to pin 3 of the fifth indicator light, pin 1 of the thirtieth resistor is connected to pin 1 of the sixth indicator light, pin 1 of the thirty-first resistor is connected to pin 2 of the sixth indicator light, and pin 1 of the thirty-third resistor is connected to pin 3 of the sixth indicator light.

Images