Clamping circuit, current feedback circuit and vehicle

Abstract

The utility model relates to a clamping circuit, a current feedback circuit and a vehicle, the clamping circuit comprises a first voltage stabilizing circuit, the first voltage stabilizing circuit comprises a first connecting end and a second connecting end, the first connecting end is used for connecting a first power supply end of an operational amplifier in a linear voltage stabilizing circuit, and the second connecting end is used for connecting a second power supply end of an operational amplifier in the linear voltage stabilizing circuit; the second connecting end is used for connecting the in-phase input end of the operational amplifier; the first voltage stabilizing circuit is used for stabilizing a first voltage difference between the first power supply end and the in-phase input end at a first preset difference value. According to the technical scheme, due to the arrangement of the first voltage stabilizing circuit, the first voltage difference between the first power supply end and the in-phase input end of the operational amplifier is stabilized to the first preset difference value, so that the voltage of the in-phase input end is always within the power supply voltage range of the operational amplifier; and possible inaccuracy or distortion of output of the operational amplifier caused by a large voltage change range of the in-phase input end is avoided.

Description

Technical Field

[0001] The present application relates to the technical field of electronic circuits, and in particular, to a clamping circuit, a current feedback circuit, and a vehicle. Background Art

[0002] A Low Dropout Regulator (LDO) is a commonly used linear voltage regulator device, which mainly includes an operational amplifier, an adjustment transistor (MOS transistor or bipolar transistor), a feedback loop, etc. Among them, the operational amplifier compares the voltages at two input terminals, outputs a feedback signal, and can clamp the voltages at the two input terminals through the adjustment transistor and the feedback loop. It can be used to adjust the input voltages at the two input terminals to be the same.

[0003] However, due to the limited input voltage range of the operational amplifier, when the voltage change range at the input terminal of the operational amplifier is large, it may exceed the working range of the operational amplifier, resulting in distortion of the output feedback signal and inability to effectively adjust the voltage at the input terminal. Summary of the Utility Model

[0004] An embodiment of the present application provides a clamping circuit, which enables the voltage at the non-inverting input terminal of the operational amplifier to always be within the power supply voltage range of the operational amplifier, so as to at least partially solve the above technical problems.

[0005] To achieve the above object, according to the first aspect of the present application, a clamping circuit is provided, including:

[0006] A first voltage stabilizing circuit, the first voltage stabilizing circuit includes a first connection terminal and a second connection terminal, the first connection terminal is used to connect the first power supply terminal of the operational amplifier in the linear voltage stabilizing circuit, and the second connection terminal is used to connect the non-inverting input terminal of the operational amplifier;

[0007] The first voltage stabilizing circuit is used to stabilize the first voltage difference between the first power supply terminal and the non-inverting input terminal at a first predetermined difference.

[0008] Optionally, the first voltage stabilizing circuit includes:

[0009] A first voltage stabilizing diode, the cathode of the first voltage stabilizing diode is used as the first connection terminal to connect to the first power supply terminal, and the anode of the first voltage stabilizing diode is used as the second connection terminal to connect to the non-inverting input terminal.

[0010] Optionally, the clamping circuit further includes:

[0011] A second voltage stabilizing circuit, the second voltage stabilizing circuit includes a third connection terminal and a fourth connection terminal, the third connection terminal is used to connect to the first power supply terminal, and the fourth connection terminal is used to connect to the second power supply terminal of the operational amplifier;

[0012] The second voltage stabilizing circuit is configured to stabilize the second voltage difference between the first power supply terminal and the second power supply terminal at a second predetermined difference.

[0013] Optionally, the second voltage stabilizing circuit further includes:

[0014] A second voltage stabilizing diode, the cathode of the second voltage stabilizing diode is connected to the first power supply terminal as the third connection terminal, and the anode of the second voltage stabilizing diode is connected to the second power supply terminal as the fourth connection terminal.

[0015] Optionally, the clamping circuit further includes:

[0016] A first power supply circuit, the first power supply circuit includes a first resistor and a first switching transistor, the gate of the first switching transistor inputs an enabling signal, the enabling signal is used to control the conduction or cutoff of the first switching transistor, the source of the first switching transistor is connected to an input power supply terminal, the drain of the first switching transistor is connected to one end of the first resistor, and the other end of the first resistor is connected to the first power supply terminal.

[0017] Optionally, the clamping circuit further includes:

[0018] A second power supply circuit, the second power supply circuit includes a second switching transistor and a third voltage stabilizing diode;

[0019] The source of the second switching transistor is respectively connected to the second power supply terminal and the anode of the third voltage stabilizing diode, the drain of the second switching transistor is grounded, and the gate of the second switching transistor is connected to the anode of the third voltage stabilizing diode; the cathode of the third voltage stabilizing diode is connected to the first power supply terminal.

[0020] Optionally, the second power supply circuit further includes:

[0021] A second resistor, one end of the second resistor is connected to the anode of the third voltage stabilizing diode, and the other end of the second resistor is grounded.

[0022] Optionally, the second power supply circuit further includes:

[0023] An NPN transistor, the collector of the NPN transistor is connected to the anode of the third voltage stabilizing diode, the emitter of the NPN transistor is respectively connected to the gate of the second switching transistor and one end of the second resistor, and the base of the NPN transistor is connected to the collector.

[0024] Optionally, the clamping circuit further includes:

[0025] A first capacitor, one end of the first capacitor is connected to the cathode of the second zener diode, and the other end of the first capacitor is respectively connected to the anode of the second zener diode and the source of the second switching transistor.

[0026] Optionally, the clamping circuit further includes:

[0027] A second capacitor, one end of the second capacitor is connected to the cathode of the third zener diode, and the other end of the second capacitor is connected to the gate of the second switching transistor.

[0028] According to a second aspect of the present application, a current feedback circuit is provided, including:

[0029] A current mirror circuit, a linear voltage regulator circuit, and the clamping circuit as described above;

[0030] The current mirror circuit includes an output current terminal and a mirror current terminal. The current mirror circuit is configured to mirror the output current detected at the output current terminal and output a mirror current at the mirror current terminal;

[0031] The linear voltage regulator circuit includes an operational amplifier and an adjustment switch. The non-inverting input terminal of the operational amplifier is connected to the output current terminal. The common terminal of the inverting input terminal of the operational amplifier and the source of the adjustment switch is connected to the mirror current terminal. The output terminal of the operational amplifier is connected to the gate of the adjustment switch. The drain of the adjustment switch is grounded. The linear voltage regulator circuit is configured to adjust the voltages of the output current terminal and the mirror current terminal.

[0032] Optionally, the current mirror circuit includes a load switch and a detection switch;

[0033] The drain of the load switch and the drain of the detection switch are both connected to the drive power supply terminal. The gate of the load switch and the gate of the detection switch are connected. The gate of the load switch inputs a drive signal. The source of the load switch serves as the output current terminal and is connected to the non-inverting input terminal of the operational amplifier. The source of the detection switch serves as the mirror current terminal and is respectively connected to the inverting input terminal and the source of the adjustment switch.

[0034] Optionally, the current feedback circuit further includes:

[0035] A third resistor, one end of the third resistor is connected to the drain of the adjustment switch, and the other end of the third resistor is grounded.

[0036] Optionally, the current feedback circuit further includes:

[0037] A fourth resistor, one end of the fourth resistor is connected to the source of the load switch, and the other end of the fourth resistor is grounded.

[0038] According to a third aspect of the present application, there is also provided a vehicle, including the current feedback circuit as described above.

[0039] In the clamping circuit of the embodiment of the present application, through the above technical solution, due to the setting of the first voltage stabilizing circuit, the first voltage difference between the first power supply terminal and the non-inverting input terminal of the operational amplifier is stabilized to a first predetermined difference value, so that the voltage of the non-inverting input terminal is always within the power supply voltage range of the operational amplifier, avoiding the output of the operational amplifier being inaccurate or distorted due to the large voltage change range of the non-inverting input terminal.

[0040] Other features and advantages of the present application will be described in detail in the subsequent specific implementation section. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following drawings are only some embodiments of the present application. For those skilled in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0042] In order to more completely understand the present application and its beneficial effects, the following will be described in conjunction with the drawings, where the same reference numerals in the following description represent the same parts.

[0043] Figure 1 is a schematic block diagram of a current feedback circuit provided in an exemplary embodiment of the present application;

[0044] Figure 2 is a specific circuit structure diagram of a current feedback circuit provided in an exemplary embodiment of the present application;

[0045] Figure 3 is a schematic block diagram of a clamping circuit and an operational amplifier provided in an exemplary embodiment of the present application;

[0046] Figure 4 is a circuit structure diagram of another current feedback circuit provided in an exemplary embodiment of the present application;

[0047] Figure 5 is a circuit structure diagram of the first clamping circuit provided in an exemplary embodiment of the present application;

[0048] Figure 6 is a circuit structure diagram of the second clamping circuit provided in an exemplary embodiment of the present application;

[0049] Figure 7 is a working state diagram of the clamping circuit provided in an exemplary embodiment of the present application;

[0050] Figure 8 It is the first state diagram of the current feedback circuit provided in the exemplary embodiment of the present application;

[0051] Figure 9 It is the second state diagram of the current feedback circuit provided in the exemplary embodiment of the present application;

[0052] Figure 10 It is a schematic structural diagram of a vehicle provided in the exemplary embodiment of the present application.

[0053] Description of reference numerals:

[0054] 1. Vehicle;

[0055] 10. Current feedback circuit;

[0056] 100. Clamping circuit;

[0057] 110. First power supply circuit; M11. First switching transistor; R1. First resistor;

[0058] 120. First voltage stabilizing circuit; D1. First voltage stabilizing diode;

[0059] 130. Second voltage stabilizing circuit; D2. Second voltage stabilizing diode;

[0060] 140. Second power supply circuit; M12. Second switching transistor; D3. Third voltage stabilizing diode; R2. Second resistor;

[0061] P1. NPN transistor; D4. Diode;

[0062] C1. First capacitor; C2. Second capacitor; EN. Enable signal;

[0063] 210. Linear voltage stabilizing circuit; A1. Operational amplifier; M23. Adjusting switch; Vgate. Driving signal;

[0064] 220. Current mirror circuit; M21. Load switch; M22. Detection switch;

[0065] Rse. Third resistor;

[0066] RL. Fourth resistor;

[0067] G1. Output current terminal; G2. Mirror current terminal. Detailed implementation manners

[0068] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative efforts belong to the protection scope of the present application.

[0069] Referring to Figure 1 as shown, Figure 1 is a circuit diagram of a current feedback circuit 10 provided by the present application. Figure 1 The current feedback circuit 10 shown includes: a current mirror circuit 220 and a linear voltage regulator circuit 210.

[0070] The current mirror circuit 220 includes an output current terminal G1 and a mirror current terminal G2. The current mirror circuit 220 is used to mirror the output current detected at the output current terminal G1 and output a mirror current at the mirror current terminal G2;

[0071] The linear voltage regulator circuit 210 includes an operational amplifier A1 and an adjustment switch M23. The non-inverting input terminal of the operational amplifier A1 is connected to the output current terminal G1. The common terminal of the inverting input terminal of the operational amplifier A1 and the source of the adjustment switch M23 is connected to the mirror current terminal G2. The output terminal of the operational amplifier A1 is connected to the gate of the adjustment switch M23. The drain of the adjustment switch M23 is grounded. The linear voltage regulator circuit 210 is used to adjust the voltages of the output current terminal G1 and the mirror current terminal G2.

[0072] The adjustment switch M23 includes a MOS transistor. Exemplarily, the adjustment switch M23 can be a PMOS transistor.

[0073] Referring to Figure 2 as shown, the current mirror circuit 220 includes a load switch M21 and a detection switch M22.

[0074] The drain of the load switch M21 is connected to a driving power supply terminal VCC, and the source of the load switch M21 serves as the output current terminal G1. The drain of the detection switch M22 is connected to the driving power supply terminal VCC, and the source of the detection switch M22 serves as the mirror current terminal G2. The gate of the load switch M21 is connected to the gate of the detection switch M22, and the same driving signal Vgate is input, so that the load switch M21 and the detection switch M22 are synchronously turned on or off.

[0075] The load switch M21 and the detection switch M22 each include a MOS transistor. Exemplarily, the load switch M21 and the detection switch M22 can be NMOS transistors.

[0076] The on-resistance of the load switch M21 and the on-resistance of the detection switch M22 are set proportionally. For example, if the on-resistance of the detection switch M22 is K times that of the load switch M21, the value of K is greater than or equal to 0. Exemplarily, both the load switch M21 and the detection switch M22 are high-voltage NLDMOS devices, and the load switch M21 and the detection switch M22 have the same size, and the number ratio is 1:K.

[0077] The current feedback circuit further includes: a third resistor Rse and a fourth resistor RL.

[0078] One end of the third resistor Rse is connected to the drain of the adjustment switch M23, and the other end of the third resistor Rse is grounded. One end of the fourth resistor RL is connected to the source of the load switch M21, and the other end of the fourth resistor RL is grounded.

[0079] The load switch M21 and the fourth resistor RL (equivalent to at least one external load) connected thereto form a load current path, and the detection switch M22 and the third resistor Rse form a mirror current path. Denote the output current of the load switch M21 as Iout, and the mirror current of the detection switch M22 as Ise.

[0080] The operational amplifier A1 compares the voltage V1 at the output current terminal G1 and the voltage V2 at the mirror current terminal G2, and adjusts the gate voltage of the adjustment switch M23 with the voltage V3 at the output terminal of the operational amplifier A1, thereby adjusting the voltage and / or current at the output current terminal G1 and the mirror current terminal G2 to a preset ratio. It can be understood that this preset ratio can be 1:1 or 1:K, which can be selected according to the actual circuit requirements and is not specifically limited.

[0081] In some embodiments, the voltages at the output current terminal G1 and the mirror current terminal G2 can be adjusted to be equal, that is, the voltage drop of the detection switch M22 is the same as the voltage drop of the load switch M21. Through the mirror effect of the current mirror, current replication with a ratio of 1 / K is performed, so that the ratio of the mirror current Ise of the detection switch M22 to the output current Iout of the load switch M21 is 1:K. The mirror current Ise passes through the third resistor Rse and is converted into a feedback voltage VFB.

[0082] It can be understood that to meet different circuit design requirements, such as signal amplification, signal processing, etc., multiple operational amplifiers or adjustment switches can be set, which is not limited herein.

[0083] The above linear voltage regulator circuit 210 utilizes the negative feedback characteristic of the operational amplifier A1 to clamp the voltages of the output current terminal G1 (i.e., the non-inverting input terminal) and the mirror current terminal G2 (i.e., the inverting input terminal), making the voltages at both ends consistent and improving the current feedback accuracy. However, due to the limited input voltage range of the operational amplifier A1, which is generally applied to low-voltage scenarios, the above current feedback circuit 10 cannot be applied to the replication of the output current terminal G1 with a large variation range under high voltage conditions. That is, when the variation range of the output current terminal G1 is large, it may exceed the working range of the operational amplifier A1, resulting in distortion of the feedback signal output by the operational amplifier A1, being unable to effectively adjust the voltages of the non-inverting input terminal and the inverting input terminal of the operational amplifier A1, with low current replication accuracy. Moreover, it may even damage the circuit due to the excessive voltage difference between the two input terminals of the operational amplifier A1 caused by the too-fast variation range of the output current terminal G1.

[0084] Based on this, according to the first aspect of the present application, referring to Figure 3 as shown, the present application provides a clamping circuit 100, including: a first voltage regulator circuit 120.

[0085] The first voltage regulator circuit 120 includes a first connection end a and a second connection end b. The first connection end a is used to connect to the first power supply terminal of the operational amplifier A1 in the linear voltage regulator circuit 210, and the second connection end b is used to connect to the non-inverting input terminal of the operational amplifier A1. The first voltage regulator circuit 120 is used to stabilize the first voltage difference between the first power supply terminal and the non-inverting input terminal at a first predetermined difference. It can be understood that the first predetermined difference can be a certain difference or a certain ratio, which can be specifically selected according to requirements.

[0086] Due to the setting of the first voltage regulator circuit 120, the voltage of the first power supply terminal of the operational amplifier A1 and the voltage of the non-inverting input terminal are always stabilized at the first predetermined difference, making the voltage of the non-inverting input terminal always within the power supply voltage range of the operational amplifier, and avoiding the output of the operational amplifier A1 from being inaccurate or distorted due to the large variation range of the voltage of the non-inverting input terminal.

[0087] In some embodiments, referring to Figure 4 as shown, the first voltage regulator circuit 120 includes: a first zener diode D1.

[0088] The cathode of the first zener diode D1 is used as the first connection end a and is connected to the first power supply terminal of the operational amplifier A1. It can be understood that the first connection end a provides the power supply voltage for the first power supply terminal of the operational amplifier A1. The anode of the first zener diode D1 is used as the second connection end b and is connected to the non-inverting input terminal of the operational amplifier A1.

[0089] In an embodiment of the present application, when the first voltage stabilizing diode D1 is in the reverse breakdown state, a stable first predetermined difference ΔV is generated between the cathode and the anode of the first voltage stabilizing diode D1 1 , that is, the voltage difference between the voltage Va at the first power supply terminal of the operational amplifier A1 and the voltage V1 at the non-inverting input terminal of the operational amplifier A1 is the first predetermined difference ΔV 1 .

[0090] In an embodiment of the present application, referring to Figures 3 to 5 as shown, the anode b of the first voltage stabilizing diode D1 is connected to the output current terminal G1 and the non-inverting input terminal of the operational amplifier A1. The power change of the external load RL will cause the voltage V1 at the output current terminal G1 (that is, the anode of the first voltage stabilizing diode D1) to change. However, regardless of whether the voltage V1 at the output current terminal G1 increases or decreases, due to the presence of the first voltage stabilizing diode D1 in reverse breakdown, the voltage Va at the first power supply terminal of the operational amplifier A1 will also increase or decrease by the same change value; that is, the voltage Va at the first power supply terminal of the operational amplifier A1 is floating and will change with the change of the voltage V1 at the output current terminal G1, and always maintains the first predetermined difference ΔV with the voltage V1 at the output current terminal G1 1 .

[0091] By setting the first voltage stabilizing diode D1, the current replication accuracy can be improved when the voltage change range at the output current terminal G1 is large, and at the same time, it can effectively prevent the voltage at the output current terminal G1 from changing too fast, resulting in too large a voltage difference between the two input terminals of the operational amplifier, and avoid damaging the internal components of the operational amplifier.

[0092] Exemplarily, the first power supply terminal of the operational amplifier A1 can be a positive power supply terminal, that is, the cathode of the first voltage stabilizing diode D1 is used as the floating power supply of the operational amplifier A1.

[0093] In some embodiments, referring to Figure 4 and Figure 5 , the clamping circuit 100 further includes: a second voltage stabilizing circuit 130.

[0094] The second voltage stabilizing circuit 130 includes a third connection terminal c and a fourth connection terminal d. The third connection terminal c is used to connect the first power supply terminal of the operational amplifier A1, and the fourth connection terminal d is used to connect the second power supply terminal of the operational amplifier A1. The second voltage stabilizing circuit 130 is used to stabilize the second voltage difference between the first power supply terminal and the second power supply terminal of the operational amplifier A1 at a second predetermined difference.

[0095] It can be understood that the second predetermined difference can be a certain difference or a certain ratio, and can be specifically selected according to requirements.

[0096] Due to the setting of the second voltage stabilizing circuit 130, the voltages of the first power supply terminal and the second power supply terminal of the operational amplifier A1 are always stabilized to a second predetermined difference, avoiding the change in the voltage difference between the two power supply terminals caused by the change in the voltage of the first power supply terminal of the operational amplifier.

[0097] In some embodiments, referring to Figure 4 and Figure 5 , the second voltage stabilizing circuit 130 further includes: a second voltage stabilizing diode D2.

[0098] The cathode of the second voltage stabilizing diode D2 is connected to the first power supply terminal of the operational amplifier A1 as the third connection terminal c, and the anode of the second voltage stabilizing diode D2 is connected to the second power supply terminal of the operational amplifier A1 as the fourth connection terminal d.

[0099] Exemplarily, the second power supply terminal of the operational amplifier A1 can be a negative power supply terminal, that is, the anode of the second voltage stabilizing diode D2 is used as the floating ground of the operational amplifier A1.

[0100] In an embodiment of the present application, when the second voltage stabilizing diode D2 is in the reverse breakdown state, a stable second predetermined difference ΔV 2 is generated between the cathode and the anode of the second voltage stabilizing diode D2, that is, the voltage difference between the voltage Va of the first power supply terminal of the operational amplifier A1 and the voltage Vb of the second power supply terminal of the operational amplifier A1 is the first predetermined difference ΔV 2 .

[0101] Due to the existence of the reversely broken-down second voltage stabilizing diode D2, the voltage Vb of the second power supply terminal of the operational amplifier A1 increases or decreases with the same change value as the voltage Va of the first power supply terminal of the operational amplifier A1; that is, the voltage Vb of the second power supply terminal of the operational amplifier A1 is floating and always maintains a first predetermined difference ΔV with the voltage Va of the first power supply terminal of the operational amplifier A1 2 .

[0102] By setting the second voltage stabilizing diode D2, a floating ground potential is provided for the operational amplifier A1. At the same time, by limiting the magnitudes of the first voltage difference and the second voltage difference, the voltage of the non-inverting input terminal of the operational amplifier A1 is always within the power supply voltage range of the operational amplifier A1, avoiding inaccurate or distorted output of the operational amplifier A1.

[0103] In some embodiments, referring to Figure 5 shown, the clamping circuit 100 further includes: a first capacitor C1.

[0104] One end of the first capacitor C1 is connected to the cathode of the second zener diode D2, and the other end of the first capacitor C1 is respectively connected to the anode of the second zener diode D2 and the source of the second switching transistor M12. Due to the provision of the first capacitor C1, a good voltage stabilizing effect is provided.

[0105] In some embodiments, referring to Figure 5 as shown, the clamping circuit further includes: a first power supply circuit 110. The first power supply circuit 110 includes: a first resistor R1 and a first switching transistor M11.

[0106] The gate of the first switching transistor M11 inputs an enable signal, and the enable signal EN is generated by a control chip. The enable signal is used to control the conduction or cut-off of the first switching transistor M11. The source of the first switching transistor M11 is connected to the input power supply terminal, and the input power supply terminal can be the same high-voltage power supply as the driving power supply terminal. For the convenience of understanding, it is represented by VCC in the drawings. The drain of the first switching transistor M11 is connected to one end of the first resistor R1, and the other end of the first resistor R1 serves as the first power supply terminal. The function of the first resistor R1 is current limiting.

[0107] It can be understood that when there is a voltage output at the first power supply terminal, the first zener diode D1 and the second zener diode D2 are always in the reverse breakdown state. At the same time, the first power supply terminal can also be regarded as being connected to the fourth resistor RL through the first zener diode D1, so that the change in the voltage of the current output terminal G1 can cause the change in the voltage of the first power supply terminal.

[0108] Exemplarily, the first switching transistor M11 can be a PMOS transistor.

[0109] Due to the provision of the first switching transistor M11, by controlling the output of the enable signal EN, the first zener diode D1 is directionally broken down only after the current mirror circuit 220 or the linear voltage regulator circuit 210 works normally, and the first switching transistor M11 can be controlled to be disconnected in the case of undervoltage protection.

[0110] In some embodiments, referring to Figure 5 as shown, the clamping circuit 100 further includes: a second power supply circuit 140. The second power supply circuit 140 includes: a second switching transistor M12, a third zener diode D3 and a second resistor R2.

[0111] The source of the second switching transistor M12 is respectively connected to the second power supply terminal and the anode of the second zener diode D2. The drain of the second switching transistor M12 is grounded. A control signal is input to the gate of the second switching transistor M12, and the control signal is used to control the conduction or cut-off of the second switching transistor M12. The cathode of the third zener diode D3 is connected to the first power supply terminal, and the anode of the third zener diode D3 is connected to the gate of the second switching transistor M12 to output the control signal to the gate of the second switching transistor M12. One end of the second resistor R2 is connected to the anode of the third zener diode D3, and the other end of the second resistor R2 is grounded. The second resistor R2 functions as a current limiter and provides a bias for the second switching transistor M12.

[0112] It can be understood that when the first power supply terminal outputs a voltage, the third zener diode D3 is always in the reverse breakdown state.

[0113] Exemplarily, the second switching transistor M12 can be a PMOS transistor.

[0114] In the present application, through the setting of the second switching transistor M12, a current path is formed with the second zener diode D2. When the third zener diode D3 is reverse broken down, a third predetermined difference ΔV is generated between its two ends 3 , and then the voltage difference between the first power supply terminal and the gate of the second switching transistor M12 is clamped at the third predetermined difference ΔV 3 , where the third predetermined difference ΔV 3 is greater than the second predetermined difference ΔV 2 , so that the second switching transistor M12 can be stably turned on.

[0115] In some embodiments, as shown in Figure 5 the second power supply circuit 140 further includes: an NPN transistor P1.

[0116] The collector of the NPN transistor P1 is connected to the anode of the third zener diode D3. The emitter of the NPN transistor P1 is respectively connected to the gate of the second switching transistor M12 and one end of the second resistor. The base of the NPN transistor P1 is connected to the collector.

[0117] Since an NPN transistor P1 is provided between the anode of the third zener diode D3 and the gate of the second switching transistor M12, and the base of the NPN transistor P1 is connected to the collector, a forward voltage drop value is added on the basis of the zener voltage value of the third zener diode D3, further adjusting the voltage of the gate of the second switching transistor M12, thereby achieving more flexible voltage stabilization and adjustment.

[0118] In some embodiments, as shown in Figure 6As shown, the NPN transistor P1 can be replaced with a diode D4. The anode of the diode D4 is connected to the anode of the third voltage stabilizing diode D3, and the cathode of the diode D4 is respectively connected to the gate of the second switching transistor M12 and one end of the second resistor. By using this diode D4, flexible voltage stabilization and adjustment can also be achieved.

[0119] In some embodiments, referring to Figure 5 As shown, the clamping circuit 100 further includes: a second capacitor C2.

[0120] One end of the second capacitor C2 is connected to the cathode of the third voltage stabilizing diode, and the other end of the second capacitor C2 is connected to the gate of the second switching transistor M12. Due to the setting of the second capacitor C2, a good voltage stabilizing effect is provided.

[0121] The following introduces part of the working process of the clamping circuit 100 of the present application:

[0122] When there is no enable signal EN input to the gate of the first switching transistor M11, the first switching transistor M11 is turned off. At this time, the first voltage stabilizing diode D1, the second voltage stabilizing diode D2, and the third voltage stabilizing diode D3 are not reversely broken down, no current passes through, and the first voltage stabilizing diode D1 and the second voltage stabilizing diode D2 have no voltage stabilizing effect.

[0123] Referring to Figure 7 As shown, when there is an enable signal EN input to the gate of the first switching transistor M11, the first switching transistor M11 is turned on. At this time, the first voltage stabilizing diode D1, the second voltage stabilizing diode D2, and the third voltage stabilizing diode D3 are all reversely broken down; the first switching transistor M11, the first resistor R1, the first voltage stabilizing diode D1, and the output current terminal G1 form a first current path, and the current in the first current path is I1, and a stable voltage difference is formed between the cathode and the anode of the first voltage stabilizing diode D1. The first switching transistor M11, the first resistor R1, the second voltage stabilizing diode D2, and the second switching transistor M12 form a second current path, and the current in the first current path is I2, and a stable voltage difference is formed between the cathode and the anode of the second voltage stabilizing diode D2. The first switching transistor M11, the first resistor R1, the third voltage stabilizing diode D3, and the second resistor R2 form a third current path, and the current in the first current path is I3, and a stable voltage difference is formed between the cathode and the anode of the third voltage stabilizing diode D3, providing a stable gate voltage for the second switching transistor M12.

[0124] According to the second aspect of the present application, referring to Figure 4 , a current feedback circuit 10 is provided. The current feedback circuit 10 includes a current mirror circuit 220, a linear voltage stabilizing circuit 210, a third resistor Rse, and the above-mentioned clamping circuit 100. The current mirror circuit 220 includes a load switch M21 and a detection switch M22. The specific connection relationship and functions have been shown above and will not be elaborated here.

[0125] The independent claim of the current feedback circuit 10 has all the beneficial effects of the clamping circuit 100 described above, and will not be elaborated herein in this application.

[0126] Meanwhile, the current feedback circuit 10 of this application has a simple structure, is applicable to high-voltage environments with a large output voltage variation range of the load switch M21, and does not require a high-low voltage conversion circuit to achieve accurate feedback of the output currents of the load switch M21 and the detection switch M22.

[0127] The current replication ratio of the current mirror circuit 220 in this application is 1:K, which can be adjusted according to actual situations, and only the operational amplifier A1, the adjustment switch M23 and the current mirror circuit 220 need to meet the requirements of closed-loop circuit stability.

[0128] The following introduces some working processes of the current feedback circuit 10 of this application:

[0129] Taking the process in which the voltage V1 of the primary output current terminal G1 changes and is clamped to make V1 equal to V2 as a voltage clamping period, and denoting the output current of the detection switch at the end of the previous voltage clamping period as Ia.

[0130] Refer to Figure 8 , when the voltage of the output current terminal G1 changes, causing the voltage V1 of the output current terminal G1 (i.e., the non-inverting input terminal) and the voltage V2 of the mirror current terminal G2 (i.e., the inverting input terminal) to change from being equal to V1 > V2, due to the effect of the clamping circuit 100, the voltages Va and Vb also increase accordingly at this time, and the voltage difference between Va and V1 remains unchanged, and the voltage difference between Va and Vb remains unchanged. At this time, the operational amplifier A1 adjusts the gate voltage of the adjustment switch M23 through the output voltage V3, thereby adjusting the voltage V2 of the mirror current terminal G2 to increase to be equal to V1, and the output current of the detection switch M22 changes from Ia to Ib.

[0131] Refer to Figure 9 , when the voltage of the output current terminal G1 changes, causing the voltage V1 of the output current terminal G1 (i.e., the non-inverting input terminal) and the voltage V2 of the mirror current terminal G2 (i.e., the inverting input terminal) to change from being equal to V1 < V2, due to the effect of the clamping circuit 100, the voltages Va and Vb also decrease accordingly at this time, and the voltage difference between Va and V1 remains unchanged, and the voltage difference between Va and Vb remains unchanged. At this time, the operational amplifier A1 adjusts the gate voltage of the adjustment switch M23 through the output voltage V3, thereby adjusting the voltage V2 of the mirror current terminal G2 to decrease to be approximately equal to V1, and the output current of the detection switch M22 changes from Ia to Ic.

[0132] In summary, the present application forms a complete loop negative feedback path through the current mirror circuit 220, the linear voltage regulation circuit 210, and the clamping circuit 100, and has good anti-interference ability and current replication ability.

[0133] According to the third aspect of the present application, as Figure 10 shown, a vehicle 1 is provided. The vehicle 1 includes the above-mentioned current feedback circuit, and the vehicle 1 has all the beneficial effects of the above-mentioned current feedback circuit 10, which will not be elaborated herein.

[0134] The vehicle 1 can be a fuel vehicle, a plug-in hybrid vehicle, a new energy vehicle, etc., and the present application does not make specific limitations thereto.

[0135] In the description of the present application, the terms "first" and "second" are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more features. In the description of the present application, "a plurality of" means two or more, unless otherwise specifically defined.

[0136] In the above embodiments, the descriptions of the respective embodiments have their own emphases. For the parts not elaborated in a certain embodiment, reference may be made to the relevant descriptions of other embodiments.

[0137] Among the embodiments, implementation manners, and related technical features of the present application, they can be combined and replaced with each other without conflict.

[0138] The above are only the preferred embodiments of the present application, and do not impose any form of limitation on the present application. However, any simple modification, equivalent change, and modification made to the above embodiments based on the technical essence of the present application without departing from the content of the technical solution of the present application still fall within the scope of the technical solution of the present application.

Claims

1. A clamping circuit, characterized in that: include: A first voltage stabilizing circuit, the first voltage stabilizing circuit comprising a first connecting end and a second connecting end, the first connecting end being used to connect to a first power supply end of an operational amplifier in the linear voltage stabilizing circuit, and the second connecting end being used to connect to a non-inverting input end of the operational amplifier; The first voltage stabilizing circuit is used to stabilize a first voltage difference between the first power supply terminal and the in-phase input terminal at a first predetermined difference value.

2. The clamping circuit according to claim 1, characterized in that: The first voltage stabilizing circuit comprises: A first zener diode, wherein the cathode of the first zener diode is connected to the first power supply terminal as the first connection terminal, and the anode of the first zener diode is connected to the non-inverting input terminal as the second connection terminal.

3. The clamping circuit according to claim 1, characterized in that: The clamping circuit further comprises: a second voltage stabilizing circuit, the second voltage stabilizing circuit comprising a third connection terminal and a fourth connection terminal, the third connection terminal being used to connect to the first power supply terminal, and the fourth connection terminal being used to connect to the second power supply terminal of the operational amplifier; The second voltage stabilizing circuit is used to stabilize a second voltage difference between the first power supply terminal and the second power supply terminal at a second predetermined difference value.

4. The clamping circuit according to claim 3, characterized in that: The second voltage stabilizing circuit further includes: A second Zener diode, wherein the cathode of the second Zener diode is connected to the first power supply terminal as the third connection terminal, and the anode of the second Zener diode is connected to the second power supply terminal as the fourth connection terminal.

5. The clamping circuit according to any one of claims 1 to 4, characterized in that: The clamping circuit further comprises: A first power supply circuit, the first power supply circuit includes a first resistor and a first switch tube, the gate of the first switch tube inputs an enable signal, the enable signal is used to control the conduction or cutoff of the first switch tube, the source of the first switch tube is connected to the input power supply terminal, the drain of the first switch tube is connected to one end of the first resistor, and the other end of the first resistor is connected to the first power supply terminal.

6. The clamping circuit according to claim 4, characterized in that: The clamping circuit further comprises: A second power supply circuit, wherein the second power supply circuit comprises a second switch tube and a third voltage regulator diode; The source of the second switch tube is respectively connected to the second power supply end and the anode of the second voltage regulator diode, the drain of the second switch tube is grounded, the gate of the second switch tube is connected to the anode of the third voltage regulator diode; the cathode of the third voltage regulator diode is connected to the first power supply end.

7. The clamping circuit according to claim 6, characterized in that: The second power supply circuit further includes: A second resistor, one end of the second resistor is connected to the anode of the third voltage zener diode, and the other end of the second resistor is grounded.

8. The clamping circuit according to claim 7, characterized in that: The second power supply circuit further includes: NPN transistor, the collector of the NPN transistor is connected to the anode of the third voltage-stabilizing diode, the emitter of the NPN transistor is respectively connected to the gate of the second switch tube and one end of the second resistor, and the base of the NPN transistor is connected to the collector.

9. The clamping circuit according to claim 6, characterized in that: The clamping circuit further comprises: A first capacitor, one end of the first capacitor is connected to the cathode of the second voltage stabilizing diode, and the other end of the first capacitor is respectively connected to the anode of the second voltage stabilizing diode and the source of the second switch tube.

10. The clamping circuit according to claim 6, characterized in that: The clamping circuit further comprises: A second capacitor, one end of the second capacitor is connected to the cathode of the third voltage stabilizing diode, and the other end of the second capacitor is connected to the gate of the second switch tube.

11. A current feedback circuit, characterized in that: include: A current mirror circuit, a linear voltage regulator circuit, and a clamping circuit as claimed in any one of claims 1 to 10; The current mirror circuit comprises an output current terminal and a mirror current terminal, and the current mirror circuit is used to mirror the output current detected by the output current terminal and output the mirror current at the mirror current terminal; The linear voltage stabilization circuit includes an operational amplifier and an adjustment switch, wherein the non-inverting input terminal of the operational amplifier is connected to the output current terminal, the inverting input terminal of the operational amplifier and the common terminal of the source of the adjustment switch are connected to the mirror current terminal, the output terminal of the operational amplifier is connected to the gate of the adjustment switch, the drain of the adjustment switch is grounded, and the linear voltage stabilization circuit is used to adjust the voltages of the output current terminal and the mirror current terminal.

12. The current feedback circuit according to claim 11, characterized in that: The current mirror circuit includes a load switch and a detection switch; The drain of the load switch and the drain of the detection switch are both connected to the driving power supply terminal, the gate of the load switch is connected to the gate of the detection switch, the gate of the load switch inputs a driving signal, the source of the load switch is connected to the non-inverting input terminal of the operational amplifier as the output current terminal, and the source of the detection switch is connected to the inverting input terminal and the source of the adjustment switch as the mirror current terminal.

13. The current feedback circuit according to claim 11, characterized in that: The current feedback circuit further includes: A third resistor, one end of the third resistor is connected to the drain of the adjustment switch, and the other end of the third resistor is grounded.

14. The current feedback circuit according to claim 12, characterized in that: The current feedback circuit further includes: A fourth resistor, one end of the fourth resistor is connected to the source of the load switch, and the other end of the fourth resistor is grounded.

15. A vehicle, characterized in that: A current feedback circuit comprising any one of claims 11 to 14.

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