Chip packaging device

Abstract

The embodiment of the utility model discloses a chip packaging device. The chip packaging device comprises a substrate and a chip packaging structure, the chip is packaged between the chip packaging structure and the substrate; the chip packaging structure is welded with the substrate; the chip packaging structure comprises a liquid cooling flow channel and a cavity. The liquid cooling flow channels and the cavities are alternately arranged; heat generated by the chip is transmitted out through the chip packaging structure. According to the technical scheme provided by the embodiment of the utility model, the chip is packaged between the chip packaging structure and the substrate, the chip is prevented from being scratched and damaged, the chip is easy to place and fix, the chip packaging structure and the substrate are soldered by brazing, the sealing performance between the chip packaging structure and the substrate is enhanced, the contact strength is improved, and the reliability of the chip packaging structure is improved. And the condition of liquid leakage is prevented. The liquid cooling flow channel and the cavity are arranged in the chip packaging structure, and the heat dissipation effect on the chip with high heat productivity is improved through liquid circulation.

Description

Technical Field

[0001] The utility model relates to the technical field of chip packaging, and particularly to a chip packaging device. Background Art

[0002] Printed Circuit Board (PCB) sheets are copper-clad / epoxy glass cloth substrates or phenolic resin glass cloth substrates, and a small amount of paper-based copper-clad sheets are also used. Although these substrates have excellent electrical and processing properties, they have poor heat dissipation. As electronic products enter the era of component miniaturization, high-density installation, and high-heat generation assembly, as a heat dissipation path for high-heat generating components, the heat dissipation ability of the PCB itself is poor.

[0003] In the prior art, methods such as adding thermal gel, thermal pads, or cold plates are usually applied to change the design structure of the PCB substrate by conducting heat from the front, and then conduct the heat out.

[0004] However, the methods in the prior art have problems such as low contact strength, poor heat resistance, and poor heat dissipation effect, and it is difficult to dissipate heat for chips with high heat generation. Summary of the Utility Model

[0005] The utility model provides a chip packaging device to improve the heat dissipation effect for chips with high heat generation and improve the contact strength.

[0006] According to an aspect of the utility model, a chip packaging device is provided. The chip packaging device includes: a substrate and a chip packaging structure; the chip is packaged between the chip packaging structure and the substrate; the chip packaging structure is welded to the substrate;

[0007] The chip packaging structure includes a liquid cooling channel and a cavity; the liquid cooling channel and the cavity are arranged alternately;

[0008] The heat generated by the chip is transmitted out through the chip packaging structure.

[0009] Optionally, the shape of the cavity includes a cuboid or a cube.

[0010] Optionally, in the direction from the substrate to the chip packaging structure, the length of the cavity is greater than or equal to 1 mm and less than or equal to 3 mm.

[0011] Optionally, the cavity is filled with a phase change material, and the phase change material includes paraffin or inorganic salts.

[0012] Optionally, the shape of the liquid cooling channel is S-shaped or Z-shaped.

[0013] Optionally, the chip packaging structure further includes a liquid inlet and a liquid outlet;

[0014] Both the liquid inlet and the liquid outlet are communicated with the liquid cooling channel.

[0015] Optionally, in the direction perpendicular to the substrate and pointing to the chip packaging structure, the diameters of the liquid inlet and the liquid outlet are less than or equal to 2 millimeters.

[0016] Optionally, the coolant in the liquid cooling channel is a non-conductive coolant.

[0017] Optionally, the liquid cooling channel is in direct contact with the chip.

[0018] Optionally, in the direction of the substrate pointing to the chip packaging structure, the height of the liquid cooling channel is 1 millimeter.

[0019] In the technical solution of the embodiment of the present invention, the chip is packaged between the chip packaging structure and the substrate, which can prevent the chip from being scratched and damaged, and is easy to place and fix the chip. The chip packaging structure and the substrate are welded by brazing, which enhances the sealing performance between the chip packaging structure and the substrate, improves the contact strength, and prevents liquid leakage. A liquid cooling channel and a cavity are provided in the chip packaging structure. When the chip generates heat, the heat is transferred to the liquid cooling channel, and the heat generated by the chip is transferred to the cooler through the circulation of the coolant in the liquid cooling channel. The heat exchanger cools the liquid, and then the cooled liquid is conveyed back into the liquid cooling channel by the cooling pump to complete the liquid circulation, forming a liquid cooling system, which improves the heat dissipation effect for chips with high heat generation. The liquid cooling channels and the cavities are arranged alternately, and the cavities are filled with phase change materials, which can significantly improve the high-temperature range and achieve the effect of flattening the peak temperature, making it easier to adapt to sudden temperature changes.

[0020] It should be understood that the content described in this part is not intended to identify the key or important features of the embodiments of the present invention, nor is it used to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0022] Figure 1 is a schematic structural diagram of a chip packaging device provided according to an embodiment of the present invention;

[0023] Figure 2 is a chip packaging device provided according to an embodiment of the present invention along Figure 1Schematic cross-sectional view taken along AA'

[0024] Figure 3 is a top view structural schematic diagram of a chip packaging device provided according to an embodiment of the present invention;

[0025] Figure 4 is a top view structural schematic diagram of another chip packaging device provided according to an embodiment of the present invention. Detailed implementation manners

[0026] In order to enable those skilled in the art to better understand the solution of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0027] It should be noted that the terms "first", "second", etc. in the description and claims of the present invention and the above drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged under appropriate circumstances so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device including a series of steps or units is not necessarily limited to those clearly listed steps or units, but may include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0028] Figure 1 is a structural schematic diagram of a chip packaging device provided according to an embodiment of the present invention. Figure 2 is a schematic cross-sectional view taken along AA' of a chip packaging device provided according to an embodiment of the present invention. As Figure 1 shown in Figure 1 and Figure 2 shown, the chip packaging device includes: a substrate 10 and a chip packaging structure 20; a chip 30 is packaged between the chip packaging structure 20 and the substrate 10; the chip packaging structure 20 is welded to the substrate 10; the chip packaging structure 20 includes a liquid cooling channel 201 and a cavity 202; the liquid cooling channel 201 and the cavity 202 are arranged alternately; the heat generated by the chip 30 is transmitted out through the chip packaging structure 20.

[0029] In the embodiment of the present utility model, the chip packaging device includes a substrate 10 and a chip packaging structure 20. The substrate 10 is a carrier plate, which can be a PCB. The chip packaging structure 20 can be a housing for mounting a semiconductor integrated circuit. The chip 30 is packaged between the chip packaging structure 20 and the substrate 10, which can be understood as adding a housing to the chip 30 and fixing it on the printed circuit board. The chip 30 is laid out, pasted, fixedly connected on the frame, the wiring terminals are led out and an overall three-dimensional structure is formed. The chip 30 is small and thin. If no protection is applied externally, it is easily scratched and damaged. In addition, due to the tiny size of the chip 30, it is not easy to be installed on the printed circuit board without a larger-sized housing. The chip packaging structure 20 can play the roles of placing, fixing, sealing, protecting the chip 30 and enhancing the heat conduction performance, and it is also a communication bridge between the inside of the chip 30 and the external circuit. As Figure 1 and Figure 2 shown in the structure, the chip 30 is flip-chip welded to the substrate 10. The chip 30 faces downward and is connected to the substrate 10 through bumps 40. The substrate 10 further includes solder balls 50 below.

[0030] The chip packaging structure 20 is welded to the substrate 10, and the backside metallization process is applied. The chip packaging structure 20 is connected to the substrate 10 by brazing. The backside metallization process is a process of depositing metal on the backside of the wafer. Generally, the metal materials used for backside metallization evaporation include titanium (Ti), nickel (Ni), and silver (Ag). In the related art, the chip packaging structure 20 and the substrate 10 are connected by an adhesive bonding process. However, the adhesive bonding process has poor heat resistance, is difficult to adapt to extreme high-temperature environments, is easily softened in a higher-temperature environment, the contact strength decreases, it is difficult to adapt to the liquid cooling environment with high flow rate and high pressure, and the heat dissipation effect of the adhesive bonding process is poor, and it is difficult to dissipate heat for chips with high heat generation. In the embodiment of the present utility model, the backside metallization process is adopted to improve the contact strength and can withstand greater pressure. Exemplarily, when the chip packaging structure 20 and the substrate 10 are connected by the backside metallization process, it can withstand a pressure of 20 bar. In addition, adopting the backside metallization process can improve the high-temperature resistance of the connection between the chip packaging structure 20 and the substrate 10.

[0031] In the embodiment of the present utility model, the chip packaging structure 20 is connected to the substrate 10 by brazing. Brazing uses a metal material with a melting point lower than that of the welded parts as the filler metal. The welded parts and the filler metal are heated to a temperature higher than the melting point of the filler metal and lower than the melting point of the welded parts. The molten filler metal is used to wet the base metal, fill the joint gap and diffuse with the base metal to achieve the method of connecting the welded parts. Classified according to the melting point of the filler metal, brazing includes soft brazing and hard brazing. The melting point of the filler metal for soft brazing is lower than 450 degrees Celsius. The melting point of the filler metal for hard brazing is higher than 450 degrees Celsius. Classified according to the brazing temperature, brazing includes high-temperature brazing, medium-temperature brazing and low-temperature brazing. Classified according to the heating method, brazing includes flame brazing, furnace brazing, induction brazing, resistance brazing and soldering iron brazing, etc. Applying brazing to connect the chip packaging structure 20 and the substrate 10 has strong sealing performance. Brazing has wide adaptability and can weld most metals and some non-metals. Brazing has good accessibility. For welds that are inaccessible in space, brazing can be used to complete them. Exemplarily, for the chip 30, it has a small volume. When the chip 30 is packaged between the chip packaging structure 20 and the substrate 10, brazing has higher accessibility and better sealing performance. Brazing has high precision. For high-precision and complex parts, welding can be completed at one time with high welding efficiency. The process parameters of brazing mainly include brazing temperature and holding time.

[0032] The chip packaging structure 20 includes a liquid cooling channel 201 and a cavity 202. The liquid cooling channel 201 and the cavity 202 are arranged alternately. There is no need to fill heat-conducting materials such as heat-conducting silicone grease in the chip packaging structure 20. The heat generated by the chip 30 directly undergoes heat exchange through the liquid cooling channel 201, enhancing the heat dissipation effect for the chip 30 with high heat generation. The liquid cooling channel 201 circulates coolant inside. The chip 30 is packaged between the chip packaging structure 20 and the substrate 10 by brazing, enhancing the sealing performance and the ability to withstand pressure, and it is not easy to leak liquid under the condition of large flow channel pressure in the liquid cooling channel 201.

[0033] Exemplarily, the outside of the liquid cooling channel 201 can be connected to a cooler. When the chip 30 generates heat, it is transferred to the liquid cooling channel 201. The heat generated by the chip 30 is transferred to the cooler through the circulation of the coolant in the liquid cooling channel 201. The heat exchanger cools the liquid, and the cooled liquid is then transmitted back to the inside of the liquid cooling channel 201 through a cooling pump to complete the liquid circulation, forming a liquid cooling system, and improving the heat dissipation effect for the chip 30 with high heat generation.

[0034] In the chip packaging structure 20, the liquid cooling channel 201 and the cavity 202 are arranged alternately. The cavity 202 is filled with a phase change material, which can significantly improve the high-temperature range and achieve the effect of flattening the peak temperature, and it is easier to adapt to sudden temperature changes.

[0035] In the technical solution of the embodiment of the present utility model, the chip 30 is encapsulated between the chip packaging structure 20 and the substrate 10, which can prevent the chip 30 from being scratched and damaged, and is also easy to place and fix the chip 30. The chip packaging structure 20 and the substrate 10 are welded by brazing, which enhances the sealing performance between the chip packaging structure 20 and the substrate 10, improves the contact strength, and prevents the occurrence of liquid leakage. A liquid cooling channel 201 and a cavity 202 are provided in the chip packaging structure 20. When the chip 30 generates heat, the heat is transferred to the liquid cooling channel 201. The heat generated by the chip 30 is transferred to the cooler through the circulation of the coolant in the liquid cooling channel 201. The heat exchanger cools the liquid, and then the cooled liquid is transmitted back into the liquid cooling channel 201 through the cooling pump to complete the circulation of the liquid, forming a liquid cooling system, which improves the heat dissipation effect for the chip 30 with high heat generation. The liquid cooling channel 201 and the cavity 202 are arranged alternately, and the cavity 202 is filled with a phase change material, which can significantly improve the high-temperature range and achieve the effect of flattening the peak temperature, making it easier to adapt to sudden temperature changes.

[0036] Based on the technical solution of the above-mentioned embodiment of the utility model, referring to Figure 2 , optionally, the shape of the cavity 202 includes a cuboid or a cube.

[0037] In the embodiment of the present utility model, the chip packaging device is in a three-dimensional shape. Among them, the shape of the cavity 202 is set as a cuboid or a cube, which is convenient for filling the phase change material, and the shape of the cavity 202 corresponds to the shape of the liquid cooling channel 201, which can significantly improve the high-temperature range and achieve the effect of flattening the peak temperature, making it easier to adapt to sudden temperature changes.

[0038] Based on the technical solution of the above-mentioned embodiment of the utility model, referring to Figure 2 , optionally, in the direction X from the substrate 10 to the chip packaging structure 20, the length of the cavity 202 is greater than or equal to 1 mm and less than or equal to 3 mm.

[0039] In the embodiment of the present utility model, in the direction X from the substrate 10 to the chip packaging structure 20, 1 mm ≤ the length of the cavity 202 ≤ 3 mm. Setting the length of the cavity 202 within this range can not only meet the filling of the phase change material in the cavity 202 to achieve the effect of improving the high-temperature range and flattening the peak temperature, but also reduce the size of the chip packaging structure 20, realize the miniaturized packaging of the chip 30, and reduce the manufacturing cost. In other optional embodiments of the present utility model, in the direction Y perpendicular to the direction from the substrate 10 to the chip packaging structure 20, the length of the cavity 202 can also be set to be greater than or equal to 1 mm and less than or equal to 3 mm.

[0040] Based on the technical solution of the above-mentioned embodiment of the utility model, referring to Figure 2, the cavity 202 is filled with a phase change material, which includes paraffin or inorganic salts.

[0041] In the embodiment of the present utility model, the chip packaging structure 20 can achieve heat dissipation for the chip 30. Among them, a phase change material is filled in the cavity 202. In an environment where the temperature of the chip 30 suddenly rises, the phase change material can absorb heat, so that the temperature no longer changes suddenly, and it can play a role in flattening the peak temperature. The phase change material includes but is not limited to paraffin and inorganic salts. Both paraffin and inorganic salts can absorb heat when the temperature changes suddenly and flatten the peak of the temperature.

[0042] Figure 3 is a top view structural schematic diagram of a chip packaging device provided according to an embodiment of the present utility model. Figure 4 is a top view structural schematic diagram of another chip packaging device provided according to an embodiment of the present utility model. As Figure 3 and Figure 4 shown, the shape of the liquid cooling channel 201 is S-shaped or Z-shaped.

[0043] In the embodiment of the present utility model, flip-chip technology is adopted for chip packaging. The chip packaging structure 20 is located above the substrate 10. A liquid cooling channel 201 is provided in the chip packaging structure 20, and the shape of the liquid cooling channel 201 is set to be S-shaped or Z-shaped, which can achieve more sufficient heat dissipation for the chip and improve the heat dissipation effect for chips with high heat generation. The chip packaging structure 20 also includes a cavity 202 arranged alternately with the liquid cooling channel 201, which is used to fill the phase change material to improve the high-temperature range and achieve the effect of flattening the peak temperature.

[0044] Based on the technical solution of the above-mentioned embodiment of the utility model, referring to Figures 1 to 4 any one of them, the chip packaging structure 20 further includes a liquid inlet 203 and a liquid outlet 204; both the liquid inlet 203 and the liquid outlet 204 are communicated with the liquid cooling channel 201.

[0045] In the embodiment of the present utility model, the outside of the liquid cooling channel 201 can be communicated with a cooler. The cooler transports the coolant from the liquid inlet 203 to the liquid cooling channel 201 and returns it to the cooler from the liquid outlet 204. When the chip 30 generates heat, it is transferred to the liquid cooling channel 201. The heat generated by the chip 30 is transferred to the cooler through the circulation of the coolant in the liquid cooling channel 201. The liquid is cooled by the heat exchanger, and the cooled liquid is then transported back to the inside of the liquid cooling channel 201 through a cooling pump to complete the liquid circulation and form a liquid cooling system, improving the heat dissipation effect for the chip 30.

[0046] Based on the technical solution of the above-mentioned embodiment of the utility model, referring to Figure 2, optionally, in the direction Y perpendicular to the substrate 10 and pointing to the chip package structure 20, the diameters of the liquid inlet 203 and the liquid outlet 204 are less than or equal to 2 millimeters.

[0047] In the embodiment of the present utility model, setting the diameters of the liquid inlet 203 and the liquid outlet 204 within 2 millimeters can not only prevent impurities from falling on the surface of the chip 30 and causing damage to the chip 30, but also enable the circulation of the cooling liquid to achieve heat dissipation of the chip 30.

[0048] Based on the technical solution of the above-mentioned embodiment of the utility model, referring to Figures 1 to 4 any one of, optionally, the cooling liquid in the liquid cooling channel 201 is a non-conductive cooling liquid.

[0049] In the embodiment of the present utility model, selecting a non-conductive cooling liquid can avoid damage to the liquid cooling channel 201 by the cooling liquid, does not affect the performance of the chip 30, and realizes heat dissipation of the chip 30.

[0050] Based on the technical solution of the above-mentioned embodiment of the utility model, referring to Figure 2 , optionally, the liquid cooling channel 201 is in direct contact with the chip 30.

[0051] In the embodiment of the present utility model, the direct contact between the liquid cooling channel 201 and the chip 30 can directly perform cooling exchange between the heat source and the cooling liquid, and the liquid cooling channel 201 can cover all heat-generating devices, with low requirements for the layout of the devices, no need for complex structural design, and saving design cost and installation time cost.

[0052] Based on the technical solution of the above-mentioned embodiment of the utility model, referring to Figure 2 , optionally, in the direction X from the substrate 10 to the chip package structure 20, the height of the liquid cooling channel 201 is 1 millimeter.

[0053] In the embodiment of the present utility model, in the direction X from the substrate 10 to the chip package structure 20, the height of the liquid cooling channel 201 is set to 1 mm, and the liquid cooling channel 201 is in direct contact with the chip 30, meeting the requirements for miniaturized packaging of the chip 30.

[0054] It should be understood that various forms of the processes shown above can be used, steps can be reordered, added, or deleted. For example, the steps described in the present utility model can be executed in parallel, sequentially, or in a different order, as long as the desired results of the technical solution of the present utility model can be achieved, and no limitations are imposed herein.

[0055] The above specific embodiments do not constitute a limitation on the protection scope of the present utility model. Those skilled in the art should understand that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principle of the present utility model shall be included within the protection scope of the present utility model.

Claims

1. A chip packaging device, characterized in that: include: Substrate and chip packaging structure; A chip is packaged between the chip packaging structure and the substrate; The chip packaging structure is welded to the substrate; The chip packaging structure comprises a liquid cooling channel and a cavity; the liquid cooling channel and the cavity are arranged alternately; The heat generated by the chip is transferred out through the chip packaging structure.

2. The chip packaging device according to claim 1, characterized in that: The shape of the cavity includes a cuboid or a cube.

3. The chip packaging device according to claim 2, characterized in that: In a direction from the substrate to the chip packaging structure, a length of the cavity is greater than or equal to 1 mm and less than or equal to 3 mm.

4. The chip packaging device according to claim 1, characterized in that: The cavity is filled with a phase change material, and the phase change material includes paraffin or an inorganic salt.

5. The chip packaging device according to claim 1, characterized in that: The shape of the liquid cooling channel is S-shaped or Z-shaped.

6. The chip packaging device according to claim 1, characterized in that: The chip packaging structure also includes a liquid inlet and a liquid outlet; The liquid inlet and the liquid outlet are both communicated with the liquid cooling channel.

7. The chip packaging device according to claim 6, characterized in that: In a direction perpendicular to the substrate and pointing toward the chip packaging structure, the diameters of the liquid inlet and the liquid outlet are less than or equal to 2 mm.

8. The chip packaging device according to claim 1, characterized in that: The coolant in the liquid-cooling channel is a non-conductive coolant.

9. The chip packaging device according to claim 8, characterized in that: The liquid cooling channel is in direct contact with the chip.

10. The chip packaging device according to claim 1, characterized in that: In the direction from the substrate to the chip packaging structure, the height of the liquid cooling channel is 1 mm.

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