UPS (Uninterrupted Power Supply) control system

By designing the UPS power control system, the mains status is monitored in real time and quickly switch to the UPS power supply, the problem of slow response speed of the existing UPS power supply is solved and the reliability of the power supply system is improved.

CN222981282UActive Publication Date: 2025-06-13HEBEI BEICHEN ELECTRIC TECH CO LTD
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Patent Information

Application Number
CN202421764286.6
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-07-24
Publication Date
2025-06-13
Estimated Expiration
2034-07-24

AI Technical Summary

Technical Problem

The existing UPS power supply is slow to respond when monitoring the mains status, resulting in seamless switching failure.

Method used

A UPS power supply control system is designed, including voltage acquisition circuit, phase lock loop circuit, frequency detection circuit, voltage detection circuit, current detection circuit and OR gate circuit. These circuits monitor the mains status in real time and quickly switch to the UPS power supply when an abnormality is detected.

Benefits of technology

It improves the response speed of UPS power supply to abnormal states of mains power, ensures that the UPS power supply can be switched to the UPS power supply in time when the mains power is abnormal, ensures the continuous operation of key equipment, and improves the reliability of the power supply system.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model provides a UPS (Uninterrupted Power Supply) control system. The UPS control system comprises a phase-locked loop circuit, a frequency detection circuit, a voltage detection circuit, a current detection circuit and an OR gate circuit, the signal input end of the phase-locked loop circuit is connected with the output end of a voltage acquisition circuit, and the control voltage end of the phase-locked loop circuit outputs control voltage corresponding to mains supply frequency; the control voltage end of the phase-locked loop circuit is connected with the input end of the frequency detection circuit, and the frequency detection circuit is configured to detect the abnormal state of the control voltage; the voltage detection circuit is configured to detect an abnormal state of mains supply voltage, and the current detection circuit is configured to detect an abnormal state of mains supply current; the output ends of the frequency detection circuit, the voltage detection circuit and the current detection circuit are respectively connected to a plurality of input ends of the OR gate circuit, and the output end of the OR gate circuit is used for controlling the change-over switch to act so as to gate the mains supply or the UPS power supply to supply power to the load. According to the invention, the response speed of the UPS to the abnormal state of the commercial power can be improved.
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Description

Technical Field

[0001] The present disclosure relates to the technical field of power supply systems, and particularly to a UPS power supply control system. Background Art

[0002] In order to cope with the instability of the power supply from the commercial power (i.e., the power provided by the public power grid), an uninterruptible power supply (UPS) is usually used as a backup power supply to ensure seamless switching to the UPS power supply when the commercial power is abnormal and to guarantee the continuous operation of critical equipment. However, to achieve such seamless switching, a mechanism that can monitor the status of the commercial power (including voltage, current, and frequency) in real time and respond quickly when an abnormality is detected is required.

[0003] However, the existing UPS power supplies have a slow response speed when monitoring the status of the commercial power, which may lead to the failure of seamless switching. Summary of the Utility Model

[0004] Embodiments of the present disclosure provide a UPS power supply control system to improve the response speed of the UPS power supply to the abnormal status of the commercial power.

[0005] Embodiments of the present disclosure provide a UPS power supply control system, including a voltage acquisition circuit, a phase-locked loop circuit, a frequency detection circuit, a voltage detection circuit, a current detection circuit, and an OR gate circuit.

[0006] The voltage acquisition circuit is configured to acquire the commercial power voltage. The signal input terminal of the phase-locked loop circuit is used to connect to the output terminal of the voltage acquisition circuit, and the control voltage terminal of the phase-locked loop circuit outputs a control voltage corresponding to the commercial power frequency. The control voltage terminal of the phase-locked loop circuit is connected to the input terminal of the frequency detection circuit, and the frequency detection circuit is configured to detect the abnormal status of the control voltage.

[0007] The voltage detection circuit is configured to detect the abnormal status of the commercial power voltage, and the current detection circuit is configured to detect the abnormal status of the commercial power current.

[0008] The output terminals of the frequency detection circuit, the voltage detection circuit, and the current detection circuit are respectively connected to multiple input terminals of the OR gate circuit, and the output terminal of the OR gate circuit is used to control the action of the switching switch to select the commercial power or the UPS power supply to supply power to the load.

[0009] In an exemplary embodiment of the present disclosure, the frequency detection circuit includes a first comparator, a second comparator, a diode D1, and a diode D2.

[0010] The inverting input terminal of the first comparator is connected to a first reference voltage, the non-inverting input terminal of the first comparator is connected to the control voltage terminal of the phase-locked loop circuit, the output terminal of the first comparator is connected to the anode of diode D1, and the cathode of diode D1 is the output terminal of the frequency detection circuit.

[0011] The inverting input terminal of the second comparator is connected to the control voltage terminal of the phase-locked loop circuit, the non-inverting input terminal of the second comparator is connected to a second reference voltage, the output terminal of the second comparator is connected to the anode of diode D2, and the cathode of diode D2 is connected to the cathode of diode D1.

[0012] In an exemplary embodiment of the present disclosure, the voltage detection circuit includes a third comparator, a fourth comparator, diode D4, and diode D3.

[0013] The inverting input terminal of the third comparator is connected to a third reference voltage, the non-inverting input terminal of the third comparator is connected to the output terminal of the voltage acquisition circuit, the output terminal of the third comparator is connected to the anode of diode D4, and the cathode of diode D4 is the output terminal of the voltage detection circuit.

[0014] The inverting input terminal of the fourth comparator is connected to the output terminal of the voltage acquisition circuit, the non-inverting input terminal of the fourth comparator is connected to a fourth reference voltage, the output terminal of the fourth comparator is connected to the anode of diode D3, and the cathode of diode D3 is connected to the cathode of diode D4.

[0015] In an exemplary embodiment of the present disclosure, the current detection circuit includes a fifth comparator, a sixth comparator, diode D5, and diode D6.

[0016] The inverting input terminal of the fifth comparator is connected to a fifth reference voltage, the non-inverting input terminal of the fifth comparator is connected to the output terminal of the current acquisition circuit, the current acquisition circuit is configured to acquire the mains current, the output terminal of the fifth comparator is connected to the anode of diode D5, and the cathode of diode D5 is the output terminal of the current detection circuit.

[0017] The inverting input terminal of the sixth comparator is connected to the output terminal of the current acquisition circuit, the non-inverting input terminal of the sixth comparator is connected to a sixth reference voltage, the output terminal of the sixth comparator is connected to the anode of diode D6, and the cathode of diode D6 is connected to the cathode of diode D5.

[0018] In an exemplary embodiment of the present disclosure, the UPS power supply control system further includes a battery charging circuit and a temperature detection circuit. The temperature detection circuit is used to detect the battery temperature, and the battery charging circuit includes a switching tube.

[0019] The control circuit of the switching tube includes a first subtraction circuit, a second subtraction circuit, and a seventh comparator connected in sequence. The non-inverting input terminal of the first subtraction circuit is connected to a seventh reference voltage. The inverting input terminal of the first subtraction circuit is connected to the output terminal of the temperature detection circuit. The output terminal of the first subtraction circuit is connected to the inverting input terminal of the second subtraction circuit. The non-inverting input terminal of the second subtraction circuit is connected to the output terminal of the battery charging circuit. The output terminal of the second subtraction circuit is connected to the non-inverting input terminal of the seventh comparator. The inverting input terminal of the seventh comparator is connected to the output terminal of the triangular wave generator. The output terminal of the seventh comparator is connected to the control terminal of the switching tube.

[0020] In an exemplary embodiment of the present disclosure, an amplifier circuit is provided between the output terminal of the temperature detection circuit and the inverting input terminal of the first subtraction circuit.

[0021] A UPS power supply control system provided by an embodiment of the present disclosure has the following working principle and beneficial effects:

[0022] In an embodiment of the present disclosure, the phase-locked loop circuit can perform phase locking on the commercial power frequency. The control voltage output by the control voltage terminal of the phase-locked loop circuit is proportional to the commercial power frequency. By connecting the control voltage of the control voltage terminal of the phase-locked loop circuit to the input terminal of the frequency detection circuit, when the control voltage exceeds the set range, the frequency detection circuit outputs an abnormal state (high level). At the same time, the voltage detection circuit is used to detect whether the commercial power voltage is normal. When the commercial power voltage exceeds the set range, the voltage detection circuit outputs an abnormal state (high level); the abnormal state current detection circuit is used to detect whether the commercial power current is normal. When the commercial power current exceeds the set range, the current detection circuit outputs an abnormal state (high level).

[0023] The output terminals of the frequency detection circuit, the voltage detection circuit, and the current detection circuit are respectively connected to multiple input terminals of the OR gate circuit. Any abnormal state (high level) will cause the OR gate circuit to output a high-level signal, and this high-level signal can control the switching switch to act to select and connect the UPS power supply to supply power to the load.

[0024] The embodiment of the present disclosure can timely detect the abnormal state of the commercial power supply and timely switch to the UPS power supply to supply power to the load, improving the reliability of the power supply system. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the following will briefly introduce the drawings required for use in the embodiments or the description of the prior art. Obviously, the following drawings are only some embodiments of the present disclosure. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0026] Figure 1 is the circuit schematic diagram of a UPS power supply control system provided by an embodiment of the present disclosure;

[0027] Figure 2 is the circuit schematic diagram of a phase-locked loop provided by an embodiment of the present disclosure;

[0028] Figure 3 is the circuit schematic diagram of a battery charging circuit provided by an embodiment of the present disclosure. Detailed implementation manners

[0029] In order to enable those skilled in the art to better understand this solution, the technical solutions in the embodiments of this solution will be clearly described below in conjunction with the accompanying drawings in the embodiments of this solution. Obviously, the described embodiments are part of the embodiments of this solution, rather than all of the embodiments. Based on the embodiments in this solution, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the scope of protection of this solution.

[0030] The term "including" in the specification, claims and above-mentioned drawings of this solution, as well as any other variations, means "including but not limited to", and is intended to cover non-exclusive inclusion, and is not limited only to the examples listed in the text. In addition, terms such as "first" and "second" are used to distinguish different objects, rather than to describe a specific order.

[0031] The implementation of the present disclosure will be described in detail below in conjunction with specific drawings:

[0032] Referring to Figure 1 - Figure 2 , this UPS power supply control system includes a voltage acquisition circuit, a phase-locked loop circuit, a frequency detection circuit, a voltage detection circuit, a current detection circuit and an OR gate circuit.

[0033] The voltage acquisition circuit is configured to acquire the commercial power voltage. The signal input terminal of the phase-locked loop circuit is used to be connected to the output terminal of the voltage acquisition circuit, and the control voltage terminal of the phase-locked loop circuit outputs a control voltage corresponding to the commercial power frequency; the control voltage terminal of the phase-locked loop circuit is connected to the input terminal of the frequency detection circuit, and the frequency detection circuit is configured to detect the abnormal state of the control voltage;

[0034] The voltage detection circuit is configured to detect the abnormal state of the commercial power voltage, and the current detection circuit is configured to detect the abnormal state of the commercial power current;

[0035] The output terminals of the frequency detection circuit, the voltage detection circuit and the current detection circuit are respectively connected to multiple input terminals of the OR gate circuit, and the output terminal of the OR gate circuit is used to control the switching switch to act to select the commercial power or the UPS power supply to supply power to the load.

[0036] In this embodiment, the voltage acquisition circuit is used to detect the mains voltage, and the phase-locked loop circuit can lock the phase of the mains frequency. Referring to Figure 2 , the output voltage Ug of the voltage acquisition circuit is connected to the signal input terminal SIGNAL IN of the phase-locked loop circuit U1. The phase detector inside the phase-locked loop circuit U1 is used to detect the phase difference between the output voltage Ug of the voltage acquisition circuit and the reference signal COMP IN inside the phase-locked loop circuit U1. The loop filter filters the signal output by the phase detector, and the filtered signal is used as the control voltage vco and input to the voltage-controlled oscillator. The voltage-controlled oscillator adjusts the frequency and phase of its output signal according to the control voltage vco. When the frequency and phase of the output signal are consistent with the output voltage Ug of the voltage acquisition circuit, the phase difference signal output by the phase detector is zero or close to zero, and the output frequency of the voltage-controlled oscillator also remains unchanged, realizing the locking of the power grid frequency.

[0037] Therefore, the control voltage vco output by the control voltage terminal of the phase-locked loop circuit is proportional to the mains frequency. By connecting the control voltage vco of the control voltage terminal of the phase-locked loop circuit to the input terminal of the frequency detection circuit, when the control voltage vco exceeds the set range, the frequency detection circuit outputs an abnormal state (high level). At the same time, the voltage detection circuit is used to detect whether the mains voltage is normal. When the mains voltage exceeds the set range, the voltage detection circuit outputs an abnormal state (high level); the abnormal state current detection circuit is used to detect whether the mains current is normal. When the mains current exceeds the set range, the current detection circuit outputs an abnormal state (high level).

[0038] The output terminals of the frequency detection circuit, the voltage detection circuit, and the current detection circuit are respectively connected to multiple input terminals of the OR gate circuit. Any abnormal state (high level) will cause the OR gate circuit to output a high-level signal, and this high-level signal can control the switching switch to act to select and connect the UPS power supply to supply power to the load.

[0039] The embodiment of the present disclosure can timely detect the abnormal state of the mains power supply, and timely switch to the UPS power supply to supply power to the load, improving the reliability of the power supply system.

[0040] Referring to Figure 2 , in an exemplary embodiment of the present disclosure, the frequency detection circuit includes a first comparator, a second comparator, a diode D1, and a diode D2.

[0041] The inverting input terminal of the first comparator is connected to the first reference voltage, the non-inverting input terminal of the first comparator is connected to the control voltage terminal of the phase-locked loop circuit, and the output terminal of the first comparator is connected to the anode of the diode D1. The cathode of the diode D1 is the output terminal of the frequency detection circuit.

[0042] The inverting input terminal of the second comparator is connected to the control voltage terminal of the phase-locked loop circuit. The non-inverting input terminal of the second comparator is connected to the second reference voltage. The output terminal of the second comparator is connected to the anode of diode D2, and the cathode of diode D2 is connected to the cathode of diode D1.

[0043] In this embodiment, resistor R5, resistor R6, and resistor R7 form a series voltage-dividing circuit. The voltage REF1 at the first end of resistor R7 is used as the first reference voltage and connected to the inverting input terminal of the first comparator U2A. The voltage REF2 at the second end of resistor R7 is used as the second reference voltage and connected to the non-inverting input terminal of the second comparator U2B. The control voltage terminal vco of the phase-locked loop circuit is connected to the non-inverting input terminal of the first comparator U2A and the inverting input terminal of the second comparator U2B.

[0044] When the mains frequency is within the set range, the control voltage terminal vco of the phase-locked loop circuit is less than the first reference voltage REF1 and greater than the second reference voltage REF2. The first comparator U2A outputs a low level, the second comparator U2B outputs a low level, and the output of the frequency detection circuit is a low level. When the mains frequency exceeds the set range, the control voltage terminal vco of the phase-locked loop circuit is greater than the first reference voltage REF1 or less than the second reference voltage REF2. The first comparator U2A or the second comparator U2B outputs a high level. Diodes D1 and D2 form an OR gate circuit, and the high level output by the first comparator U2A or the second comparator U2B will cause the output of the frequency detection circuit to be a high level.

[0045] In this embodiment, the frequency detection of the mains is converted into the voltage detection of the corresponding control voltage vco. Then, the first comparator U2A and the second comparator U2B are set to detect the voltage level of the control voltage vco. By reading the output level signal of the frequency detection circuit, the abnormal state of the mains frequency can be judged. The circuit structure is simple and the operation is reliable.

[0046] Refer to Figure 2 , the voltage detection circuit includes a third comparator, a fourth comparator, diode D4, and diode D3.

[0047] The inverting input terminal of the third comparator is connected to the third reference voltage. The non-inverting input terminal of the third comparator is connected to the output terminal of the voltage acquisition circuit. The output terminal of the third comparator is connected to the anode of diode D4, and the cathode of diode D4 is the output terminal of the voltage detection circuit.

[0048] The inverting input terminal of the fourth comparator is connected to the output terminal of the voltage acquisition circuit. The non-inverting input terminal of the fourth comparator is connected to the fourth reference voltage. The output terminal of the fourth comparator is connected to the anode of diode D3, and the cathode of diode D3 is connected to the cathode of diode D4.

[0049] In this embodiment, resistor R8, resistor R9, and resistor R10 form a series voltage-dividing circuit. The voltage REF3 at the first end of resistor R8 is used as the third reference voltage and connected to the inverting input terminal of the third comparator U3A. The voltage REF4 at the second end of resistor R8 is used as the fourth reference voltage and connected to the non-inverting input terminal of the fourth comparator U3B. The output voltage Ug of the voltage acquisition circuit is connected to the non-inverting input terminal of the third comparator U3A and the inverting input terminal of the fourth comparator U3B.

[0050] When the mains voltage is within the set range, the output voltage Ug of the voltage acquisition circuit is less than the third reference voltage REF3 and greater than the fourth reference voltage REF4. The third comparator U3A outputs a low level, the fourth comparator U3B outputs a low level, and the output of the voltage detection circuit is a low level. When the mains voltage exceeds the set range, the output voltage Ug of the voltage acquisition circuit is greater than the third reference voltage REF1 or less than the fourth reference voltage REF2. The third comparator U3A or the fourth comparator U3B outputs a high level. Diodes D3 and D4 form an OR gate circuit, and the high levels output by the third comparator U3A or the fourth comparator U3B will both cause the output of the voltage detection circuit to be a high level.

[0051] In this embodiment, the third comparator U3A and the fourth comparator U3B are used to detect the mains voltage level. By reading the output level signal of the voltage detection circuit, the abnormal state of the mains voltage can be judged. The circuit structure is simple and the operation is reliable.

[0052] Refer to Figure 2 , the current detection circuit includes a fifth comparator, a sixth comparator, diodes D5 and D6.

[0053] The inverting input terminal of the fifth comparator is connected to the fifth reference voltage. The non-inverting input terminal of the fifth comparator is connected to the output terminal of the current acquisition circuit. The current acquisition circuit is configured to acquire the mains current. The output terminal of the fifth comparator is connected to the anode of diode D5, and the cathode of diode D5 is the output terminal of the current detection circuit.

[0054] The inverting input terminal of the sixth comparator is connected to the output terminal of the current acquisition circuit. The non-inverting input terminal of the sixth comparator is connected to the sixth reference voltage. The output terminal of the sixth comparator is connected to the anode of diode D6, and the cathode of diode D6 is connected to the cathode of diode D5.

[0055] In this embodiment, the current acquisition circuit is used to detect the mains current. Resistors R11, R12, and R13 form a series voltage division circuit. The voltage REF5 at the first end of resistor R13 is used as the fifth reference voltage and connected to the inverting input terminal of the fifth comparator U4A. The voltage REF6 at the second end of resistor R13 is used as the sixth reference voltage and connected to the non-inverting input terminal of the sixth comparator U4B. The output voltage ig of the current acquisition circuit is connected to the non-inverting input terminal of the fifth comparator U4A and the inverting input terminal of the sixth comparator U4B.

[0056] When the mains current is within the set range, the output voltage of the current acquisition circuit is less than the fifth reference voltage REF5 and greater than the sixth reference voltage REF6. The fifth comparator U4A outputs a low level, and the sixth comparator U4B outputs a low level. The output of the current detection circuit is a low level. When the mains current exceeds the set range, the output voltage ig of the current acquisition circuit is greater than the fifth reference voltage REF5 or less than the sixth reference voltage REF6. The fifth comparator U4A or the sixth comparator U4B outputs a high level. Diodes D5 and D6 form an OR gate circuit. The high levels output by the fifth comparator U4A or the sixth comparator U4B will both cause the output of the current detection circuit to be a high level.

[0057] In this embodiment, the fifth comparator U4A and the sixth comparator U4B are used to detect the mains current level. By reading the output level signal of the current detection circuit, the abnormal state of the mains current can be judged. The circuit structure is simple and the operation is reliable.

[0058] Refer to Figure 3 , the UPS power control system further includes a battery charging circuit and a temperature detection circuit. The temperature detection circuit is used to detect the battery temperature. The battery charging circuit includes a switching transistor.

[0059] The control circuit of the switching transistor includes a first subtraction circuit, a second subtraction circuit, and a seventh comparator connected in sequence. The non-inverting input terminal of the first subtraction circuit is connected to the seventh reference voltage. The inverting input terminal of the first subtraction circuit is connected to the output terminal of the temperature detection circuit. The output terminal of the first subtraction circuit is connected to the inverting input terminal of the second subtraction circuit. The non-inverting input terminal of the second subtraction circuit is connected to the output terminal of the battery charging circuit. The output terminal of the second subtraction circuit is connected to the non-inverting input terminal of the seventh comparator. The inverting input terminal of the seventh comparator is connected to the output terminal of the triangular wave generator. The output terminal of the seventh comparator is connected to the control terminal of the switching transistor.

[0060] In this embodiment, battery management is an important part of the UPS power supply control, which includes the control of the battery charging and discharging process, the monitoring of the battery state, and the prediction of the battery life, etc. The battery charging circuit may include a step-down transformer, a thyristor rectifier circuit, a filter circuit, and a charging control circuit. Among them, the step-down transformer is used to reduce the mains voltage to a level suitable for battery charging (such as about 20V), and then through thyristor rectification, the rectified voltage is filtered by the filter circuit to remove the AC ripple, obtaining a relatively smooth direct current. The charging control circuit adjusts the charging current and voltage by controlling the on and off of the switching tube (such as a thyristor) according to the charging state of the battery, realizing intelligent charging management of the battery.

[0061] On this basis, considering the influence of the battery charging process on the battery temperature, in order to ensure the reliable operation of the battery, this embodiment adjusts the output voltage of the battery charging circuit according to the battery temperature. When the battery temperature is relatively high, the output voltage of the battery charging circuit can be reduced to reduce the charging current and avoid damage to the battery caused by excessive battery temperature.

[0062] Specifically, the operational amplifier U5A, the resistor R15, and the resistor R14 form a first subtraction circuit, and the operational amplifier U5B, the resistor R16, and the resistor R17 form a second subtraction circuit. The output terminal of the temperature detection circuit can be connected to the inverting input terminal of the first subtraction circuit, and the seventh reference voltage is connected to the non-inverting input terminal of the first subtraction circuit. When the battery temperature rises, the output voltage of the temperature detection circuit increases, and the output voltage of the operational amplifier U5A decreases; the output voltage of the operational amplifier U5A is used as the target value of the output voltage of the battery charging circuit and is connected to the non-inverting input terminal of the operational amplifier U5B to be compared with the actual value of the output voltage of the battery charging circuit. The difference between the target value and the actual value is obtained at the output terminal of the operational amplifier U5B; the difference between the target value and the actual value is connected to the non-inverting input terminal of the comparator U6A and compared with the triangular carrier wave output by the triangular wave generator. A PWM signal with the same frequency as the triangular carrier wave is obtained at the output terminal of the comparator U6A, and this PMW signal is connected to the control terminal of the switching tube. The larger the difference between the target value and the actual value, the larger the duty cycle of the PWM signal, the longer the conduction time of the switching tube, and the higher the output voltage of the battery charging circuit. On the contrary, the smaller the difference between the target value and the actual value, the smaller the duty cycle of the PWM signal, the shorter the conduction time of the switching tube, and the lower the output voltage of the battery charging circuit. Through the above process, the duty cycle of the PWM signal is adjusted according to the battery temperature, and then the output voltage of the battery charging circuit is adjusted.

[0063] In this embodiment, the settings of the battery charging circuit and the temperature detection circuit can adjust the output voltage of the battery charging circuit according to the battery temperature, and then adjust the charging current, avoiding damage to the battery caused by excessive battery temperature.

[0064] Refer to Figure 3An amplifier circuit is provided between the output terminal of the temperature detection circuit and the inverting input terminal of the first subtraction circuit.

[0065] In this embodiment, the amplifier circuit can convert the output voltage of the temperature detection circuit to a set voltage level, which is convenient for calculation with the seventh reference voltage.

[0066] The above embodiments are only used to illustrate the technical solutions of the present disclosure, rather than to limit them; although the present disclosure has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the present disclosure.

Claims

1. A UPS power supply control system, characterized in that: It includes voltage acquisition circuit, phase-locked loop circuit, frequency detection circuit, voltage detection circuit, current detection circuit and OR gate circuit. The voltage acquisition circuit is configured to acquire the mains voltage, the signal input end of the phase-locked loop circuit is used to be connected to the output end of the voltage acquisition circuit, and the control voltage end of the phase-locked loop circuit outputs a control voltage corresponding to the mains frequency; the control voltage end of the phase-locked loop circuit is connected to the input end of the frequency detection circuit, and the frequency detection circuit is configured to detect an abnormal state of the control voltage; The voltage detection circuit is configured to detect an abnormal state of the mains voltage, and the current detection circuit is configured to detect an abnormal state of the mains current; The output ends of the frequency detection circuit, the voltage detection circuit and the current detection circuit are respectively connected to multiple input ends of the OR gate circuit, and the output end of the OR gate circuit is used to control the switching action to select the AC power or UPS power supply to power the load.

2. A UPS power supply control system as claimed in claim 1, characterized in that: The frequency detection circuit includes a first comparator, a second comparator, a diode D1 and a diode D2. The inverting input terminal of the first comparator is connected to the first reference voltage, the non-inverting input terminal of the first comparator is connected to the control voltage terminal of the phase-locked loop circuit, the output terminal of the first comparator is connected to the anode of the diode D1, and the cathode of the diode D1 is the output terminal of the frequency detection circuit. The inverting input terminal of the second comparator is connected to the control voltage terminal of the phase-locked loop circuit, the non-inverting input terminal of the second comparator is connected to the second reference voltage, the output terminal of the second comparator is connected to the anode of the diode D2, and the cathode of the diode D2 is connected to the cathode of the diode D1.

3. A UPS power supply control system as claimed in claim 1, characterized in that: The voltage detection circuit includes a third comparator, a fourth comparator, a diode D4 and a diode D3, The inverting input terminal of the third comparator is connected to the third reference voltage, the non-inverting input terminal of the third comparator is connected to the output terminal of the voltage acquisition circuit, the output terminal of the third comparator is connected to the anode of the diode D4, and the cathode of the diode D4 is the output terminal of the voltage detection circuit. The inverting input terminal of the fourth comparator is connected to the output terminal of the voltage acquisition circuit, the non-inverting input terminal of the fourth comparator is connected to the fourth reference voltage, the output terminal of the fourth comparator is connected to the anode of the diode D3, and the cathode of the diode D3 is connected to the cathode of the diode D4.

4. A UPS power supply control system as claimed in claim 1, characterized in that: The current detection circuit includes a fifth comparator, a sixth comparator, a diode D5 and a diode D6. The inverting input terminal of the fifth comparator is connected to the fifth reference voltage, the non-inverting input terminal of the fifth comparator is connected to the output terminal of the current acquisition circuit, the current acquisition circuit is configured to collect the mains current, the output terminal of the fifth comparator is connected to the anode of the diode D5, and the cathode of the diode D5 is the output terminal of the current detection circuit. The inverting input terminal of the sixth comparator is connected to the output terminal of the current acquisition circuit, the non-inverting input terminal of the sixth comparator is connected to the sixth reference voltage, the output terminal of the sixth comparator is connected to the anode of the diode D6, and the cathode of the diode D6 is connected to the cathode of the diode D5.

5. A UPS power supply control system as claimed in claim 1, characterized in that: It also includes a battery charging circuit and a temperature detection circuit, wherein the temperature detection circuit is used to detect the battery temperature, and the battery charging circuit includes a switch tube. The control circuit of the switch tube includes a first subtraction circuit, a second subtraction circuit and a seventh comparator which are connected in sequence, wherein the non-inverting input terminal of the first subtraction circuit is connected to the seventh reference voltage, the inverting input terminal of the first subtraction circuit is connected to the output terminal of the temperature detection circuit, the output terminal of the first subtraction circuit is connected to the inverting input terminal of the second subtraction circuit, the non-inverting input terminal of the second subtraction circuit is connected to the output terminal of the battery charging circuit, the output terminal of the second subtraction circuit is connected to the non-inverting input terminal of the seventh comparator, the inverting input terminal of the seventh comparator is connected to the output terminal of the triangular wave generator, and the output terminal of the seventh comparator is connected to the control terminal of the switch tube.

6. A UPS power supply control system as claimed in claim 5, characterized in that: An amplifier circuit is provided between the output end of the temperature detection circuit and the inverting input end of the first subtraction circuit.