Dual-power three-level Darlington current amplification circuit

Abstract

The utility model discloses a dual-power three-stage Darlington current amplification circuit, belongs to the technical field of special power supplies for power semiconductor tests, and solves the problem of how to improve the current source efficiency of a power semiconductor device conduction voltage drop test. According to the pulse current source, a mode of double power supplies and a three-stage Darlington tube is adopted, the first power supply VCC supplies power to the triode Q1 and the triode Q2, the second power supply BT1 supplies power to the triode Q3, the triode Q1, the triode Q2 and the triode Q3 form a three-stage amplification circuit, the amplification factor can reach 100,000 times, the efficiency of the power supplies can reach 90.9%, and the pulse current source is efficient, low in cost and large in voltage range; and three-stage amplification can be expanded in parallel, and a plurality of three-stage amplification units are connected in parallel, so that the test requirement of higher power can be met.

Description

Technical Field

[0001] The utility model belongs to the technical field of special power supplies for power semiconductor testing, and relates to a dual-power three-stage Darlington current amplification circuit. Background Art

[0002] With the development of technology, the applications of power semiconductor IGBT and MOSFET modules have been gradually popularized. During the device R & D process, manufacturing process and before application, it is necessary to evaluate their reliability. During the testing process, different electrical conditions need to be applied to the device under test to measure its performance under specific electrical conditions, such as insulation ability and conduction loss and other information. In conventional testing, there is a test called on-state voltage drop test, and its method is to apply a given current to the device under test and measure the voltage difference generated on the device under test when this current flows through it. Since the current for this test is very large (1000A - 4000A) while the test time is very short (usually 500 - 1000uS), a special power supply is required to provide this current. Summary of the Utility Model

[0003] The technical solution of the utility model is used to solve the problem of how to improve the current source efficiency of the on-state voltage drop test of power semiconductor devices.

[0004] The utility model solves the above technical problems through the following technical solutions:

[0005] A dual-power three-stage Darlington current amplification circuit, comprising: a first power supply VCC, a second power supply BT1, an operational amplifier U1A, a resistor R1, a capacitor C2, a feedback resistor R21, a sampling resistor R22, a triode Q1, a capacitor C1, a resistor R3, a resistor R4, a triode Q2, a triode Q3, a diode D1, a resistor R5, a resistor R13; one end of the 1 # pin of the operational amplifier U1A is connected to one end of the resistor R1, and the 3 # pin of the operational amplifier U1A is connected to one end of the sampling resistor R22, and both ends of the capacitor C2 are respectively connected to the 1 # pin and the 2 #Pin connection: The other end of resistor R1 is connected to the base of transistor Q1. Both ends of capacitor C1 are respectively connected to the base and the collector of transistor Q1. One end of resistor R3 is connected to the base of transistor Q1, the other end of resistor R3 is connected to one end of resistor R4, and the other end of resistor R4 is connected to GND. The emitter of transistor Q1 is connected to the base of transistor Q2, and the emitter of transistor Q2 is connected between resistor R3 and resistor R4. The power supply terminal of operational amplifier U1A, the collector of transistor Q1, and the collector of transistor Q2 are all connected to the first power supply VCC; One end of resistor R5 is connected to the emitter of transistor Q2, the other end of resistor R5 is connected to the base of transistor Q3, the collector of transistor Q3 is connected to the positive pole of the second power supply BT1, the anode of diode D1 is connected to the emitter of transistor Q3, the cathode of diode D1 is connected to the collector of transistor Q3, one end of resistor R13 is connected to the emitter of transistor Q3, the other end of resistor R13 is connected to one end of feedback resistor R21, and the other end of feedback resistor R21 is respectively connected to the other end of sampling resistor R22 and one end of the device under test. The other end of the device under test is connected to the negative pole of the second power supply BT1; A wire is led out between resistor R13 and feedback resistor R21 and connected to the GND terminal of resistor R4.

[0006] The advantages of the present utility model are as follows:

[0007] The present utility model adopts the method of dual power supplies plus three-stage Darlington tubes. The first power supply VCC supplies power to transistors Q1 and Q2, and the second power supply BT1 supplies power to transistor Q3. Transistors Q1, Q2, and Q3 form a three-stage amplification circuit, and the amplification factor can reach 100,000 times. The efficiency of the power supply can reach 90.9%. It is a high-efficiency, low-cost, and large-voltage-range pulsed current source; moreover, the three-stage amplification can be expanded in parallel. Multiple three-stage amplification units are connected in parallel to meet the test requirements for greater power. Description of the Drawings

[0008] Figure 1 It is the schematic diagram of the dual-power three-stage Darlington current amplification circuit in the first embodiment of the present utility model;

[0009] Figure 2 It is the schematic diagram of the dual-power three-stage Darlington current amplification circuit in which the three-stage amplification in the first embodiment of the present utility model is expanded in parallel to four. Detailed Implementation Manner

[0010] To make the objectives, technical solutions, and advantages of the embodiments of the present utility model clearer, the technical solutions in the embodiments of the present utility model will be clearly and completely described below in conjunction with the embodiments of the present utility model. Obviously, the described embodiments are some, but not all, of the embodiments of the present utility model. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present utility model without creative efforts fall within the protection scope of the present utility model.

[0011] The technical solutions of the present utility model will be further described below in conjunction with the accompanying drawings of the specification and specific embodiments:

[0012] Embodiment 1

[0013] As Figure 1 shown, a dual-power triple Darlington current amplification circuit of this embodiment includes: a first power supply VCC, a second power supply BT1, an operational amplifier U1A, a resistor R1, a capacitor C2, a feedback resistor R21, a sampling resistor R22, a triode Q1, a capacitor C1, a resistor R3, a resistor R4, a triode Q2, a triode Q3, a diode D1, a resistor R5, a resistor R13, and a device under test.

[0014] The 1 # pin of the operational amplifier U1A is connected to one end of the resistor R1, and the 3 # pin of the operational amplifier U1A is connected to one end of the sampling resistor R22. Both ends of the capacitor C2 are respectively connected to the 1 # pin and the 2 #Pin connection: The other end of resistor R1 is connected to the base of transistor Q1. Both ends of capacitor C1 are respectively connected to the base and collector of transistor Q1. One end of resistor R3 is connected to the base of transistor Q1, the other end of resistor R3 is connected to one end of resistor R4, and the other end of resistor R4 is connected to GND. The emitter of transistor Q1 is connected to the base of transistor Q2, and the emitter of transistor Q2 is connected between resistor R3 and resistor R4. The power supply terminal of operational amplifier U1A, the collector of transistor Q1, and the collector of transistor Q2 are all connected to the first power supply VCC, and the first power supply VCC supplies power to operational amplifier U1A, transistor Q1, and transistor Q2. One end of resistor R5 is connected to the emitter of transistor Q2, the other end of resistor R5 is connected to the base of transistor Q3, the collector of transistor Q3 is connected to the positive pole of the second power supply BT1, the anode of diode D1 is connected to the emitter of transistor Q3, the cathode of diode D1 is connected to the collector of transistor Q3, one end of resistor R13 is connected to the emitter of transistor Q3, the other end of resistor R13 is connected to one end of feedback resistor R21, the other end of feedback resistor R21 is respectively connected to the other end of sampling resistor R22 and one end of the device under test, and the other end of the device under test is connected to the negative pole of the second power supply BT1. A wire is led out between resistor R13 and feedback resistor R21 and connected to the GND terminal of resistor R4.

[0015] The working principle of the circuit is as follows:

[0016] When the input current control signal I_set is less than 0, it will drive operational amplifier U1A to output a positive voltage, providing a positive current for the base of transistor Q1. This current is amplified by transistor Q1. The amplified current output from the emitter of transistor Q1 is input to the base of transistor Q2 for further amplification. The amplified current output from the emitter of transistor Q2 is input to the base of transistor Q3 for the third amplification. The current output from the emitter of transistor Q3 is sent to the device under test to test the device under test; and operational amplifier U1A, transistor Q1, and feedback resistor R21 are based on a floating GND and maintain a potential similar to the current inlet end of the device under test.

[0017] Suppose the device under test requires a current of 1000A, and the amplification factors of both transistor Q1 and transistor Q2 are 100 times, and the amplification factor of transistor Q3 is 10 times. Then the total amplification factor of the three-stage amplification is 100×100×10 = 100000 times. That is, the base current of transistor Q1 is 1000A÷100000 = 0.01A, the collector current of transistor Q1 is 100×0.01A = 1A, the base current of transistor Q2 is 1A, and the collector current of transistor Q2 is 100×1A = 100A.

[0018] Since the collectors of both transistor Q1 and transistor Q2 are powered by the first power supply VCC, the current that the first power supply VCC needs to provide is 101A, approximately equal to 100A, and this 100A does not flow through the device under test. At this time, all 1000A of the current of the device under test is provided by the second power supply BT1. Therefore, the efficiency of the power supply is 1000A÷(1000A + 100A)≈90.9%.

[0019] As Figure 2 shown, the three-stage amplification unit based on transistor Q3 can be expanded in parallel. Multiple three-stage amplification units in parallel can meet the test requirements for greater power.

[0020] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements on some of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A dual-power three-stage Darlington current amplifier circuit, characterized in that: include: The first power supply VCC, the second power supply BT1, the operational amplifier U1A, the resistor R1, the capacitor C2, the feedback resistor R21, the sampling resistor R22, the transistor Q1, the capacitor C1, the resistor R3, the resistor R4, the transistor Q2, the transistor Q3, the diode D1, the resistor R5, the resistor R13; the operational amplifier U1A 1 # pin is connected to one end of resistor R1, and the 3 # The pin is connected to one end of the sampling resistor R22, and the two ends of the capacitor C2 are connected to the 1 # Pin, 2 # The pins are connected, the other end of the resistor R1 is connected to the base of the transistor Q1, the two ends of the capacitor C1 are respectively connected to the base and collector of the transistor Q1, one end of the resistor R3 is connected to the base of the transistor Q1, the other end of the resistor R3 is connected to one end of the resistor R4, the other end of the resistor R4 is connected to GND, the emitter of the transistor Q1 is connected to the base of the transistor Q2, the emitter of the transistor Q2 is connected between the resistor R3 and the resistor R4, the power supply end of the operational amplifier U1A, the collector of the transistor Q1, and the collector of the transistor Q2 are all connected to the first power supply VCC; one end of the resistor R5 is connected to the emitter of the transistor Q2, and the emitter of the resistor R5 is connected to the base of the transistor Q2. The other end is connected to the base of the transistor Q3, the collector of the transistor Q3 is connected to the positive electrode of the second power supply BT1, the anode of the diode D1 is connected to the emitter of the transistor Q3, the cathode of the diode D1 is connected to the collector of the transistor Q3, one end of the resistor R13 is connected to the emitter of the transistor Q3, the other end of the resistor R13 is connected to one end of the feedback resistor R21, the other end of the feedback resistor R21 is respectively connected to the other end of the sampling resistor R22 and one end of the device under test, and the other end of the device under test is connected to the negative electrode of the second power supply BT1; a wire is led out between the resistor R13 and the feedback resistor R21 and connected to the GND end of the resistor R4.

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