Optical component-on-board device, main gateway and FTTR system

Abstract

The utility model provides an optical component on-board device, a main gateway and an FTTR system, and belongs to the technical field of optical communication. The optical component on-board device comprises a receiving component and a single board, a plurality of pins included in the receiving component comprise a reset pin, the distance between every two pins meets the direct insertion welding condition, and the receiving component can be in direct insertion welding with the single board through the plurality of pins. The receiving assembly and the single board can be fixedly connected through direct insertion welding, and reset processing can be rapidly carried out due to the reset pins, so that high-speed optical signals are received suddenly.

Description

Technical Field

[0001] This application relates to the field of optical communication technologies, and particularly to an optical component on-board device, a main gateway, and an FTTR system. Background Art

[0002] With the development of optical fiber communication technologies, in order to meet users' better Internet access requirements, the Fiber To The Room (FTTR) technology has emerged. In the FTTR technology, a main gateway and multiple sub-gateways are deployed in a household. The main gateway is connected to the incoming optical fiber, and the main gateway and multiple sub-gateways are respectively connected by optical fibers. Each sub-gateway is located in a room. The main gateway includes a first optical component on-board device and a second optical component on-board device. The first optical component on-board device is connected to an Optical Line Terminal (OLT) through the incoming optical fiber and continuously receives signals. The second optical component on-board device is connected to each sub-gateway. During upstream communication, each sub-gateway time-division transmits optical signals to the second optical component on-board device. The second optical component on-board device burst-receives the optical signals transmitted by each sub-gateway, converts the optical signals into electrical signals, and sends them to the first optical component on-board device. The first optical component on-board device modulates the electrical signals into optical signals and sends them to the OLT.

[0003] Currently, in the main gateway, generally signals with a transmission rate below 10G are transmitted, and the second optical component on-board device uses 5 pins. However, with the development of optical fiber communication technologies, it is also possible to transmit optical signals with a transmission rate of 10G and above. Therefore, it is necessary to provide an optical component on-board device that can burst-receive optical signals with a rate of 10G and above. Summary of the Utility Model

[0004] This application provides an optical component on-board device, a main gateway, and an FTTR system, which can achieve burst reception of high-rate optical signals. The technical solutions adopted are as follows:

[0005] In a first aspect, this application provides an optical component on-board device. The optical component on-board device includes a receiving component and a single board. The receiving component includes multiple pins, among which there is a reset pin. The center distance between every two pins meets the through-hole soldering condition. The receiving component is through-hole soldered to the single board through the multiple pins.

[0006] In the solution shown in this application, in the receiving component, the center distance between every two pins meets the through-hole soldering condition, so the receiving component can be fixedly connected to the single board through through-hole soldering. Moreover, in the receiving component, there is a reset pin among the multiple pins, which can perform a reset process quickly, thereby burst-receiving high-rate optical signals.

[0007] In an alternative embodiment, the through-hole soldering condition is that the minimum center distance between pins is greater than 1.17 mm, so that the pins will not affect each other when multiple pins are soldered to the single board through holes.

[0008] In an alternative embodiment, the number of the multiple pins is 6. The multiple pins further include a power pin, a photodiode power supply pin, a pair of high-speed signal pins, and a ground pin; the pair of high-speed signal pins are symmetric with respect to the ground pin.

[0009] In an alternative embodiment, the reset pin is adjacent to the positive pin of the pair of high-speed pins and is also adjacent to the photodiode power supply pin. The power pin is adjacent to the photodiode power supply pin and is also adjacent to the negative pin of the pair of high-speed pins; or, the reset pin is adjacent to the positive pin and is also adjacent to the power pin. The photodiode power supply pin is adjacent to the power pin and is also adjacent to the negative pin. In this way, multiple possible distributions of the pins are provided.

[0010] In an alternative embodiment, the center distance between the ground pin and the positive pin is 1.46 mm, and the center distance between the reset pin and the positive pin is 1.40 mm. In this way, possible distances between the pins are provided.

[0011] In an alternative embodiment, the reset pin is adjacent to the negative pin of the pair of high-speed pins and is also adjacent to the power pin. The photodiode power supply pin is adjacent to the positive pin of the pair of high-speed pins and is also adjacent to the power pin; or, the reset pin is adjacent to the negative pin and is also adjacent to the photodiode power supply pin. The power pin is adjacent to the positive pin and is also adjacent to the photodiode power supply pin. In this way, multiple possible distributions of the pins are provided.

[0012] In an alternative embodiment, the reset pin is adjacent to the power pin and is also adjacent to the photodiode power supply pin. The photodiode power supply pin is adjacent to the positive pin of the pair of high-speed pins. The power pin is adjacent to the negative pin of the pair of high-speed signal pins; or, the reset pin is adjacent to the power pin and is also adjacent to the photodiode power supply pin. The power pin is adjacent to the positive pin. The photodiode power supply pin is adjacent to the negative pin. In this way, multiple possible distributions of the pins are provided.

[0013] In an alternative embodiment, the first distance is greater than the second distance and greater than the third distance. The first distance is the center distance between the ground pin and the positive pin. The second distance is the center distance between the positive pin and a pin other than the ground pin among adjacent pins. The third distance is the center distance between the negative pin and a pin other than the ground pin among adjacent pins.

[0014] In the solution shown in this application, since the ground pin dissipates heat relatively quickly, the center distance between the ground pin and other pins should be set larger to prevent solder bridging.

[0015] In an alternative embodiment, the receiving component is a receiving component for receiving optical signals with a transmission rate of 10G or higher.

[0016] In a second aspect, this application provides a main gateway. The gateway includes the optical component on-board device in the first aspect above, or in any alternative embodiment of the first aspect.

[0017] In a third aspect, this application provides an FTTR system. The FTTR system includes a main gateway and a sub-gateway. The main gateway includes the optical component on-board device in the first aspect above, or in any alternative embodiment of the first aspect. The main gateway is connected to the sub-gateway through the optical component on-board device. The main gateway is used to connect to the in-house optical fiber.

[0018] In the solution shown in this application, in the optical component on-board device where the main gateway is connected to the sub-gateway, among the multiple pins included in the receiving component, there is a reset pin. The center distance between every two pins meets the through-hole soldering condition. The receiving component can be through-hole soldered to the single board through multiple pins. In this way, not only can the receiving component be fixedly connected to the single board through through-hole soldering, but also there is a reset pin, enabling quick reset processing, so that the main gateway can receive high-speed optical signals suddenly. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 is a schematic diagram of an optical communication system provided by an exemplary embodiment of this application;

[0020] Figure 2 is a schematic diagram of the structure of an optical component on-board device provided by an exemplary embodiment of this application;

[0021] Figure 3 is a schematic diagram of the structure of a receiving component provided by an exemplary embodiment of this application;

[0022] Figure 4 is a schematic diagram of the distribution of pins provided by an exemplary embodiment of this application;

[0023] Figure 5It is a schematic diagram of the pin distribution provided by another exemplary embodiment of the present application;

[0024] Figure 6 It is a schematic diagram of the pin distribution provided by yet another exemplary embodiment of the present application;

[0025] Figure 7 It is a schematic diagram of the pin distribution provided by yet another exemplary embodiment of the present application;

[0026] Figure 8 It is a schematic diagram of the pin distribution provided by yet another exemplary embodiment of the present application;

[0027] Figure 9 It is a schematic diagram of the pin distribution provided by yet another exemplary embodiment of the present application;

[0028] Figure 10 It is a schematic diagram of the pin distribution provided by yet another exemplary embodiment of the present application;

[0029] Figure 11 It is a schematic diagram of the structure of an optical transceiver module provided by an exemplary embodiment of the present application;

[0030] Figure 12 It is a networking schematic diagram of FTTR provided by an exemplary embodiment of the present application.

[0031] Illustration

[0032] 1. Receiving component; 2. Single board; 3. Sending component; 4. Wave plate;

[0033] 11. Base; 12. Transimpedance amplifier; 13. Detector. Detailed implementation manners

[0034] To make the objectives, technical solutions, and advantages of the present application clearer, the following will further describe the embodiments of the present application in detail with reference to the accompanying drawings.

[0035] In the field of optical communication, an optical network terminal (ONT) is an important terminal device on the customer side. FTTR is a new form of the ONT application scenario. In this new form, optical fibers are laid and covered in each room of the user, meeting the user's better Internet access needs. Specifically, see Figure 1In the FTTR scenario of the passive optical network (PON), the ONT side includes a main gateway and at least one sub-gateway. The main gateway is connected to the home optical fiber, and the home optical fiber is connected to the optical distribution network (ODN). The optical distribution network includes at least one level of splitter. The optical distribution network is connected to the optical line terminal (OLT). The main gateway is connected to each sub-gateway through optical fiber. The sub-gateway is deployed in the room, and different sub-gateways are deployed in different rooms. The terminal equipment in the room determines the gateway with the best signal quality through quality detection, and connects to the gateway wirelessly, or the user uses a network cable to connect the terminal equipment to the gateway. The gateway is a sub-gateway or a main gateway.

[0036] During downlink communication, the OLT sends a downlink optical signal to the ONT side by broadcasting. The main gateway receives the downlink optical signal, converts the downlink optical signal into an electrical signal, determines the sub-gateway to which the electrical signal belongs, converts the electrical signal into an optical signal, and sends it to the sub-gateway. The sub-gateway converts the received optical signal into an electrical signal and sends it to the terminal device to which it belongs.

[0037] During uplink communication, the terminal device sends the uplink data to the connected gateway. If the gateway is a sub-gateway, the sub-gateway modulates the uplink data onto an optical signal and sends the optical signal to the main gateway. The main gateway converts the optical signal into an electrical signal, then converts the electrical signal into an optical signal, and sends the optical signal to the OLT via the fiber optic cable. If the gateway is a main gateway, the main gateway modulates the uplink data onto an optical signal and sends the optical signal to the OLT via the fiber optic cable.

[0038] In this way, during downlink communication, if the terminal device to which the downlink data belongs is connected to the sub-gateway, the main gateway first performs an optoelectronic conversion, and then performs an electro-optical conversion. During uplink communication, if the terminal device to which the uplink data belongs is connected to the sub-gateway, the main gateway first performs an optoelectronic conversion, and then performs an electro-optical conversion. The main gateway includes two optical component on-board devices, namely a first optical component on-board device and a second optical component on-board device. The first optical component on-board device is connected to the home optical fiber, and the second optical component on-board device is connected to each sub-gateway. For the first optical component on-board device, since it is always connected to the home optical fiber, it is a continuous reception, and for the second optical component on-board device, when it is connected to multiple sub-gateways, multiple sub-gateways send uplink data in time division multiplexing, so the second optical component on-board device receives the uplink data sent by each sub-gateway in burst reception, so the second optical component on-board device needs to have burst reception capability. For high-speed burst reception, a reset pin needs to be set in the second optical component on-board device to achieve high-speed burst reception. For example, for burst reception at a rate of 10G or higher, a reset pin needs to be provided in the second optical component on the board device. The reset pin is used to help a trans-impedance amplifier (TIA) for burst reception to quickly adjust gain so as to receive signals.

[0039] In the current optical modules with reset pins, a soft board is used to connect the receiving component and the single board. The soft board connection is not conducive to device welding, and there is no fixed connection between the receiving component and the single board.

[0040] Based on this, an embodiment of the present application provides an optical component on-board device, in which a receiving component and a single board are directly welded by pins, which is not only conducive to device welding, but also can fix the receiving component to the single board.

[0041] The optical component on-board device provided in the embodiment of the present application can be used not only for burst reception with high-rate requirements, but also for burst reception with low-rate requirements.

[0042] Figure 2 Provides a schematic diagram of the structure of the optical component on the board. Figure 2, The optical component on-board device includes a receiving component 1 and a single board 2. The receiving component 1 includes a plurality of pins, among which there is a reset pin. The center distance between every two pins among the plurality of pins meets the through-hole soldering condition, and the through-hole soldering condition is the condition that the center distance between pins satisfies when the pins are soldered through holes. For example, the cross-section of the pins is circular, and the center distance between pins is the distance between the centers of the cross-sections of the pins. There are jacks on the single board 2 that match the positions of the plurality of pins for the plurality of pins to be inserted. The receiving component 1 is soldered to the single board 2 through these plurality of pins, which not only realizes the electrical connection between the receiving component 1 and the single board 2, but also realizes the fixed connection between the receiving component 1 and the single board 2.

[0043] In addition, the single board 2 also includes a laser driver for driving the laser.

[0044] In an alternative manner, the through-hole soldering condition is that the minimum center distance between pins is greater than 1.17 mm. In this way, the center distance between every two pins is greater than 1.17 mm. For example, the minimum center distance between the plurality of pins is 1.40 mm.

[0045] In an alternative manner, the number of the plurality of pins is 6. The plurality of pins include a reset pin, a power supply pin, a voltage photodiode (VPD) pin, a pair of high-speed signal pins, and a ground pin. The power supply pin is also called the volt current condenser (VCC) pin. The pair of high-speed signal pins includes a positive pin and a negative pin. The ground pin is also called the ground (GND) pin. The power supply pin is used for power supply. The voltage photodiode pin is used to supply power to the photo-diode (PD). The pair of high-speed signal pins is used to receive a pair of high-speed differential signals.

[0046] When the plurality of pins are arranged, the pair of high-speed signal pins are symmetric about the ground pin.

[0047] In an alternative manner, Figure 3 A structural schematic diagram of the receiving component 1 is provided. Refer to Figure 3 , The receiving component 1 includes a base 11, a transimpedance amplifier 12, and a detector 13. Among them, the plurality of pins are arranged on the base 11. A pair of high-speed signal pins among the plurality of pins are both connected to the transimpedance amplifier 12. The pair of high-speed signal pins includes a TIA+ pin and a TIA- pin. The TIA+ pin is the positive pin, and the TIA- pin is the negative pin. The transimpedance amplifier 12 is connected to the detector 13. The detector 13 is a photodiode type detector. When the receiving component 1 receives an optical signal, the detector 13 converts the optical signal into an electrical signal and sends it to the transimpedance amplifier 12. The transimpedance amplifier 12 amplifies the electrical signal and sends it to the single board 2 through this pair of high-speed signal pins.

[0048] Optionally, the material of the base 11 can be an alloy or the like.

[0049] In an alternative embodiment, Figures 4 to 9 a schematic diagram of the distribution of a plurality of pins on the base 11 is provided. In Figures 4 to 9 it, the base 11 is cylindrical. Refer to Figure 4 , the reset pin is adjacent to the TIA+ pin, the reset pin is also adjacent to the photodiode power supply pin, the power supply pin is adjacent to the photodiode power supply pin, the power supply pin is also adjacent to the TIA- pin, the TIA+ pin and the TIA- pin are located on both sides of the ground pin and are symmetric about the ground pin.

[0050] Refer to Figure 5 , the reset pin is adjacent to the TIA+ pin, the reset pin is also adjacent to the power supply pin, the power supply pin is adjacent to the photodiode power supply pin, the photodiode power supply pin is also adjacent to the TIA- pin, the TIA+ pin and the TIA- pin are located on both sides of the ground pin and are symmetric about the ground pin.

[0051] Refer to Figure 6 , the reset pin is adjacent to the power supply pin, and the reset pin is adjacent to the TIA- pin, the photodiode power supply pin is adjacent to the power supply pin, and the photodiode power supply pin is adjacent to the TIA+ pin, the TIA+ pin and the TIA- pin are located on both sides of the ground pin and are symmetric about the ground pin.

[0052] Refer to Figure 7 , the reset pin is adjacent to the photodiode power supply pin, and the reset pin is adjacent to the TIA- pin, the photodiode power supply pin is adjacent to the power supply pin, the power supply pin is adjacent to the TIA+ pin, the TIA+ pin and the TIA- pin are located on both sides of the ground pin and are symmetric about the ground pin.

[0053] Refer to Figure 8 , the reset pin is adjacent to the power supply pin, and the reset pin is adjacent to the photodiode power supply pin, the photodiode power supply pin is adjacent to the TIA+ pin, the power supply pin is adjacent to the TIA- pin, the TIA+ pin and the TIA- pin are located on both sides of the ground pin and are symmetric about the ground pin.

[0054] Refer to Figure 9 , the reset pin is adjacent to the power supply pin, and the reset pin is adjacent to the photodiode power supply pin, the power supply pin is adjacent to the TIA+ pin, the photodiode power supply pin is adjacent to the TIA- pin, the TIA+ pin and the TIA- pin are located on both sides of the ground pin and are symmetric about the ground pin.

[0055] In the embodiments of the present application, in Figures 4 to 9Among the several distribution methods shown, as long as the center distance between the pins is greater than 1.17 mm, the specific value can be set according to actual needs, and the present application has no limitation on this.

[0056] Optionally, in Figure 4 the arrangement shown, the embodiments of the present application also provide the possible center distances between the pins. Refer to Figure 10 , the center distance between the ground pin and the TIA+ pin is 1.46 mm, the center distance between the ground pin and the TIA- pin is 1.46 mm, the center distance between the TIA+ pin and the reset pin is 1.40 mm, and the center distance between the photodiode power supply pin and the reset pin is 1.40 mm.

[0057] In an optional manner, in order to prevent solder bridging during soldering, the first distance is set to be greater than the second distance and greater than the third distance. The first distance is the center distance between the ground pin and the TIA+ pin, the second distance is the center distance between the TIA+ pin and the pin other than the ground pin among the adjacent pins, and the third distance is the center distance between the TIA- pin and the pin other than the ground pin among the adjacent pins. This is because the ground pin dissipates heat relatively quickly. If the center distance between the ground pin and the adjacent pins is relatively close, then the solder of the ground pin is easily melted during soldering, resulting in solder bridging.

[0058] In an optional manner, the optical component on-board device is a transceiver-integrated device, that is, the optical component on-board device is a bidirectional optical sub-assembly on Board (BOB) device. In the optical component on-board device, the optical transceiver component further includes a transmitting component 3 and a wave plate 4. The transmitting component 3 can be connected to the single board 2 through a flexible board, or the transmitting component 3 can be connected to the single board 2 by direct insertion soldering. Refer to Figure 11 , the receiving component 1 is located on the reflected light path of the wave plate 4. The wavelength of the optical signal received by the receiving component 1 is wavelength a, the transmitting component 3 is located on the transmitted light path of the wave plate 4, and the wavelength of the optical signal transmitted by the transmitting component 3 is wavelength b. Wavelength a and wavelength b are different. Assume that the optical signal transmitted by the optical component on-board device is called the first optical signal, and the optical signal received is called the second optical signal. When the optical component on-board device transmits the first optical signal, the first optical signal is transmitted through the wave plate 4 and coupled to the optical fiber connected to the optical component on-board device for output. When the optical component on-board device receives the second optical signal, the second optical signal is reflected by the wave plate 4 and then incident on the receiving component 1, and the receiving component 1 receives the second optical signal.

[0059] In addition, the receiving component 1 may further include structures such as a tube cap, and the tube cap has an optical window for optical signal input.

[0060] In an embodiment of the present application, a gateway is also provided, the gateway comprising the optical component on-board device provided above. The gateway can be a main gateway in an FTTR, or can be another gateway for burst reception.

[0061] In the embodiment of the present application, a FTTR system is also provided. The FTTR system includes a main gateway and a sub-gateway. Figure 12 , the main gateway is connected to the home optical fiber, and the home optical fiber is connected to the optical module in the OLT. The main gateway includes a first optical component on-board device and an optical component on-board device provided above (referred to as a second optical component on-board device). The main gateway is connected to each sub-gateway through the second optical component on-board device. When the second optical component on-board device is connected to multiple sub-gateways, the second optical component on-board device receives optical signals from multiple sub-gateways in time division. For example, the second optical component on-board device is connected to two sub-gateways, and the two sub-gateways include a first sub-gateway and a second sub-gateway. The second optical component on-board device receives the optical signal sent by the first sub-gateway, and then receives the optical signal sent by the second sub-gateway. At this time, the reset pin helps the TIA in the second optical component on-board device to quickly adjust the gain to receive the optical signal sent by the second sub-gateway.

[0062] The first optical component on-board device can be the optical component on-board device provided in the embodiment of the present application, or it can be a 5-pin optical component on-board device. The embodiment of the present application is not limited. The 5-pin optical component on-board device includes a power pin, a photodiode power supply pin, a pair of high-speed signal pins and a ground pin, but does not include a reset pin.

[0063] Each sub-gateway includes an optical component on-board device. Since each sub-gateway is continuously receiving, the optical component on-board device can be the optical component on-board device provided in the embodiment of the present application, or it can be a 5-pin optical component on-board device, which is not limited in the embodiment of the present application.

[0064] The pins mentioned in the embodiments of the present application may be referred to as pins or pins. In addition, the main gateway and sub-gateway mentioned in the embodiments of the present application may also be referred to as optical modems.

[0065] In the embodiment of the present application, the ONT may also be considered as an optical network unit (ONU).

[0066] In this application, terms such as "first" and "second" are used to distinguish identical or similar items with basically the same functions and effects. It should be understood that there is no logical or chronological dependency between "first" and "second", nor are the quantity and execution order limited. It should also be understood that although the following description uses terms such as "first" and "second" to describe various elements, these elements should not be limited by the terms. These terms are only used to distinguish one element from another. For example, without departing from the scope of various examples, the first distance can be referred to as the second distance, and similarly, the second distance can be referred to as the first distance. Both the first distance and the second distance can be distances, and in some cases, they can be separate and different distances.

[0067] In this application, the meaning of the term "at least one" refers to one or more, and the meaning of the term "a plurality of" refers to two or more.

[0068] The above description is only an exemplary embodiment of this application, but the protection scope of this application is not limited thereto. Any person skilled in the art in the technical field disclosed in this application can easily think of various equivalent modifications or substitutions, and these modifications or substitutions should be covered within the protection scope of this application. Therefore, the protection scope of this application shall be subject to the protection scope of the claims.

Claims

1. An optical component on board device, characterized in that: The optical component on-board device comprises a receiving component (1) and a single board (2); The receiving component (1) comprises a plurality of pins, the plurality of pins comprising a reset pin, and the center distance between every two pins of the plurality of pins meets the direct insertion welding condition; The receiving component (1) is directly plug-welded to the single board (2) via the multiple pins.

2. The optical component on-board device according to claim 1, characterized in that: The direct plug welding condition is that the minimum center distance between the pins is greater than 1.17 mm.

3. The optical component on-board device according to claim 1, characterized in that: The number of the plurality of pins is 6, and the plurality of pins further includes a power pin, a photodiode power supply pin, a pair of high-speed signal pins and a ground pin; The pair of high-speed signal pins are symmetrical with respect to the ground pin.

4. The optical component on-board device according to claim 3, characterized in that: The reset pin is adjacent to the positive pin of the pair of high-speed pins and to the photodiode power supply pin, and the power pin is adjacent to the photodiode power supply pin and to the negative pin of the pair of high-speed pins; or, the reset pin is adjacent to the positive pin and to the power pin, and the photodiode power supply pin is adjacent to the power pin and to the negative pin.

5. The optical component on-board device according to claim 4, characterized in that: The center distance between the ground pin and the positive pin is 1.46 mm, and the center distance between the reset pin and the positive pin is 1.40 mm.

6. The optical component on-board device according to claim 3, characterized in that: The reset pin is adjacent to the negative pin of the pair of high-speed pins and to the power pin, and the photodiode power pin is adjacent to the positive pin of the pair of high-speed pins and to the power pin; or, the reset pin is adjacent to the negative pin and to the photodiode power pin, and the power pin is adjacent to the positive pin and to the photodiode power pin.

7. The optical component on-board device according to claim 3, characterized in that: The reset pin is adjacent to the power pin and to the photodiode power pin, the photodiode power pin is adjacent to the positive pin of the pair of high-speed pins, and the power pin is adjacent to the negative pin of the pair of high-speed signal pins; or, the reset pin is adjacent to the power pin and to the photodiode power pin, the power pin is adjacent to the positive pin, and the photodiode power pin is adjacent to the negative pin.

8. The optical component-on-board device according to any one of claims 4 to 7, characterized in that: The first distance is greater than the second distance and greater than the third distance. The first distance is the center distance between the ground pin and the positive pin, the second distance is the center distance between the positive pin and adjacent pins except the ground pin, and the third distance is the center distance between the negative pin and adjacent pins except the ground pin.

9. The optical component-on-board device according to any one of claims 1 to 7, characterized in that: The receiving component (1) is a receiving component used for receiving optical signals with a transmission rate of 10G or above.

10. A master gateway, characterized in that: The main gateway comprises the optical component on-board device according to any one of claims 1 to 9.

11. A fiber to the room FTTR system, characterized in that: The device comprises a main gateway and a sub-gateway, wherein the main gateway comprises the optical component on-board device according to any one of claims 1 to 9, and the main gateway is connected to the sub-gateway through the optical component on-board device; The main gateway is used to connect to the household optical fiber.

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