Ceramic capacitor with MIM structure

Abstract

The utility model discloses a ceramic capacitor with an MIM structure, which comprises a dielectric layer, a first metal layer arranged at the bottom end of the dielectric layer, and a plurality of second metal layers uniformly arranged at the top end of the dielectric layer, and the cross section of each second metal layer is in a regular trapezoid shape. The area of the top surface of the second metal layer is limited, the area of the bottom surface of the regular trapezoid is larger, the connection with the dielectric layer is more stable, the edge of the second metal layer is not easy to tear off from the dielectric layer by the gold wire in the subsequent bonding process of the structure, and the reliability of the product is higher.

Description

Technical Field

[0001] The utility model relates to the technical field of capacitor production, in particular to a ceramic capacitor with a MIM structure. Background Art

[0002] At present, capacitors with a MIM (metal / insulating layer / metal) structure have received more and more attention from researchers due to their simple structure and good stability, and have been applied in various fields. In the production process of such capacitors, it is most common to sputter metal film layers on the upper and lower surfaces of a high-dielectric-constant insulating layer (such as ceramics, etc.). In this production process, due to the small size of the capacitor itself (in the range of several hundred micrometers), metal film layers are sputtered on a ceramic dielectric layer with a relatively large area (in the centimeter range), and finally, a wet etching patterning process is used to form the upper and lower electrodes of the micrometer-scale capacitor;

[0003] However, due to the isotropic etching characteristic of the etching solution, the wet etching process also has the characteristic of non-selectivity in all directions, resulting in lateral etching of the upper electrode of the produced capacitor, and the width of the middle and bottom of the upper electrode becomes smaller, forming a cross-section similar to an inverted trapezoid, which affects the reliability of the product. Summary of the Utility Model

[0004] In view of the above defects or deficiencies in the prior art, it is desirable to provide a ceramic capacitor with a MIM structure.

[0005] The embodiment of the present application provides a ceramic capacitor with a MIM structure, including:

[0006] A dielectric layer,

[0007] A first metal layer provided at the bottom end of the dielectric layer;

[0008] A plurality of second metal layers arranged and distributed along a first direction at the top end of the dielectric layer, and the cross-sectional shape of each second metal layer is a regular trapezoid.

[0009] According to the technical solution provided by the embodiment of the present application, both sides of each second metal layer along the first direction have a first inclined surface, and the included angle between each first inclined surface and the top surface of the dielectric layer is 95 - 124°.

[0010] Compared with the prior art, the beneficial effect of the utility model is:

[0011] In the utility model, electrodes are formed by the first metal layer and the second metal layer, and the cross-section of the second metal layer is a regular trapezoid. During the production of the capacitor, the top surface area of the upper electrode will be restricted, that is, the top surface area of the second metal layer is restricted, and the bottom surface area of the regular trapezoid is larger, and the connection with the dielectric layer is more stable. In the subsequent bonding process, the gold wire is less likely to tear the edge of the second metal layer from the dielectric layer, and the reliability of the product is higher.

[0012] It should be understood that the content described in the utility model content part is not intended to limit the key or important features of the embodiments of the present utility model, nor to limit the scope of the present utility model. Other features of the present utility model will become easily understood through the following description. Brief Description of the Drawings

[0013] By reading the detailed description of the non-restrictive embodiments with reference to the following drawings, other features, objectives, and advantages of the present utility model will become more obvious:

[0014] Figure 1 It is a flowchart of the steps of a production method of a ceramic capacitor with a MIM structure provided by an embodiment of the present application;

[0015] Figure 2 It is a schematic structural diagram of a first coating part in a production method of a ceramic capacitor with a MIM structure provided by an embodiment of the present application;

[0016] Figure 3 It is a schematic structural diagram of a non-exposed area and a forming area in a production method of a ceramic capacitor with a MIM structure provided by an embodiment of the present application;

[0017] Figure 4 It is a schematic structural diagram of a template part in a production method of a ceramic capacitor with a MIM structure provided by an embodiment of the present application;

[0018] Figure 5 It is a schematic structural diagram of a primary sputtering part in a production method of a ceramic capacitor with a MIM structure provided by an embodiment of the present application;

[0019] Figure 6 It is a schematic structural diagram of an intermediate part in a production method of a ceramic capacitor with a MIM structure provided by an embodiment of the present application;

[0020] Figure 7 It is a schematic structural diagram of a semi-finished product in a production method of a ceramic capacitor with a MIM structure provided by an embodiment of the present application;

[0021] Figure 8 It is a schematic structural diagram of a ceramic capacitor with a MIM structure provided by an embodiment of the present application.

[0022] Reference numerals in the drawings: 1, dielectric layer; 2, photoresist layer; 21, convex module; 22, non-exposed area; 23, forming area; 3, intermediate part; 31, first metal layer; 32, second metal layer; 33, third metal layer; 34, primary sputtering part; 4, template part; 41, first coating part; 5, ceramic capacitor; 51, semi-finished product. Detailed Description of the Embodiments

[0023] The present utility model will be further described in detail below in conjunction with the accompanying drawings and embodiments. It can be understood that the specific embodiments described herein are only used to explain the relevant utility model, rather than limiting the utility model. Additionally, it should be noted that for ease of description, only the parts related to the utility model are shown in the accompanying drawings.

[0024] It should be noted that, without conflict, the embodiments in the present utility model and the features in the embodiments can be combined with each other. The present utility model will be described in detail below with reference to the accompanying drawings and embodiments.

[0025] Embodiment 1

[0026] Please refer to Figure 8 , an embodiment of the present utility model provides a ceramic capacitor with a MIM structure, including:

[0027] A dielectric layer 1,

[0028] A first metal layer 31, provided at the bottom end of the dielectric layer 1;

[0029] A plurality of second metal layers 32, arranged and distributed along a first direction at the top end of the dielectric layer 1. The cross-sectional shape of each second metal layer 32 is a regular trapezoid, where the first direction is Figure 8 the left-right direction in

[0030] In actual production processes, the top surface area of the second metal layer 32 is restricted. However, the bottom surface area of the regular trapezoid of the second metal layer 32 is larger, and its connection with the dielectric layer 1 is more stable. During the subsequent bonding process, this structure makes it less likely for the gold wire to tear the edge of the second metal layer 32 from the dielectric layer 1, and the reliability of the product is higher; Figure 8 In some embodiments, both sides of each second metal layer 32 along the first direction have a first inclined surface, and the included angle between each first inclined surface and the top surface of the dielectric layer 1 is 95 - 124°, as shown in

[0031] Embodiment 2

[0032] Please refer to Figures 1 to 8 , an embodiment of the present utility model provides a production method of a ceramic capacitor with a MIM structure, including the following steps:

[0033] S100. Pretreatment, obtaining a ceramic plate, performing pretreatment on the ceramic plate to obtain a dielectric layer 1. The normal direction of the dielectric layer 1 is the first direction, and the first direction is Figure 2 the vertical direction in

[0034] S101. Obtain a ceramic plate, which is a preliminary blank after grinding and polishing. Herein, in this embodiment, the thickness of the ceramic plate is selected as 150 microns. Through grinding and polishing, the surface of the ceramic plate is ensured to be smooth and flat, facilitating subsequent coating of photoresist and sputtering of a metal layer.

[0035] S102. Place the ceramic plate in deionized water for cleaning for 5 minutes, and then place it in a cleaning solution for cleaning for 5 minutes, repeating 3 times. Clean the debris and dust on the surface of the ceramic plate to avoid interfering with subsequent processes.

[0036] S103. Place the cleaned ceramic plate in an oven at 120 °C for drying.

[0037] S104. Place the dried ceramic plate in a muffle furnace at 800 °C for calcining for 3 hours, and take it out and cool it down to form dielectric layer 1.

[0038] Among them, by calcining the ceramic plate, the carbon-containing organic substances inside the ceramic plate are eliminated, the situation of surface roughness caused by carbon-containing substances is reduced. At the same time, calcining can soften the surface of the ceramic plate, thereby repairing the microcracks on the surface of the ceramic plate caused by grinding, and repairing and eliminating the depressions left after removing the carbon-containing substances, reducing microcracks and depressions, and improving the integrity of dielectric layer 1.

[0039] S200. Photoresist treatment. Coat photoresist on the top surface of dielectric layer 1 and perform preliminary treatment to form template part 4. Template part 4 includes dielectric layer 1 and a plurality of convex modules 21 arranged along a second direction on dielectric layer 1, and the second direction is perpendicular to the first direction.

[0040] S201. Coat photoresist on the top surface of dielectric layer 1 to form a photoresist layer 2.

[0041] Among them, as Figure 2 shown, the photoresist is a negative photoresist. In this embodiment, the thickness of photoresist layer 2 is selected as 10 microns, and the RN218 series can be selected. Optionally, the photoresist can also be selected from the RN246 series, Az nLOF 2000 series, RPN-1150-90N1. Additionally, further optionally, spin coating or spraying is selected according to the thickness of photoresist layer 2 and the viscosity of the photoresist solution. For example, if the thickness of photoresist layer 2 is greater than 6 microns, the general coating method is spraying; if the thickness of photoresist layer 2 is less than 6 microns, the general coating method is spin coating, and the spin coating speed is 500 - 3000 rpm. Spin coating is more stable, and the spin coating speed is determined according to the actual thickness of photoresist layer 2. The smaller the speed, the thicker the coating.

[0042] S202. Perform pre-baking on photoresist layer 2, with the pre-baking temperature being 90 °C and the pre-baking time being 90 seconds.

[0043] Among them, pre-baking means that at the corresponding ambient temperature, the solvent in the photoresist layer 2 slowly and fully escapes, so that the photoresist layer 2 adheres better to the top of the dielectric layer 1;

[0044] S203. Divide the photoresist layer 2 into a formed area 23 and an unexposed area 22. The formed area 23 and the unexposed area 22 are arranged alternately along the second direction. The formed area 23 and the unexposed area 22 are as Figure 3 shown;

[0045] S204. Expose the photoresist in the formed area 23, and a raised module 21 is formed in the formed area 23;

[0046] Among them, as Figure 3 and Figure 4 shown, exposure means that the light emitted by the illumination light source is irradiated on the mask plate through the converging lens, and diffracted light beams are generated through the mask plate. These diffracted light beams carry the graphic information on the mask plate. The light beams are focused on the surface of the photoresist layer 2 through the projection lens, and an image of the mask pattern is formed on the surface of the photoresist layer 2. In this step, the unexposed area 22 is blocked, so that the photoresist in the softened state in the formed area 23 is cured.

[0047] S205. Remove the photoresist in the unexposed area 22 to form a template part 4;

[0048] Among them, this step is also called development, which is to dissolve the un-fixed photoresist, that is, the photoresist in the unexposed area 22, through the chemical developer, so as to achieve the purpose of retaining the raised module 21;

[0049] S300. Metal layer treatment. Sputter a metal layer on the top and bottom surfaces of the template part 4 to form an intermediate part 3. The intermediate part 3 includes the template part 4, a first metal layer 31 provided at the bottom end of the dielectric layer 1, several second metal layers 32 provided at the top end of the dielectric layer 1 and located between the raised modules 21, and several third metal layers 33 provided at the top ends of the respective raised modules 21;

[0050] S301. Sputter the top surface of the template part 4 to form a primary sputtered part 34. The primary sputtered part 34 includes the dielectric layer 1, several second metal layers 32 provided at the top end of the dielectric layer 1 and located between the raised modules 21, and several third metal layers 33 provided at the top ends of the respective raised modules 21. The primary sputtered part 34 is as Figure 5 shown;

[0051] S302. Sputter a metal layer on the bottom surface of the dielectric layer 1 in the primary sputtered part 34 to form an intermediate part 3. The intermediate part 3 is as Figure 6 shown;

[0052] Among them, as Figure 5 and Figure 6As shown, the sputtering vacuum degree for the two metal layer sputterings is 0.5 Pa, and the sputtering power is 400 - 1000 W to avoid metal ions during sputtering from damaging the dielectric layer 1 or the photoresist layer 2. The sputtering time is determined according to the thicknesses of the required first metal layer 31 and second metal layer 32. The longer the time, the thicker the metal layer.

[0053] S400. Final treatment, removing each protruding module 21 and each third metal layer 33 on the intermediate piece 3 to obtain the ceramic capacitor 5; the ceramic capacitor 5 is as Figure 8 shown.

[0054] In some embodiments, the thicknesses of the first metal layer 31, the second metal layer 32, and the third metal layer 33 are equal, and the thickness of the photoresist layer 2 is 1.5 - 3 times that of the first metal layer 31. Among them, according to the photoresist thickness of 10 microns, the thickness of the first metal layer 31 can be selected as 3.5 microns, as Figure 6 shown. The thicker photoresist layer 2 can separate the third metal layer 33 and the second metal layer 32 to avoid the situation where it is inconvenient to remove the third metal layer 33 due to their contact.

[0055] In some embodiments, the cross-section of the protruding module 21 is an inverted trapezoid, and the angle between the side surface of the inverted trapezoid and the top surface of the dielectric layer 1 is 56 - 85°;

[0056] Among them, the top of the photoresist in the forming area 23 is more likely to receive energy, while the bottom is less likely to receive energy. The top is cured more completely, and the bottom is less likely to be completely cured. The user sets the exposure dose according to the specific thickness of the photoresist layer 2, so that the top is completely cured, and only the central area of the bottom is cured, while the bottom edge is still in a non-softened state. After development, the remaining raised module 21 will present an inverted trapezoid with a larger top and a smaller bottom in cross-section. In this way, the angles between the first inclined surfaces on the left and right sides of the second metal layer 32 formed and the top surface of the dielectric layer 1 are 95-124°. Since the top surface area of the upper electrode is restricted during the production of the capacitor, that is, the top surface area of the second metal layer 32 is restricted, and the bottom surface area of the second metal layer 32 in a regular trapezoid is larger, which is more stable when connected to the dielectric layer 1. In the subsequent bonding process, the gold wire is less likely to tear the edge of the second metal layer 32 from the dielectric layer 1, and the reliability of the product is higher. Preferably, the angle between the side surface of the inverted trapezoid and the top surface of the dielectric layer 1 is 65°, and the angle between the side surface of the formed second metal layer 32 and the bottom surface of the dielectric layer is 115°. This can ensure the formation and strength of the second metal layer 32 without causing the adjacent second metal layers 32 to be too close. In addition, by first coating the photoresist, then sputtering the metal layer, and finally removing the photoresist and the excess metal layer, the second metal layer 32 of the ceramic capacitor 5 finally serves as the upper electrode of the capacitor. Compared with the wet etching process that uses an etching solution to erode the metal layer, the etching solution will laterally erode the upper electrode. In the present invention, the raised module 21 has been formed on the photoresist before the metal layer is sputtered, and the second metal layer 32 is located between the raised modules 21. The solution for removing the photoresist will not affect the second metal layer 32, effectively solving the problem of product instability caused by the wet etching process.

[0057] Example 3

[0058] On the basis of Example 2, step S400 in this example specifically includes the following steps:

[0059] S411. Cover the UV film on the top surface of the middleware 3, and the bottom surface of the UV film is adhered to the top surface of the third metal layer 33; among them, optionally, the adhesion of the UV film is 20 Newtons per 25 millimeters, and the thickness is 100 microns, and it has good adhesion.

[0060] S412. Peel off the UV film, driving the separation of the third metal layer 22 from the top of the raised module 21 to form a semi-finished product 51, as shown in the semi-finished product 51 Figure 7 shown;

[0061] S413. Immerse the semi-finished product 51 in the stripping solution for 2 minutes, and the temperature of the stripping solution is 40°C. Soften each raised module 21 through the stripping solution to reduce the adhesion between the raised module 21 and the dielectric layer 1;

[0062] S414. Take out the semi-finished product 51 after soaking, and remove each protruding module 21 on the semi-finished product 51 to form a ceramic capacitor 5 as Figure 8 shown.

[0063] Example 4

[0064] Based on Example 2, in this example, step S400 specifically includes the following steps:

[0065] S410. Immerse the middleware 3 in the stripping solution for 2 minutes, and the temperature of the stripping solution is 40°C to reduce the adhesion force between the third metal layer 33 and the protruding module 21, facilitating the subsequent removal of the third metal layer 33;

[0066] S411. Cover the top surface of the middleware 3 with a UV film, and the bottom surface of the UV film is bonded to the top surface of the third metal layer 33; wherein, optionally, the adhesion force of the UV film is 20 Newtons per 25 millimeters, and the thickness is 100 microns, and it has good adhesion.

[0067] S412. Peel off the UV film to drive the separation of the third metal layer 22 from the top of the protruding module 21 to form a semi-finished product 51, and the semi-finished product 51 is as Figure 7 shown;

[0068] S413. Immerse the semi-finished product 51 in the stripping solution for 2 minutes, and the temperature of the stripping solution is 40°C to soften each protruding module 21 through the stripping solution and reduce the adhesion force between the protruding module 21 and the dielectric layer 1;

[0069] S414. Take out the semi-finished product 51 after soaking, and remove each protruding module 21 on the semi-finished product 51 to form a ceramic capacitor 5 as Figure 8 shown.

[0070] Example 5

[0071] Based on Example 2, in this example, step S400 specifically includes the following steps:

[0072] S420. Immerse the middleware 3 in the stripping solution for 10 minutes, and the temperature of the stripping solution is 60°C. Through the long-time soaking, soften each protruding module 21 and fully reduce the adhesion force between the protruding module 21 and the dielectric layer 1, facilitating the subsequent direct removal of the protruding module 21 and the corresponding third metal layer 33 together;

[0073] S421. Take out the middleware 3 after soaking, and remove each protruding module 21 on the middleware 3 to form a ceramic capacitor 5 as Figure 8 shown.

[0074] In the description of this specification, terms such as "connection", "installation", "fixation", etc. should be understood in a broad sense. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be a direct connection or an indirect connection through an intermediate medium. For those of ordinary skill in the art, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0075] In the description of this specification, the description of terms such as "one embodiment", "some embodiments", etc. means that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of this application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or instance. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments or examples.

[0076] The above are only the preferred embodiments of this application and are not used to limit this application. For those skilled in the art, this application can have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of this application shall be included within the protection scope of this application.

Claims

1. A ceramic capacitor with a MIM structure, characterized in that: include: A dielectric layer (1), A first metal layer (31) is disposed at the bottom of the dielectric layer (1); A plurality of second metal layers (32) are arranged and distributed on the top of the dielectric layer (1) along a first direction, and each second metal layer (32) has a cross-sectional shape of a regular trapezoid.

2. The ceramic capacitor of the MIM structure according to claim 1, characterized in that: Each of the second metal layers (32) has a first inclined surface on both sides along the first direction, and the angle between each of the first inclined surfaces and the top surface of the dielectric layer (1) is 95-124°.

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