Test circuit and system

Abstract

The embodiment of the utility model discloses a test circuit and a test system, which are applied to electric leakage detection of a digital module in a chip, and comprise a power supply module and a first switch module which are respectively connected with the digital module, and the first switch module is also connected with a second power supply end; the control module is connected with the first switch module; and the first detection module is connected with the second power supply end. In the test mode, the power supply module stops supplying power to the digital module, the digital module is supplied with power specially through the second power supply end by conducting the first switch module, the current of the second power supply end is detected, and if the current is greater than the preset threshold value, there are many logic gates with abnormal process in the digital module. At the moment, the digital module has electric leakage abnormity, the electric leakage current of the digital module can be distinguished from other currents, defective products which possibly have functional defects of the digital module can be screened out, and the situation that the display screen is abnormal due to the fact that defective chip products are applied to the display screen is prevented.

Description

Technical Field

[0001] The utility model relates to the technical field of integrated circuits, and particularly relates to a test circuit and system. Background Art

[0002] At present, before the display driver chip leaves the factory, it is usually necessary to detect the chip to distinguish good products from defective products. However, some of the detected good chips may also have problems with abnormal chip functions. When the chips with abnormal functions are applied to the display screen, it will cause the display screen to be abnormal. Summary of the Utility Model

[0003] The purpose of the embodiment of the utility model is to provide a test circuit and system to solve the above problems.

[0004] The embodiment of the utility model realizes the above purpose through the following technical solutions.

[0005] The embodiment of the utility model provides a test circuit, which is applied to the leakage detection of the digital module in the chip and includes: a power supply module, whose input end is connected to the first power supply end, and whose output end is connected to the first power receiving end of the digital module. In the normal mode, the power supply module supplies power to the digital module; a first switch module, which is connected between the second power receiving end of the digital module and the second power supply end; a control module, which is connected to the first switch module and controls the first switch module to conduct in the test mode, and the second power supply end supplies power to the digital module; a first detection module, which is connected to the second power supply end and determines that the digital module leaks electricity when the current detected at the second power supply end is greater than a preset threshold.

[0006] In some embodiments, the control module is connected to the power supply module, and in the test mode, the power supply module is controlled by the control module to enter the sleep state.

[0007] In some embodiments, the test circuit may further include: a second switch module, which is connected between the output end of the power supply module and the first power receiving end of the digital module, and whose controlled end is connected to the control module. In the test mode, the control module controls the second switch module to turn off, and in the normal mode, the control module controls the second switch module to conduct.

[0008] In some embodiments, the voltage at the output end of the power supply module is greater than the voltage at the second power supply end.

[0009] In some embodiments, the first power receiving end is connected to the second power receiving end.

[0010] In some embodiments, the second power supply end is a data output port.

[0011] In some embodiments, in the test mode, the first detection module provides a test voltage for the data output port.

[0012] In some embodiments, the test circuit may further include: a second detection module, which is respectively connected to the sampling pin and the control module. When the second detection module detects that the electrical signal of the sampling pin meets the conditions, it sends a signal to enter the test mode to the control module.

[0013] In some embodiments, the power supply module is a low dropout linear regulator.

[0014] An embodiment of the present invention also provides a test system, which includes a display driver chip, a test device, and a test circuit as shown in any of the above embodiments. Among them, the power supply module, the digital module, the first switch module, and the control module in the test circuit are built in the display driver chip, and the first detection module in the test circuit is built in the test device.

[0015] The test circuit and system provided in this embodiment, in the test mode, stop the power supply module from supplying power to the digital module. By turning on the first switch module, specifically supply power to the digital module through the second power supply terminal, and detect the magnitude of the current at the second power supply terminal. If the current is greater than a preset threshold, it indicates that there are many logic gates with process abnormalities in the digital module, and it is very easy to have functional abnormalities. It is determined that there is a leakage abnormality in the digital module at this time, and the leakage current of the digital module can be distinguished from other currents, thereby screening out defective products that may have functional defects in the digital module, and preventing the situation where the defective chip is applied to the display screen and causes the display screen to be abnormal. Description of the Drawings

[0016] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the drawings required to be used in the description of the embodiments of the present invention. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0017] Figure 1 It is a schematic diagram of a common logic gate structure of a digital module in the prior art;

[0018] Figure 2 It is a schematic diagram of a module of the test circuit provided in this embodiment;

[0019] Figure 3 It is another schematic diagram of a module of the test circuit provided in this embodiment;

[0020] Figure 4 It is a schematic diagram of a circuit structure of the test circuit provided in this embodiment. Detailed Embodiments

[0021] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without making creative efforts shall fall within the protection scope of the present invention.

[0022] In order to more clearly understand the technical solutions in the embodiments of the present invention, the prior art described in the background art will be further elaborated below. After research, it is found that due to inevitable errors in the production process, some logic gate devices in the digital module of the chip will be abnormal. The abnormal logic gate devices will generate leakage current, and this leakage current is usually at the μA level. The leakage current generated by the normal logic gate devices is at the pA level and can be almost ignored. The following Figure 1 is an example. Transistor P1 and transistor N1 form logic gate one, and transistor P2 and transistor N2 form logic gate two. When there is a manufacturing defect in logic gate one, leakage current I1 can be generated, and this leakage current I1 is usually at the μA level. When logic gate two is normal, leakage current I2 will also be generated, but this leakage current I2 is usually at the pA level and can be ignored. When there are a large number of manufacturing abnormalities in the logic gates in the digital module, some functions of the chip may not work properly. In the current detection scheme, generally, the current of the chip pin is detected. Under normal conditions, the chip pin current is at the mA level. The current magnitude of the normal chip pin and the leakage current magnitude caused by manufacturing abnormalities are almost not in the same order of magnitude. By detecting the chip pin current, it is impossible to determine the logic gates with a large number of manufacturing abnormalities in the digital module part of the chip, and thus it is impossible to effectively screen the logic gates with serious leakage in the digital module. Based on this, the inventors of the present invention have conducted a large amount of research and proposed a test circuit and system to effectively solve the above defects.

[0023] As Figure 3 shown, a test circuit provided in this embodiment is applied to the leakage detection of the digital module 11 in the chip, and includes: a power supply module 12, whose input end is connected to the first power supply terminal A, and whose output end is connected to the first power receiving end of the digital module 11. In the normal mode, the power supply module 12 supplies power to the digital module 11; a first switch module 13, which is connected between the second power receiving end of the digital module 11 and the second power supply terminal B; a control module 14, which is connected to the first switch module 13 and controls the first switch module 13 to conduct in the test mode, and the second power supply terminal B supplies power to the digital module 11; a first detection module 15, which is connected to the second power supply terminal B and determines that the digital module 11 leaks electricity when the detected current of the second power supply terminal B is greater than a preset threshold.

[0024] In this embodiment, the chip can be a display driver chip, and the display driver chip includes a digital module 11. Among them, the digital module 11 can include multiple logic gate devices for implementing various logic functions.

[0025] In this embodiment, the first power supply terminal A can be a port through which an external power supply provides electrical energy to the power supply module 12. Specifically, the first power supply terminal A can be a power pin of the chip. The power supply module 12 can convert the electrical energy provided by the external power supply into electrical energy that the digital module 11 can use normally. For example, the power supply module 12 can be a low-dropout linear regulator to step down the voltage provided by the external power supply so that in the normal mode, the digital module 11 can work properly.

[0026] In this embodiment, the normal mode can be the state of the chip when it is working normally, and at this time, the power supply module 12 normally supplies power to the digital module 11. It should be noted that the normal mode and the test mode described in this embodiment are relative to the state of the digital module 11. Specifically, when the chip is normally applied to the display screen, the chip is usually in a normal working state, and the chip has usually been tested by the manufacturer. During the operation of the display screen, the chip is usually in the normal mode. During the chip testing process, there are multiple testing links. In each testing link, it is usually necessary to test each function of the chip, and different functions usually involve different functional modes in the chip. Therefore, the normal mode described in this embodiment can refer to the state when the digital module 11 is working normally, and the test mode can refer to the state of performing a leakage test on the digital module 11.

[0027] In this embodiment, the first switch module 13 can include one or more switches, and the specific manifestation form of the first switch module 13 is not specifically limited here. The first switch module 13 is controlled by the control module 14. When the first switch module 13 is turned on, the second power supply terminal B supplies power to the digital module 11; when the first switch module 13 is turned off, the second power supply terminal B stops supplying power to the digital module 11.

[0028] In this embodiment, the second power supply terminal B can be a port through which an external power supply provides electrical energy to the digital module 11. Specifically, the second power supply terminal B can be a pin in the chip. Specifically, when the chip is in the test mode, the control module 14 can control the second power supply terminal B to supply power to the digital module 11, rather than the power supply module 12 supplying power to the digital module 11. When the chip is in the normal mode, the control module 14 can control the first switch module 13 to turn off and supply power to the digital module 11 through the power supply module 12.

[0029] In this embodiment, the first detection module 15 can detect the magnitude of the current at the second power supply terminal B. When the current at the second power supply terminal B is greater than a preset threshold, it can be determined that there is a leakage abnormality in the digital module 11, which may also indicate that the function of the digital module 11 may be defective at this time, and the chip is a defective product. It should be noted that this embodiment does not specifically limit the method for the first detection module 15 to detect the magnitude of the current at the second power supply terminal B. The first detection module 15 can directly detect the magnitude of the current at the second power supply terminal B, or can obtain the magnitude of the current that can characterize the second power supply terminal B by detecting other electrical signals.

[0030] In this embodiment, in the test mode, the power supply module 12 is stopped from supplying power to the digital module 11. By turning on the first switch module 13, the digital module 11 is specifically powered through the second power supply terminal B, and the magnitude of the current at the second power supply terminal B is detected. If the current is greater than the preset threshold, it indicates that there are many logic gates with process abnormalities in the digital module 11, and it is very easy to have functional abnormalities. It is determined that there is a leakage abnormality in the digital module 11 at this time. The leakage current of the digital module 11 can be distinguished from other currents, thereby screening out defective products that may have functional defects in the digital module 11 and preventing the situation where defective chips are applied to the display screen and cause the display screen to be abnormal.

[0031] Furthermore, in some embodiments, the control module 14 can be connected to the power supply module 12. In the test mode, the power supply module 12 is controlled by the control module 14 to enter the sleep state. At this time, by controlling the power supply module 12 not to work, the digital module 11 cannot obtain the driving voltage through the power supply module 12.

[0032] Furthermore, in some embodiments, the test circuit may further include: a second switch module 16, which is connected between the output terminal of the power supply module 12 and the first power receiving terminal of the digital module 11, and its controlled terminal is connected to the control module 14. In the test mode, the control module 14 controls the second switch module 16 to turn off, and in the normal mode, the control module 14 controls the second switch module 16 to turn on.

[0033] Similarly, the second switch module 16 may include one or more switches, and the specific form of the second switch module 16 is not specifically limited here. The second switch module 16 is controlled by the control module 14. When the first switch module 13 is turned off and the second switch module 16 is turned on, the power supply module 12 supplies power to the digital module 11; when the first switch module 13 is turned on and the second switch module 16 is turned off, the second power supply terminal B supplies power to the digital module 11.

[0034] At this time, by controlling the second switch module 16 to turn off, the digital module 11 cannot obtain the driving voltage through the first power receiving terminal.

[0035] Further, in some embodiments, the output voltage of the power supply module 12 may be greater than the voltage of the second power supply terminal B.

[0036] Further, in some embodiments, the first power receiving terminal is connected to the second power receiving terminal. At this time, the digital module 11 is essentially a power receiving terminal, and this power receiving terminal is indirectly connected to the first power supply terminal A and the second power supply terminal B respectively.

[0037] Further, in some embodiments, the second power supply terminal B is a data output port. At this time, the data output port can be used for digital signal output in the normal mode and can also be used for detecting the leakage current of the digital module 11 under testing, without the need to additionally add pins in the chip for chip testing.

[0038] Further, in some embodiments, the first detection module 15 provides a test voltage for the data output port. The first detection module 15 can be used to provide voltage for the data output port to supply power to the digital module 11, and can also detect the leakage current of the digital module 11, thereby improving the simplicity of chip testing.

[0039] Further, in some embodiments, the test circuit may further include: a second detection module 17, which is respectively connected to the sampling pin C and the control module 14. When the second detection module 17 detects that the electrical signal of the sampling pin C meets the conditions, it sends a signal to enter the test mode to the control module 14.

[0040] In this embodiment, it is possible to determine whether the chip enters the test mode by detecting the voltage of the sampling pin C. Specifically, when the voltage of the sampling pin C is greater than the preset voltage, it indicates that an external voltage is applied to the sampling pin C, and this voltage can be used as a signal for the chip to enter the test mode.

[0041] Further, in some embodiments, the power supply module 12 may be a low dropout linear regulator.

[0042] The present utility model further provides a test system, which may include a display screen driving chip, a test device, and a test circuit as shown in any of the above embodiments. Among them, the power supply module 12, the digital module 11, the first switch module 13, and the control module 14 in the test circuit are built into the display screen driving chip, and the first detection module 15 in the test circuit is built into the test device.

[0043] Since the circuit structure and working mode of the test circuit in the test system in this embodiment are the same as those of the test circuit in the previous embodiment, they will not be elaborated here.

[0044] The above-described embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements on some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included within the protection scope of the present invention.

Claims

1. A test circuit, characterized in that, Applied to the leakage detection of digital modules in a chip, including: A power supply module, whose input terminal is connected to a first power supply terminal, and whose output terminal is connected to a first power receiving terminal of the digital module. In normal mode, the power supply module supplies power to the digital module; A first switch module, connected between a second power receiving terminal of the digital module and a second power supply terminal; A control module, connected to the first switch module, controlling the first switch module to conduct in test mode, and the second power supply terminal supplies power to the digital module; A first detection module, connected to the second power supply terminal, determining that the digital module leaks electricity when the current of the second power supply terminal is detected to be greater than a preset threshold.

2. The test circuit according to claim 1, wherein The control module is connected to the power supply module. In the test mode, the power supply module is controlled by the control module to enter the sleep state.

3. The test circuit according to claim 1, characterized in that, It further includes: A second switch module, connected between the output terminal of the power supply module and the first power receiving terminal of the digital module, and its controlled terminal is connected to the control module. In the test mode, the control module controls the second switch module to turn off, and in the normal mode, the control module controls the second switch module to conduct.

4. The test circuit according to claim 1, wherein The output terminal voltage of the power supply module is greater than the voltage of the second power supply terminal.

5. The test circuit according to claim 1, characterized in that The first power receiving terminal is connected to the second power receiving terminal.

6. The test circuit according to claim 1, wherein The second power supply terminal is a data output port.

7. The test circuit according to claim 6, wherein In the test mode, the first detection module provides a test voltage for the data output port.

8. The test circuit according to claim 1, characterized in that It further includes: A second detection module, respectively connected to a sampling pin and the control module. When the second detection module detects that the electrical signal of the sampling pin meets the conditions, it sends a signal to enter the test mode to the control module.

9. The test circuit according to claim 1, wherein The power supply module is a low-dropout linear regulator.

10. A test system, characterized in that, Including a display driver chip, a test device, and a test circuit according to any one of claims 1 to 8, wherein the power supply module, digital module, first switch module, and control module in the test circuit are built in the display driver chip, and the first detection module in the test circuit is built in the test device.

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