SMD (Surface Mount Device) piezoresistor
By introducing a removable pin design into the patch varistor, the complex replacement process in the prior art is solved, and a simplified circuit maintenance process is achieved.
Patent Information
- Application Number
- CN202421836399.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-31
- Publication Date
- 2025-07-04
- Estimated Expiration
- 2034-07-31
AI Technical Summary
The existing patch varistor needs to be replaced with melted solder, which is complicated to operate and may damage the circuit board.
The pin design with a removable connection is simplified by setting the elastic slot at the lower end of the electrode sheet and the card head at the top of the pin to simplify the replacement process.
The damaged varistor can be replaced without the need for tin soldering, improving circuit maintenance efficiency.
Smart Images

Figure CN223065935U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of chip resistors, in particular to a chip varistor. Background Art
[0002] A varistor is a voltage-limiting protection device. Utilizing the non-linear characteristic of the varistor, when an overvoltage appears between the two poles of the varistor, the varistor can clamp the voltage to a relatively fixed voltage value, thereby realizing the protection of the subsequent circuit.
[0003] Chinese Patent with publication number CN209880295U discloses an integrated chip varistor, including a housing, a copper sheet, and a circular varistor chip. The copper sheet is connected to the electrodes at both ends of the circular varistor chip; the circular varistor chip is completely wrapped by the housing; the copper sheet includes a first copper sheet and a second copper sheet, and one end of the first copper sheet and the second copper sheet extends out of the upper part of the housing, and the extended part is bent and attached to the housing.
[0004] Compared with the traditional method of hiding the copper sheet by attaching it to the housing, when attaching the integrated chip varistor, the copper sheet will not be exposed, improving the safety performance of the product.
[0005] However, during use, if the resistor is damaged and needs to be replaced, the entire resistor needs to be removed from the circuit board by melting the solder for replacement. The whole process is not only complicated in operation, but also may damage the circuit board during the process of melting and soldering the solder.
[0006] Therefore, we propose a chip varistor. Summary of the Utility Model
[0007] The purpose of the utility model is to provide a chip varistor, thereby solving or at least alleviating one or more of the above problems and other problems existing in the prior art.
[0008] To achieve the above purpose, the main technical solutions adopted by the utility model include:[[]]
[0009] A chip varistor, comprising:[[]]
[0010] An insulating housing and a varistor chip, the varistor chip is fixed inside the insulating housing, electrode plates are electrically connected to the top and bottom of the varistor chip respectively, slots are opened at both ends of the bottom of the insulating housing, and the lower ends of the electrode plates extend into the slots;
[0011] Pins, there are two pins, the upper ends of the two pins are respectively inserted into the corresponding slots, the upper ends of the pins are detachably electrically connected to the lower ends of the electrode plates, and the lower ends of the pins are arranged at the bottom of the insulating housing.
[0012] In a patch type varistor according to the present utility model, a resilient card slot in the shape of Ω is formed at the lower end of the electrode plate, a card head is formed at the upper end of the lead, and the card head can be snapped into the interior of the resilient card slot.
[0013] In a patch type varistor according to the present utility model, the lead is arranged in an L shape, the top of the lower end of the lead is attached to the bottom of the insulating housing, and the bottom of the lead extends beyond the bottom of the insulating housing.
[0014] In a patch type varistor according to the present utility model, a plurality of circular grooves are formed at the bottom of the lead.
[0015] In a patch type varistor according to the present utility model, a solder blocking strip for separating the two leads is formed in the middle of the bottom of the insulating housing.
[0016] In a patch type varistor according to the present utility model, notches are formed on both sides of the lower end of the insulating housing.
[0017] The present utility model at least has the following beneficial effects:
[0018] By means of the resilient card slot arranged at the lower end of the electrode plate and the card head arranged at the top of the lead, the present utility model realizes the detachable connection between the lead and the electrode plate. When the varistor chip is damaged, only the electrode plate and the lead need to be separated, and the lead remains fixed on the circuit board. Just insert a new varistor on the lead, without the need for soldering operations. The operation is simple, greatly improving the circuit repair efficiency. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] The drawings described herein are used to provide a further understanding of the present application, and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application, and do not constitute an improper limitation of the present application. In the drawings:
[0020] Figure 1 is a schematic structural view of the patch type varistor of the present utility model;
[0021] Figure 2 is a schematic cross-sectional structural view of the present utility model;
[0022] Figure 3 is Figure 2 an enlarged schematic structural view of part A in
[0023] Explanation of the reference numerals in the drawings:
[0024] 1. Varistor chip; 2. Electrode plate; 201. Elastic card slot; 3. Pin; 301. Card head; 302. Round groove; 4. Insulating housing; 401. Slot; 402. Tin blocking strip; 403. Notch. Detailed implementation manners
[0025] The following will describe in detail the implementation manners of the present application in conjunction with the drawings and embodiments, so as to fully understand how the present application uses technical means to solve technical problems and achieve the implementation process of technical effects and implement accordingly.
[0026] Please refer to Figures 1 to 3 As shown, this embodiment provides a surface-mounted varistor, including an insulating housing 4, a varistor chip 1 and two pins 3. The varistor chip 1 is fixed inside the insulating housing 4. Electrodes 2 are electrically connected to the top and bottom of the varistor chip 1. Slots 401 are opened at both ends of the bottom of the insulating housing 4. The lower ends of the electrode plates 2 extend into the slots 401. There are two pins 3. The upper ends of the two pins 3 are respectively inserted into the corresponding slots 401. The upper ends of the pins 3 are detachably electrically connected to the lower ends of the electrode plates 2. The lower ends of the pins 3 are arranged at the bottom of the insulating housing 4. An elastic card slot 201 in the shape of Ω is formed at the lower end of the electrode plate 2. A card head 301 is formed at the upper end of the pin 3. The card head 301 can be inserted into the elastic card slot 201.
[0027] Working principle: During installation, insert the upper end of the pin 3 into the corresponding slot 401, and then press down the insulating housing 4 so that the elastic card slot 201 at the lower end of the electrode plate 2 contacts the card head 301. As the elastic card slot 201 moves downward continuously, the opening of the elastic card slot 201 expands continuously, and then the card head 301 is inserted into the elastic card slot 201 to realize the connection between the pin 3 and the electrode plate 2;
[0028] During disassembly, just pull up the insulating housing 4 forcefully, so that the elastic card slot 201 generates an upward pulling force, and then an extrusion is generated between the elastic card slot 201 and the card head 301, so that the opening of the elastic card slot 201 expands, and then the card head 301 is separated from the elastic card slot 201, and then the separation between the varistor and the pin 3 is completed. Then, insert a new varistor onto the pin 3. The entire maintenance process does not require soldering operation, greatly improving the circuit maintenance efficiency.
[0029] In this embodiment, the pin 3 is arranged in an L shape. The top of the lower end of the pin 3 is attached to the bottom of the insulating housing 4, and the bottom of the pin 3 extends beyond the bottom of the insulating housing 4. By arranging the lower end of the pin 3 at the bottom of the insulating housing 4, the volume of the entire varistor is further reduced. By arranging the bottom of the pin 3 to extend beyond the bottom of the insulating housing 4, the pin 3 can fully contact the pads on the circuit board.
[0030] Specifically, a plurality of circular grooves 302 are formed at the bottom of the pin 3. Through this setting, the pin 3 can be in contact with more solder, thereby improving the firmness of the welding between the pin 3 and the solder pad.
[0031] Specifically, notches 403 are formed on both sides of the lower end of the insulating housing 4. Through the provided notches 403, it is convenient to use tweezers to clamp both sides of the insulating housing 4, and thus it is convenient to remove the varistor from the pin 3.
[0032] The above description shows and describes several preferred embodiments of the present invention. However, as mentioned above, it should be understood that the present invention is not limited to the form disclosed herein, should not be regarded as excluding other embodiments, but can be used in various other combinations, modifications and environments, and can be changed within the scope of the inventive concept described herein through the above teachings or the technology or knowledge in related fields. Any changes and modifications made by those skilled in the art without departing from the spirit and scope of the present invention shall fall within the protection scope of the appended claims of the present invention.
Claims
1. A chip varistor, characterized in that, Comprising: An insulating housing (4) and a varistor chip (1), the varistor chip (1) being fixed inside the insulating housing (4), electrode plates (2) being electrically connected to both the top and bottom of the varistor chip (1), slots (401) being formed at both ends of the bottom of the insulating housing (4), and the lower ends of the electrode plates (2) extending into the interiors of the slots (401); Leads (3), there being two leads (3), the upper ends of the two leads (3) being respectively inserted into the corresponding slots (401), the upper ends of the leads (3) being detachably electrically connected to the lower ends of the electrode plates (2), and the lower ends of the leads (3) being disposed at the bottom of the insulating housing (4).
2. The chip varistor according to claim 1, wherein: An elastic card slot (201) shaped like an Ω is formed at the lower end of the electrode plate (2), and a card head (301) is formed at the upper end of the lead (3), and the card head (301) can be snapped into the interior of the elastic card slot (201).
3. The surface mount varistor according to claim 2, wherein: The lead (3) is arranged in an L shape, the top of the lower end of the lead (3) is in contact with the bottom of the insulating housing (4), and the bottom of the lead (3) extends beyond the bottom of the insulating housing (4).
4. A patch varistor according to claim 3, characterized in that: A plurality of circular grooves (302) are formed at the bottom of the lead (3).
5. A patch varistor according to claim 3, characterized in that: A solder blocking strip (402) for separating the two leads (3) is formed in the middle of the bottom of the insulating housing (4).
6. A patch varistor according to claim 4, characterized in that: Notches (403) are formed on both sides of the lower end of the insulating housing (4).
Citation Information
Patent Citations
Integrated chip varistor
CN209880295U