Phase-locked control device, phase-locked loop and power grid system
The phase lock control device generates in-phase, quadrature and DC component signals, and determines the target phase locking phase angle, solving the problems of hysteresis and low accuracy during the phase locking process, achieving fast and high-precision phase locking control, ensuring that the inverter is synchronized with the power grid, and improving the stability of the power system.
Patent Information
- Application Number
- CN202422048115.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-22
- Publication Date
- 2025-07-04
- Estimated Expiration
- 2034-08-22
AI Technical Summary
In the phase locking process, the prior art results in the problems of phase locking control lag, slow reaction speed and low phase locking accuracy due to the symmetry of the signal during the period or the accuracy of filter parameter selection.
The phase lock control device determines the target phase lock phase angle using the in-phase signal, a phase quadrature signal and a DC component signal separated from it, and controls the phase lock loop to be controlled using the first branch, a second branch and a third branch, respectively, and generates the same-phase signal, a quadrature signal and a DC component signal, and combines the phase lock control module to achieve precise control.
It realizes simple, fast and high-precision phase lock control, eliminates DC component interference, improves the reaction speed and accuracy of the phase lock loop, ensures that the inverter is synchronized with the power grid, and improves the stability of the power system.
Smart Images
Figure CN223067094U_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present utility model relate to the technical field of phase-locked control, and in particular, to a phase-locked control device, a phase-locked loop and a power grid system. Background Art
[0002] An inverter is a device that converts direct current into alternating current and is widely used in the conversion process after solar panels convert solar energy into direct current. A Phase Locked Loop (PLL) is a control system used to extract frequency and phase information, and it plays a key role in achieving synchronous control between the grid voltage and the output voltage of the inverter in a three-phase inverter. Specifically, the main function of the phase-locked loop is to extract frequency and phase information from the grid voltage, compare it with the output voltage of the inverter, and continuously adjust the output frequency and phase of the inverter to keep it synchronized with the grid voltage, thereby achieving efficient conversion of electrical energy. This synchronous control mechanism ensures that the alternating current output by the inverter is synchronized with the voltage of the public grid, avoiding fluctuations and instability in the power system and improving the stability and efficiency of the power system.
[0003] However, during the phase-locking process, there may be interference from the DC component. The DC component will affect the power quality of the grid, cause voltage waveform distortion, and increase the total harmonic distortion of the grid; the DC component will be transmitted through the grid and may cause damage to some devices sensitive to DC current, such as certain types of motors and electronic devices; the DC component may also interfere with the normal operation of the phase-locked loop, affect the synchronization between the inverter and the grid, and thus affect the stability of the entire power system.
[0004] At present, technologies such as the periodic accumulation method or the low-pass filtering method are mostly used to suppress the DC component to ensure the accuracy of the phase-locked loop. However, due to the dependence on the symmetry of the signal within one period, the periodic accumulation method may not be accurate enough for asymmetric or non-periodic signals. The low-pass filtering method requires selecting appropriate filter parameters to ensure that both high-frequency components can be effectively filtered out and the changes in the DC component can be quickly responded to. Moreover, both of these methods have the disadvantages of control lag and slow response speed, resulting in inaccurate phase locking. Summary of the Utility Model
[0005] The embodiments of the present utility model provide a phase-locked control device, a phase-locked loop and a power grid system, which solve the technical problems of phase-locked control lag, slow response speed and low phase-locking accuracy caused by relying on the symmetry of the signal within the period or the accuracy of filter parameter selection in the prior art during the phase-locking process.
[0006] An embodiment of the present utility model provides a phase-locked control device. The phase-locked control device includes a first branch for generating a first output signal in the same phase as a first input signal, a second branch for generating a second output signal orthogonal to the first input signal, a third branch for extracting a third output signal from the first input signal, and a phase-locked control module;
[0007] The first branch, the second branch, and the third branch are all connected to a phase-locked loop to be controlled through the phase-locked control module;
[0008] The first input signal is an alternating current signal of a target phase-locked signal, and the third output signal is a direct current component in the first input signal;
[0009] The phase-locked control module is configured to determine a target phase-locked phase angle by using the first output signal, the second output signal, and the third output signal, and control the phase-locked loop to be controlled by using the target phase-locked phase angle.
[0010] Further, the second branch includes a first adder, a gain regulator, a second adder, a first multiplier, a first integrator, a second multiplier, and a second integrator connected in sequence;
[0011] Wherein, the positive input terminal of the first adder is connected to the first input signal, and the negative input terminal of the first adder is connected to the first output signal; the output terminal of the first adder is connected to the input terminal of the gain regulator;
[0012] The positive input terminal of the second adder is connected to the output terminal of the gain regulator, and the negative input terminal of the second adder is connected to the second output signal; the output terminal of the second adder is connected to the first input terminal of the first multiplier, and the second input terminal of the first multiplier is connected to a second input signal, and the second input signal is an angular frequency signal of the target phase-locked signal;
[0013] The input terminal of the first integrator is connected to the output terminal of the first multiplier; the output terminal of the first integrator is connected to the first input terminal of the second multiplier, and the output terminal of the first integrator outputs the first output signal; the second input terminal of the second multiplier is connected to the second input signal;
[0014] The input terminal of the second integrator is connected to the output terminal of the second multiplier, and the output terminal of the second integrator outputs the second output signal.
[0015] Further, the third branch includes a third adder, a third multiplier, and a third integrator connected in sequence;
[0016] The positive input terminal of the third adder is connected to the output terminal of the gain regulator, and the negative input terminal of the third adder receives the third output signal; the output terminal of the third adder is connected to the first input terminal of the third multiplier, and the second input terminal of the third multiplier receives the second input signal;
[0017] The output terminal of the third multiplier is connected to the input terminal of the third integrator, and the output terminal of the third integrator outputs the third output signal.
[0018] Further, the phase-locked control module includes a signal processing sub-module and a phase-locked control sub-module; the signal processing sub-module is connected to the phase-locked control sub-module;
[0019] The signal processing sub-module is used to determine the target phase-locked phase angle by using the first output signal, the second output signal and the third output signal;
[0020] The phase-locked control sub-module is used to control the phase-locked loop to be controlled by using the target phase-locked phase angle.
[0021] Further, the signal processing sub-module includes a subtraction unit, a park transformation unit, a PI adjustment unit and an integration unit;
[0022] The subtraction unit is used to subtract the second output signal from the third output signal to obtain a first target signal;
[0023] The park transformation unit is used to perform park transformation on the first target signal and the first output signal to obtain a second target signal;
[0024] The PI adjustment unit is used to perform proportional-integral adjustment on the second target signal to obtain a third target signal;
[0025] The integration unit is used to integrate the third target signal to obtain the target phase-locked phase angle.
[0026] Further, the phase-locked control module further includes a signal acquisition sub-module;
[0027] The signal acquisition sub-module is connected to the signal processing sub-module; the signal acquisition sub-module is connected to the power grid system to which the inverter where the phase-locked loop to be controlled is to be connected to the grid;
[0028] The signal acquisition sub-module acquires the target phase-locked signal through the power grid system and sends the target phase-locked signal to the signal processing sub-module.
[0029] An embodiment of the present invention further provides a phase-locked loop, and the phase-locked loop includes the phase-locked control device described in any of the above embodiments.
[0030] An embodiment of the present utility model further provides a power grid system, the power grid system includes an inverter, and the inverter includes the phase-locked loop described in any of the above embodiments.
[0031] An embodiment of the present utility model discloses a phase-locked control device, a phase-locked loop and a power grid system. The control device includes a first branch for generating a first output signal in the same phase as the first input signal, a second branch for generating a second output signal orthogonal to the first input signal, a third branch for extracting a third output signal from the first input signal, and a phase-locked control module; the first input signal is an AC signal of a target phase-locked signal, and the third output signal is a DC component in the first input signal; the phase-locked control module is used to determine a target phase-locked phase angle by using the first output signal, the second output signal and the third output signal, and use the target phase-locked phase angle to control the phase-locked loop to be controlled. By using the in-phase signal, the orthogonal signal and the DC component signal separated therefrom of the target phase-locked signal to determine the target phase-locked phase angle and using the target phase-locked phase angle to control the phase-locked loop to be controlled, the present utility model solves the technical problems of phase-locked control lag, slow response speed and low phase-locked accuracy caused by relying on the symmetry of the signal in the period or the accuracy of the filter parameter selection in the prior art during the phase-locking process, and realizes the technical effect of simply, quickly and accurately controlling the phase-locked loop. Description of the Drawings
[0032] Figure 1 is a structural diagram of a phase-locked control device provided by an embodiment of the present utility model;
[0033] Figure 2 is a schematic diagram of each input and output signal of the phase-locked control device provided by an embodiment of the present utility model;
[0034] Figure 3 is a circuit diagram of a phase-locked control device provided by an embodiment of the present utility model;
[0035] Figure 4 is a schematic diagram of an intermediate quantity of the signal processed by the phase-locked control module provided by an embodiment of the present utility model. Detailed Embodiments
[0036] The present utility model will be further described in detail below with reference to the drawings and embodiments. It can be understood that the specific embodiments described herein are only used to explain the present utility model, rather than limiting the present utility model. Additionally, it should be noted that for the sake of description, only parts related to the present utility model rather than all structures are shown in the drawings.
[0037] It should be noted that the terms "first", "second", etc. in the description, claims and drawings of the present utility model are used to distinguish different objects, rather than to limit a specific order. Each of the following embodiments of the present utility model can be executed independently, and the embodiments can also be combined with each other for execution. The embodiments of the present utility model do not make specific limitations in this regard.
[0038] The phase-locking function of the inverter phase-locked loop is a key step to ensure that the output voltage of the inverter is synchronized with the voltage of the target power grid system to be grid-connected. Usually, it needs to go through processes such as signal detection, signal conversion, and phase-locked loop initialization.
[0039] Specifically, the inverter needs to detect the voltage signal of the target power grid system, usually including the measurement of three-phase voltages; then convert the detected three-phase voltage signals to a two-phase stationary coordinate system or a two-phase rotating coordinate system through mathematical transformations (such as Clarke transformation, Park transformation, etc.). These transformations help to simplify the subsequent processing process; finally, initialize the phase-locked loop and set the initial phase and frequency of the phase-locked loop. Among them, the basic components of the phase-locked loop include a phase detector (PD), a loop filter (LF), and a voltage controlled oscillator (VCO).
[0040] Based on this, in order to make the set initial phase and frequency of the phase-locked loop more accurate, it is necessary to process the detected three-phase voltage signals, remove the DC components therein, and ensure the accuracy of the phase-locking of the phase-locked loop.
[0041] Figure 1 It is a structural diagram of a phase-locking control device provided by an embodiment of the present utility model.
[0042] As Figure 1 shown, the phase-locking control device includes a first branch 10 for generating a first output signal u1 in the same phase as the first input signal u, a second branch 20 for generating a second output signal u2 orthogonal to the first input signal u, a third branch 30 for extracting a third output signal u3 from the first input signal u, and a phase-locking control module 40.
[0043] The first branch 10, the second branch 20, and the third branch 30 are all connected to the phase-locked loop 50 to be controlled through the phase-locking control module 40; the first input signal u is an AC signal of the target phase-locking signal, and the third output signal u3 is the DC component in the first input signal u; the phase-locking control module 40 is used to determine the target phase-locking phase angle θ by using the first output signal u1, the second output signal u2, and the third output signal u3, and to control the phase-locked loop to be controlled by using the target phase-locking phase angle θ.
[0044] Specifically,Figure 2 It is a schematic diagram of the input and output signals of the phase-locked control device provided by the embodiment of the present utility model. As Figure 2 shown, the first input signal u is an AC signal of the target phase-locked signal. The target phase-locked signal is usually the three-phase voltage signals of the target power grid system to which the inverter where the phase-locked loop is located is to be connected to the grid. The first input signal u is input into the second branch 20 of the phase-locked control device. After being processed by the components on the second branch 20, a second output signal u2 orthogonal to the first input signal u is generated. At the same time, after being processed by the components on the third branch 30, the DC component in the first input signal u is separated to obtain a third output signal u3. Finally, the target phase-locked phase angle θ is determined through the first output signal u1, the second output signal u2, and the third output signal u3, and the target phase-locked phase angle θ is used to initialize the phase-locked loop to be controlled, so that the phase-locked loop to be controlled operates at this phase angle, realizing that the voltage of the inverter can be accurately synchronized with the voltage of the target power grid system and achieving grid connection.
[0045] The phase-locked control device provided by the embodiment of the present utility model can not only eliminate the DC component in the target phase-locked signal, but also has a certain inhibitory effect on harmonics. When the grid voltage of the target power grid system is not ideal, such as problems such as the existence of DC bias and high voltage harmonics, accurate phase locking can still be achieved through the phase-locked control device. At the same time, zero delay in tracking the input signal (i.e., the target phase-locked signal) is realized, avoiding the occurrence of control lag.
[0046] The present utility model determines the target phase-locked phase angle by using the in-phase signal, the quadrature signal, and the DC component signal separated therefrom of the target phase-locked signal, and controls the phase-locked loop to be controlled by using the target phase-locked phase angle, solving the technical problems of phase-locked control lag, slow response speed, and low phase-locked accuracy caused by the prior art relying on the symmetry of the signal within the period or the accuracy of filter parameter selection during the phase-locking process, and achieving the technical effect of simply, quickly, and accurately controlling the phase-locked loop.
[0047] Figure 3 It is a circuit diagram of a phase-locked control device provided by the embodiment of the present utility model.
[0048] As Figure 3 shown, the second branch 20 includes a first adder s1, a gain regulator g1, a second adder s2, a first multiplier p1, a first integrator i1, a second multiplier p2, and a second integrator i2 connected in sequence.
[0049] Among them, the positive input terminal + of the first adder s1 is connected to the first input signal u, and the negative input terminal - of the first adder s1 is connected to the first output signal u1; the output terminal of the first adder s1 is connected to the input terminal of the gain regulator g1.
[0050] The positive input terminal + of the second adder S2 is connected to the output terminal of the gain regulator G1, and the negative input terminal - of the second adder S2 receives the second output signal u2; the output terminal of the second adder S2 is connected to the first input terminal of the first multiplier P1, and the second input terminal of the first multiplier P1 receives the second input signal w, where the second input signal w is the angular frequency signal of the target phase-locked signal.
[0051] The input terminal of the first integrator I1 is connected to the output terminal of the first multiplier P1; the output terminal of the first integrator I1 is connected to the first input terminal of the second multiplier P2, and the output terminal of the first integrator I1 outputs the first output signal u1; the second input terminal of the second multiplier P2 receives the second input signal u2.
[0052] The input terminal of the second integrator I2 is connected to the output terminal of the second multiplier P2, and the output terminal of the second integrator I2 outputs the second output signal u2.
[0053] Optionally, as Figure 3 shown, the third branch 30 includes a third adder S3, a third multiplier P3, and a third integrator I3 connected in sequence.
[0054] The positive input terminal + of the third adder S3 is connected to the output terminal of the gain regulator G1, and the negative input terminal - of the third adder S3 receives the third output signal u3; the output terminal of the third adder S3 is connected to the first input terminal of the third multiplier P3, and the second input terminal of the third multiplier P3 receives the second input signal w.
[0055] The output terminal of the third multiplier P3 is connected to the input terminal of the third integrator I3, and the output terminal of the third integrator I3 outputs the third output signal u3.
[0056] Specifically, the first input signal u is the three-phase voltage signal of the target power grid system to which the inverter where the phase-locked loop is located is to be connected to the grid, usually an AC signal, and the second input signal w is the angular frequency signal of the target phase-locked signal, that is, the angular frequency representation of the rated frequency of the target power grid system, w = 2 * π * F, where F is the rated frequency of the target power grid system.
[0057] Exemplarily, as Figure 3 shown, the first input signal u passes through the phase-locked control device composed of the first branch 10, the second branch 20, and the third branch 30 to obtain the first output signal u1, the second output signal u2, and the third output signal u3. Among them, the first output signal u1 is in the same phase as the first input signal u, the second output signal u2 is an orthogonal signal to the first input signal u, and the third output signal u3 is the DC component extracted from the first input signal u.
[0058] Figure 4 It is a schematic diagram of the intermediate quantity of the signal processed by the phase-locked control module provided by the embodiment of the present utility model. After obtaining the first output signal u1, the second output signal u2, and the third output signal u3, the phase-locked control module 40 subtracts the third output signal u3 from the second output signal u2 to obtain the alternating quantity u4 (i.e., the following first target signal) with the DC signal removed. Refer to Figure 4 , the alternating quantity u4 is orthogonal to the first output signal u1. After the alternating quantity u4 and the first output signal u1 are subjected to the park transformation, v d and v q are obtained, where v d represents the direct-axis component synchronized with the rotor magnetic field and is used to control the active power, and v q represents the quadrature-axis component perpendicular to the rotor magnetic field and is used to control the reactive power. The phase value required for the park transformation is the phase angle output by the phase-locked loop 50 to be controlled. The quadrature-axis component v q is sent to a PI (Proportional-Integral) regulator. The instantaneous angular frequency value is obtained from the output of the PI regulator, and then the target phase-locked phase angle θ can be obtained by integrating the instantaneous angular frequency value.
[0059] Optionally, the phase-locked control module 40 includes a signal processing sub-module and a phase-locked control sub-module; the signal processing sub-module is connected to the phase-locked control sub-module.
[0060] The signal processing sub-module is used to determine the target phase-locked phase angle θ by using the first output signal u1, the second output signal u2, and the third output signal u3; the phase-locked control sub-module is used to control the phase-locked loop 50 to be controlled by using the target phase-locked phase angle θ.
[0061] Optionally, the signal processing sub-module includes a subtraction unit, a park transformation unit, a PI adjustment unit, and an integration unit.
[0062] The subtraction unit is used to subtract the third output signal u3 from the second output signal u2 to obtain the first target signal u4; the park transformation unit is used to perform the park transformation on the first target signal u4 and the first output signal u1 to obtain the second target signal; the PI adjustment unit is used to perform proportional-integral adjustment on the second target signal to obtain the third target signal; the integration unit is used to integrate the third target signal to obtain the target phase-locked phase angle θ.
[0063] Optionally, the phase-locked control module 40 further includes a signal acquisition sub-module;
[0064] The signal acquisition sub-module is connected to the signal processing sub-module; the signal acquisition sub-module is connected to the power grid system (i.e., the above-mentioned target power grid system) to which the inverter where the phase-locked loop 50 to be controlled is to be connected to the grid; the signal acquisition sub-module acquires the target phase-locked signal through the power grid system and sends the target phase-locked signal to the signal processing sub-module.
[0065] An embodiment of the present utility model further provides a phase-locked loop, which includes the phase-locked control device in any of the above embodiments.
[0066] The phase-locked loop provided by the embodiment of the present utility model includes the phase-locked control device in the above embodiment. Therefore, the phase-locked loop provided by the embodiment of the present utility model also has the beneficial effects described in the above embodiment, which will not be elaborated here.
[0067] An embodiment of the present utility model further provides a power grid system, which includes an inverter, and the inverter includes the phase-locked loop in any of the above embodiments.
[0068] The power grid system provided by the embodiment of the present utility model includes the phase-locked loop in the above embodiment. Therefore, the power grid system provided by the embodiment of the present utility model also has the beneficial effects described in the above embodiment, which will not be elaborated here.
[0069] In the description of the embodiments of the present utility model, unless otherwise clearly defined and limited, the terms "installation", "connection", and "connection" shall be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or an integral connection; it may be a mechanical connection or an electrical connection; it may be directly connected or indirectly connected through an intermediate medium, and it may be the communication inside two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present utility model can be understood according to specific situations.
[0070] Finally, it should be noted that the above is only the preferred embodiment of the present utility model and the applied technical principle. Those skilled in the art will understand that the present utility model is not limited to the specific embodiments described herein. Various obvious changes, re-adjustments, and substitutions can be made by those skilled in the art without departing from the protection scope of the present utility model. Therefore, although the present utility model has been described in detail through the above embodiments, the present utility model is not limited to the above embodiments. Without departing from the concept of the present utility model, more other equivalent embodiments can be included, and the scope of the present utility model is determined by the scope of the appended claims.
Claims
1. A phase-locked control device, characterized in that, The phase-locked control device includes a first branch for generating a first output signal in phase with the first input signal, a second branch for generating a second output signal orthogonal to the first input signal, a third branch for extracting a third output signal from the first input signal, and a phase-locked control module; The first branch, the second branch, and the third branch are all connected to the phase-locked loop to be controlled through the phase-locked control module; The first input signal is an AC signal of the target phase-locked signal, and the third output signal is the DC component in the first input signal; The phase-locked control module is used to determine the target phase-locked phase angle by using the first output signal, the second output signal, and the third output signal, and to control the phase-locked loop to be controlled by using the target phase-locked phase angle.
2. The phase-locked control device according to claim 1, characterized in that The second branch includes a first adder, a gain regulator, a second adder, a first multiplier, a first integrator, a second multiplier, and a second integrator connected in sequence; Among them, the positive input terminal of the first adder is connected to the first input signal, and the negative input terminal of the first adder is connected to the first output signal; the output terminal of the first adder is connected to the input terminal of the gain regulator; The positive input terminal of the second adder is connected to the output terminal of the gain regulator, and the negative input terminal of the second adder is connected to the second output signal; the output terminal of the second adder is connected to the first input terminal of the first multiplier, and the second input terminal of the first multiplier is connected to a second input signal, and the second input signal is the angular frequency signal of the target phase-locked signal; The input terminal of the first integrator is connected to the output terminal of the first multiplier; the output terminal of the first integrator is connected to the first input terminal of the second multiplier, and the output terminal of the first integrator outputs the first output signal; the second input terminal of the second multiplier is connected to the second input signal; The input terminal of the second integrator is connected to the output terminal of the second multiplier, and the output terminal of the second integrator outputs the second output signal.
3. The phase-locked control device according to claim 2, characterized in that, The third branch includes a third adder, a third multiplier, and a third integrator connected in sequence; The positive input terminal of the third adder is connected to the output terminal of the gain regulator, and the negative input terminal of the third adder is connected to the third output signal; the output terminal of the third adder is connected to the first input terminal of the third multiplier, and the second input terminal of the third multiplier is connected to the second input signal; The output terminal of the third multiplier is connected to the input terminal of the third integrator, and the output terminal of the third integrator outputs the third output signal.
4. The phase-locked control device according to claim 1, characterized in that The phase-locked control module includes a signal processing sub-module and a phase-locked control sub-module; the signal processing sub-module and the phase-locked control sub-module are connected; The signal processing sub-module is used to determine the target phase-locked phase angle by using the first output signal, the second output signal, and the third output signal; The phase-locked control sub-module is used to control the phase-locked loop to be controlled by using the target phase-locked phase angle.
5. The phase-locked control device according to claim 4, wherein The signal processing sub-module includes a subtraction unit, a Park transformation unit, a PI regulation unit, and an integration unit; The subtraction unit is configured to subtract the second output signal from the third output signal to obtain a first target signal; The Park transformation unit is configured to perform a Park transformation on the first target signal and the first output signal to obtain a second target signal; The PI regulation unit is configured to perform proportional-integral regulation on the second target signal to obtain a third target signal; The integration unit is configured to integrate the third target signal to obtain the target phase-locked phase angle.
6. The phase-locked control device according to claim 4, characterized in that The phase-locked control module further includes a signal acquisition sub-module; The signal acquisition sub-module is connected to the signal processing sub-module; the signal acquisition sub-module is connected to the power grid system to which the inverter where the phase-locked loop to be controlled is to be connected to the grid; The signal acquisition sub-module acquires the target phase-locked signal through the power grid system and sends the target phase-locked signal to the signal processing sub-module.
7. A phase-locked loop, characterized in that, The phase-locked loop includes the phase-locked control device according to any one of claims 1-6 above.
8. A power grid system, characterized in that, The power grid system includes an inverter, and the inverter includes the phase-locked loop according to claim 7 above.