Watchdog circuit for PC Stick

Abstract

The utility model relates to a watchdog circuit used for a PC Stick, which comprises a power management unit (PMU), a micro processing unit (MCU) and a central processing unit (CPU), the power management unit (PMU) is connected with the MCU and the CPU and is used for supplying power to the MCU and the CPU, an I / O port of the MCU is connected with an I / O port of the CPU, and the CPU is used for supplying power to the MCU and the CPU. The power management unit PMU is connected with a system power supply input end + V3P3A and used for monitoring the state of an I / O port of the central processing unit CPU, a + V3P3A pin of the power management unit PMU is connected with a system power supply input end + V3P3A, and the + V3P3A pin of the power management unit PMU is connected with a VCC3V3 pin of the micro-processing unit MCU and a VCCPIRM3P3 pin of the central processing unit CPU; the reliability and the stability of a pocket computer PCStick system can be improved, a Watchdog circuit is realized on a small-size PCB through an extremely simple circuit, and the pocket computer PCStick circuit has the effects of stable performance, fewer components, low cost and compact structure.

Description

Technical Field

[0001] The utility model relates to the technical field of reset circuits, and particularly relates to a watchdog circuit for a PC Stick. Background Art

[0002] As the application of computer systems becomes more and more extensive, the stability and reliability of computer systems have also become one of the most important issues. The watchdog plays a crucial role as a common system protection mechanism. The watchdog is a monitoring mechanism for computer hardware and software, used to monitor the running state of the system, detect and solve potential problems in a timely manner, ensure the stability and reliability of the system, and has the characteristics of automatic restart, reliability, independence, flexibility, and easy implementation. The watchdog of a computer is a means to monitor the running status of the system, and realizes the monitoring of the system running status through a combination of software and hardware. A stable-running software will feed the dog after executing specific instructions. If the watchdog does not receive a dog-feeding signal from the software within a certain period, it is considered that the system has a fault, and it will enter the interrupt handling program or force the system to reset. This operating mechanism of the watchdog can automatically restart the system when the computer system has an abnormality without the need for on-site maintenance by computer maintenance personnel, ensuring the stable operation of the system and reducing the maintenance cost of end users.

[0003] The current watchdog circuit has a complex structure and uses many electronic components, which is not conducive to being applied to electronic devices with high integration and small size. Due to the portability and compactness of the PC Stick computer stick, there are extremely high requirements for the size and integration of internal components. Therefore, it is an urgent need to design a watchdog circuit with fewer components and stable performance. Summary of the Utility Model

[0004] In view of this, aiming at the deficiencies existing in the prior art, the main purpose of the utility model is to provide a watchdog circuit for a PC Stick, which improves the reliability and stability of the pocket computer PC Stick system, and realizes the Watchdog circuit on a small-sized PCB through an extremely simple circuit, having the effects of stable performance, fewer components, low cost, and compact structure.

[0005] To achieve the above purpose, the utility model adopts the following technical solutions:

[0006] A watchdog circuit for a PC Stick, comprising a power management unit PMU, a microprocessing unit MCU and a central processing unit CPU. The power management unit PMU is connected to both the microprocessing unit MCU and the central processing unit CPU, and is used to supply power to the microprocessing unit MCU and the central processing unit CPU. The I / O port of the microprocessor MCU is connected to the I / O port of the central processing unit CPU, and is used to monitor the status of the I / O port of the central processing unit CPU. The +V3P3A pin of the power management unit PMU is connected to the system power input terminal +V3P3A. The GND pins of the power management unit PMU, the microprocessing unit MCU and the central processing unit CPU are all grounded. The +V3P3A pin of the power management unit PMU is connected to the VCC3V3 pin of the microprocessing unit MCU and the VCCPIRM_3P3 pin of the central processing unit CPU. The GPIO_01 / SCL pin of the microprocessing unit MCU is connected to the GPP_H5_I2C_SCL pin of the central processing unit. The GPIO_02_SDA pin of the microprocessing unit MCU is connected to the GPP_H4_I2C_SDA pin of the central processing unit. The GPIO_03 / INT pin of the microprocessing unit MCU is connected to the GPP_D0_I2C_INT pin of the central processing unit. The GPIO_04 pin of the microprocessing unit MCU is connected to the SYS_RESET pin of the central processing unit. The +V3P3A pin of the power management unit PMU is also respectively connected to the GPP_H5_I2C_SCL pin, GPP_H4_I2C_SDA pin, GPP_D0_I2C_INT pin and SYS_RESET pin of the central processing unit CPU. A filter circuit is connected in parallel between the +V3P3A pin of the power management unit PMU and the VCCPIRM_3P3 pin of the central processing unit CPU.

[0007] As a preferred solution, the filter circuit includes a filter capacitor C1 and a filter capacitor C2 connected in parallel. One end of the filter capacitor C1 and the filter capacitor C2 is grounded, and the other end is connected to the +V3P3A pin of the power management unit PMU.

[0008] As a preferred solution, the filter capacitor C1 is a chip ceramic capacitor, and the filter capacitor C2 is a chip ceramic capacitor.

[0009] As a preferred solution, a first pull-up resistor R1 is connected in series between the +V3P3A pin of the power management unit PMU and the GPP_H5_I2C_SCL pin of the central processing unit CPU. A second pull-up resistor R2 is connected in series between the +V3P3A pin of the power management unit PMU and the GPP_H4_I2C_SDA pin of the central processing unit CPU. A third pull-up resistor R3 is connected in series between the +V3P3A pin of the power management unit PMU and the GPP_D0_I2C_INT pin of the central processing unit CPU. A fourth pull-up resistor R4 is connected in series between the +V3P3A pin of the power management unit PMU and the SYS_RESET pin of the central processing unit CPU.

[0010] As a preferred solution, the central processing unit CPU includes an Intel X86 central processing unit CPU.

[0011] Compared with the prior art, the watchdog circuit for the PC Stick has obvious advantages and beneficial effects. Specifically, as can be seen from the above technical solutions, it mainly works by setting the power management unit PMU to be connected to both the microprocessing unit MCU and the central processing unit CPU and used to supply power to the microprocessing unit MCU and the central processing unit CPU. The I / O ports of the microprocessor MCU are connected to the I / O ports of the central processing unit CPU and used to monitor the status of the I / O ports of the central processing unit CPU. It has an extremely simple circuit, realizes the function of the watchdog circuit on a small-sized PCB, and designs the watchdog circuit in a miniaturized and highly integrated form to adapt to the limited space of the PC Stick computer stick. This design not only reduces the occupied space but also lowers the power consumption and improves the overall performance, having the effects of stable performance, fewer components, low cost, and compact structure, and also improving the reliability and stability of the pocket computer PCStick system. Description of the Drawings

[0012] Figure 1 It is a block diagram of the module structure of an embodiment of the present invention.

[0013] Figure 2 It is a circuit operation flowchart of an embodiment of the present invention.

[0014] Figure 3 It is a circuit schematic diagram of an embodiment of the present invention. Detailed Embodiments

[0015] The following will clearly and completely describe the technical solutions in the embodiments of the present utility model with reference to the accompanying drawings in the embodiments of the present utility model. Obviously, the described embodiments are only a part of the embodiments of the present utility model, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present utility model without making creative efforts belong to the protection scope of the present utility model.

[0016] It should be noted that when an element is referred to as being "fixed to" another element, it can be directly on the other element or there may also be a middle element. When an element is considered to be "connected to" another element, it can be directly connected to the other element or there may be a middle element at the same time. The terms "vertical", "horizontal", "left", "right" and similar expressions used herein are only for the purpose of illustration.

[0017] Please refer to Figures 1 to 3, showing a watchdog circuit for a PC Stick provided by an embodiment of the present invention, including a power management unit PMU, a microprocessing unit MCU, and a central processing unit CPU. The power management unit PMU is connected to both the microprocessing unit MCU and the central processing unit CPU, and is used to supply power to the microprocessing unit MCU and the central processing unit CPU. The I / O port of the microprocessor MCU is connected to the I / O port of the central processing unit CPU and is used to monitor the status of the I / O port of the central processing unit CPU. The +V3P3A pin of the power management unit PMU is connected to the system power input terminal +V3P3A. The GND pins of the power management unit PMU, the microprocessing unit MCU, and the central processing unit CPU are all grounded. The +V3P3A pin of the power management unit PMU is connected to the VCC3V3 pin of the microprocessing unit MCU and the VCCPIRM_3P3 pin of the central processing unit CPU. The GPIO_01 / SCL pin of the microprocessing unit MCU is connected to the GPP_H5_I2C_SCL pin of the central processing unit. The GPIO_02_SDA pin of the microprocessing unit MCU is connected to the GPP_H4_I2C_SDA pin of the central processing unit. The GPIO_03 / INT pin of the microprocessing unit MCU is connected to the GPP_D0_I2C_INT pin of the central processing unit. The GPIO_04 pin of the microprocessing unit MCU is connected to the SYS_RESET pin of the central processing unit. The +V3P3A pin of the power management unit PMU is also respectively connected to the GPP_H5_I2C_SCL pin, the GPP_H4_I2C_SDA pin, the GPP_D0_I2C_INT pin, and the SYS_RESET pin of the central processing unit CPU. A filter circuit is connected in parallel between the +V3P3A pin of the power management unit PMU and the VCCPIRM_3P3 pin of the central processing unit CPU.

[0018] Further, the filter circuit includes a filter capacitor C1 and a filter capacitor C2 connected in parallel. One end of the filter capacitor C1 and the filter capacitor C2 is grounded, and the other end is connected to the +V3P3A pin of the power management unit PMU.

[0019] Further, the filter capacitor C1 is a chip ceramic capacitor with a specification of 22UF_6.3V_SMC0603, and the filter capacitor C2 is a chip ceramic capacitor with a specification of 0.1UF_6.3V_SMC0603.

[0020] Further, a first pull-up resistor R1 is connected in series between the +V3P3A pin of the power management unit PMU and the GPP_H5_I2C_SCL pin of the central processing unit CPU, a second pull-up resistor R2 is connected in series between the +V3P3A pin of the power management unit PMU and the GPP_H4_I2C_SDA pin of the central processing unit CPU, a third pull-up resistor R3 is connected in series between the +V3P3A pin of the power management unit PMU and the GPP_D0_I2C_INT pin of the central processing unit CPU, and a fourth pull-up resistor R4 is connected in series between the +V3P3A pin of the power management unit PMU and the SYS_RESET pin of the central processing unit CPU. The model specifications of the first pull-up resistor R1, the second pull-up resistor R2, the third pull-up resistor R3, and the fourth pull-up resistor R4 are all 10K_5%_SMR0201.

[0021] Further, the central processing unit CPU includes an Intel X86 central processing unit CPU.

[0022] Its functional logic: The power management unit PMU supplies power to the microprocessing unit MCU and also provides power support to the central processing unit CPU. The microprocessor MCU is connected to the I / O ports of the central processing unit CPU through I / O ports and is used to monitor the status of the I / O ports of the central processing unit CPU. The I / O ports of the central processing unit CPU output a signal to the microprocessor MCU at regular intervals to clear the WDT. If the watchdog is not fed within the specified time, the WDT times out, and the microprocessor MCU will give a low-level reset signal RESET to the SYS_RESET pin of the central processing unit CPU, thereby resetting the X86 central processing unit CPU to prevent the central processing unit CPU from being in a dead state.

[0023] The watchdog circuit for the PC Stick has obvious advantages and beneficial effects compared with the prior art. Specifically, as can be seen from the above technical solution, it mainly sets the power management unit PMU to be connected to both the microprocessing unit MCU and the central processing unit CPU and is used to supply power to the microprocessing unit MCU and the central processing unit CPU. The I / O ports of the microprocessor MCU are connected to the I / O ports of the central processing unit CPU and are used to monitor the status of the I / O ports of the central processing unit CPU. It has an extremely simple circuit, realizes the function of the watchdog circuit on a small-sized PCB, designs the watchdog circuit into a miniaturized and highly integrated form to adapt to the limited space of the PC Stick computer stick. This design not only reduces the occupied space but also reduces the power consumption and improves the overall performance, having the effects of stable performance, fewer components, low cost, and compact structure, and also improves the reliability and stability of the pocket computer PCStick system.

[0024] It should be noted that the present utility model is not limited to the above embodiments. According to the creative spirit of the present utility model, those skilled in the art can also make other changes, and these changes made based on the creative spirit of the present utility model should all be included within the scope protected by the present utility model.

Claims

1. A watchdog circuit for a PC Stick, characterized in that, It includes a Power Management Unit (PMU), a Microcontroller Unit (MCU), and a Central Processing Unit (CPU). The Power Management Unit (PMU) is connected to both the Microcontroller Unit (MCU) and the Central Processing Unit (CPU), and is used to supply power to the Microcontroller Unit (MCU) and the Central Processing Unit (CPU). The I / O ports of the Microcontroller Unit (MCU) are connected to the I / O ports of the Central Processing Unit (CPU) and are used to monitor the status of the I / O ports of the Central Processing Unit (CPU). The +V3P3A pin of the Power Management Unit (PMU) is connected to the system power input +V3P3A. The GND pins of the Power Management Unit (PMU), the Microcontroller Unit (MCU), and the Central Processing Unit (CPU) are all grounded. The +V3P3A pin of the Power Management Unit (PMU) is connected to the VCC3V3 pin of the Microcontroller Unit (MCU) and the VCCPIRM_3P3 pin of the Central Processing Unit (CPU). The GPIO_01 / SCL pin of the Microcontroller Unit (MCU) is connected to the GPP_H5_I2C_SCL pin of the Central Processing Unit. The GPIO_02_SDA pin of the Microcontroller Unit (MCU) is connected to the GPP_H4_I2C_SDA pin of the Central Processing Unit. The GPIO_03 / INT pin of the Microcontroller Unit (MCU) is connected to the GPP_D0_I2C_INT pin of the Central Processing Unit. The GPIO_04 pin of the Microcontroller Unit (MCU) is connected to the SYS_RESET pin of the Central Processing Unit. The +V3P3A pin of the Power Management Unit (PMU) is also respectively connected to the GPP_H5_I2C_SCL pin, GPP_H4_I2C_SDA pin, GPP_D0_I2C_INT pin, and SYS_RESET pin of the Central Processing Unit (CPU). A filter circuit is connected in parallel between the +V3P3A pin of the Power Management Unit (PMU) and the VCCPIRM_3P3 pin of the Central Processing Unit (CPU).

2. The watchdog circuit for a PC Stick according to claim 1, wherein, The filter circuit includes a filter capacitor C1 and a filter capacitor C2 connected in parallel. One end of the filter capacitor C1 and the filter capacitor C2 is grounded, and the other end is connected to the +V3P3A pin of the Power Management Unit (PMU).

3. The watchdog circuit for the PC Stick according to claim 2, wherein, The filter capacitor C1 is a surface mount ceramic capacitor, and the filter capacitor C2 is a surface mount ceramic capacitor.

4. The watchdog circuit for the PC Stick according to claim 1, characterized in that, A first pull-up resistor R1 is connected in series between the +V3P3A pin of the power management unit PMU and the GPP_H5_I2C_SCL pin of the central processing unit CPU. A second pull-up resistor R2 is connected in series between the +V3P3A pin of the power management unit PMU and the GPP_H4_I2C_SDA pin of the central processing unit CPU. A third pull-up resistor R3 is connected in series between the +V3P3A pin of the power management unit PMU and the GPP_D0_I2C_INT pin of the central processing unit CPU. A fourth pull-up resistor R4 is connected in series between the +V3P3A pin of the power management unit PMU and the SYS_RESET pin of the central processing unit CPU.

5. The watchdog circuit for the PC Stick as claimed in claim 4, wherein The central processing unit CPU includes an Intel X86 central processing unit CPU.

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