Photodiode and electronic device including same

Abstract

The utility model provides a photodiode and an electronic device comprising the same, and the photodiode comprises a first-type doped well with an exposed upper surface, a second-type doped well surrounding the first-type doped well, a third-type doped well surrounding the second-type doped well, and a fourth-type doped well surrounding the third-type doped well. At least part of the upper surface of the second-type doped well is exposed and aligned with the upper surface of the first-type doped well, the first-type substrate surrounds the second-type doped well, at least part of the upper surface of the first-type substrate is exposed and aligned with the upper surface of the first-type doped well, and the first electrode is arranged on the first-type substrate. The first electrode is connected to the upper surface of the first type doped well and the upper surface of the first type substrate, the second electrode is connected to the upper surface of the second type doped well, a first PN junction is formed between the second type doped well and the first type substrate, and a second PN junction is formed between the first type doped well and the second type doped well.

Description

Technical Field

[0001] The utility model relates to the field of integrated circuits, and specifically, to a photodiode and an electronic device including the same. Background Art

[0002] A semiconductor photodiode is a semiconductor component that has the ability to convert an optical signal from an incident light source into an electrical signal. More specifically, when incident light within a certain wavelength range enters the active region of the photodiode, photoelectric conversion can occur in the active region to form electrons. By reading the electrical signal converted from the electrons through a readout circuit, the intensity of the incident light illumination can be obtained. The core part of a semiconductor photodiode is the PN junction. The parameters for measuring the performance of a photodiode include responsivity, dark current, signal-to-noise ratio, etc. Responsivity is one of the physical quantities for measuring the photoelectric conversion ability of a photodiode, and can be defined as the ratio of photocurrent to incident optical power, which can be expressed by the following formula: Where, I ph is the net optical current, and P in is the optical power.

[0003] In recent years, the manufacturing technology of CMOS integrated circuits has become increasingly mature, with prominent cost advantages, and high compatibility with the manufacturing technology of photodiodes, greatly reducing the manufacturing cost of photodiode devices and improving the application scope and flexibility of photodiodes.

[0004] However, while successfully integrating the photodiode into the CMOS process, how to effectively improve the performance of the photodiode has become the focus of attention. Restricted by the mature platform, in order to be compatible with devices such as CMOS, the preparation of the photodiode must use the same materials and processes as CMOS. Materials and processes including the parameters of the silicon substrate, the conditions for thermal annealing, the type of ion implantation machine, the preparation of the film layer, etc., must be kept as consistent as possible with the CMOS process in order not to affect the performance of CMOS devices. The general improvement of the photodiode is limited to changes in structure, implantation conditions, film layer thickness, etc. Since the photoelectrons generated only near the PN junction in a photodiode fabricated using the traditional CMOS process have a relatively high probability of being converted into photocurrent, the photoelectric conversion efficiency is relatively low.

[0005] Therefore, a photodiode with high photoelectric conversion efficiency is desired. Summary of the Utility Model

[0006] The present utility model provides a photodiode structure. The doping well of the photodiode is improved into a hollow structure to increase the space charge region and reduce the recombination probability of photoelectrons (i.e., reduce the probability of annihilation of electron-hole pairs in the active region of the photodiode), thereby improving the photoelectric conversion efficiency and alleviating or solving the problem of low photoelectric conversion rate of the photodiode element in the prior art due to the too long path of photoelectrons and their mid-way annihilation. In addition, the present utility model also forms a light-trapping structure by adding a shallow trench structure to increase the optical path of incident light in the photodiode, and at the same time reduces the recombination probability of photoelectrons deep in the substrate. The photodiode according to the present utility model can improve the photoelectric conversion efficiency.

[0007] One aspect of the present utility model provides a photodiode, comprising: a first-type doping well, at least a part of the upper surface of the first-type doping well is exposed; a second-type doping well, adjacent to the first-type doping well, at least a part of the upper surface of the second-type doping well is exposed; a first-type substrate, adjacent to the second-type doping well, at least a part of the upper surface of the first-type substrate is exposed; a first electrode, connected to at least the part of the upper surface of the first-type doping well and at least the part of the upper surface of the first-type substrate; a second electrode, connected to at least the part of the upper surface of the second-type doping well, wherein a first PN junction is formed between the second-type doping well and the first-type substrate, and a second PN junction is formed between the first-type doping well and the second-type doping well.

[0008] For the photodiode according to one aspect of the present utility model, the first-type doping well and the first-type substrate are of P type, and the second-type doping well is of N type.

[0009] For the photodiode according to one aspect of the present utility model, the first electrode is a negative electrode and the second electrode is a positive electrode.

[0010] For the photodiode according to one aspect of the present utility model, when the photodiode operates, both the first PN junction and the second PN junction are in a biased state.

[0011] For the photodiode according to one aspect of the present utility model, the lower surface of the first-type doping well is a flat plane.

[0012] For the photodiode according to one aspect of the present utility model, the lower surface of the second-type doping well is a flat plane.

[0013] For the photodiode according to one aspect of the present utility model, the second-type doping well includes one or more hollow structures.

[0014] For the photodiode according to one aspect of the present utility model, the first-type doping well includes one or more hollow structures.

[0015] A photodiode according to one aspect of the present invention, wherein the second-type doped well includes one or more hollow structures.

[0016] A photodiode according to one aspect of the present invention, wherein one or more of the hollow structures included in the first-type doped well are trapezoidal in shape.

[0017] A photodiode according to one aspect of the present invention, wherein one or more of the hollow structures included in the first-type doped well include a light-trapping structure filled with silicon oxide.

[0018] A photodiode according to one aspect of the present invention, wherein one or more of the hollow structures included in the second-type doped well are rectangular in shape.

[0019] One aspect of the present invention provides an electronic device including the photodiode as described above.

[0020] One aspect of the present invention provides a method for manufacturing a photodiode, including: preparing a first-type substrate; performing second-type ion implantation on the first-type substrate to form a first-type doped well, wherein at least a part of the upper surface of the first-type doped well is exposed, wherein the first-type substrate is adjacent to the second-type doped well, and a first PN junction is formed between the second-type doped well and the first-type substrate; performing low-energy first-type ion implantation on the first-type substrate to form a second-type doped well, wherein at least a part of the upper surface of the second-type doped well is exposed, wherein the second-type doped well is adjacent to the first-type doped well, and a second PN junction is formed between the first-type doped well and the second-type doped well; preparing a first electrode connected to at least a part of the upper surface of the first-type doped well and at least a part of the upper surface of the first-type substrate; and preparing a second electrode connected to at least a part of the upper surface of the second-type doped well.

[0021] A method according to one aspect of the present invention, wherein the first-type doped well and the first-type substrate are of P type, and the second-type doped well is of N type.

[0022] A method according to one aspect of the present invention, wherein the first electrode is a negative electrode and the second electrode is a positive electrode.

[0023] A method according to one aspect of the present invention, wherein when the photodiode operates, both the first PN junction and the second PN junction are in a biased state.

[0024] A method according to one aspect of the present invention, wherein the lower surface of the first-type doped well is a flat plane.

[0025] A method according to an aspect of the present invention, wherein the lower surface of the second-type doped well is a flat plane.

[0026] A method according to an aspect of the present invention, wherein the second-type doped well includes one or more hollow structures.

[0027] A method according to an aspect of the present invention, wherein performing a second-type ion implantation on the first-type substrate includes: etching a shallow trench on the upper surface of the first-type substrate and performing a second-type ion implantation on the etched first-type substrate.

[0028] A method according to an aspect of the present invention, wherein the second-type doped well includes one or more hollow structures.

[0029] A method according to an aspect of the present invention, wherein performing a low-energy first-type ion implantation on the first-type substrate includes: performing a low-energy first-type ion implantation on the etched first-type substrate.

[0030] A method according to an aspect of the present invention, wherein the first-type doped well includes one or more hollow structures.

[0031] A method according to an aspect of the present invention, wherein one or more of the hollow structures included in the first-type doped well are trapezoidal in shape.

[0032] A method according to an aspect of the present invention further includes: filling silicon oxide in the shallow trench to form a light-trapping structure.

[0033] A method according to an aspect of the present invention, wherein one or more of the hollow structures included in the second-type doped well are rectangular in shape. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 is a schematic cross-sectional view showing the structure of a conventional photodiode;

[0035] Figure 2A is an exemplary plan view of a photodiode according to an embodiment of the present disclosure;

[0036] Figure 2B is Figure 2A an exemplary cross-sectional view of the photodiode in along the A-A direction;

[0037] Figure 3A is an exemplary plan view of a photodiode according to an embodiment of the present disclosure;

[0038] Figure 3B is Figure 3A an exemplary cross-sectional view of the photodiode in along the A-A direction

[0039] Figure 4 It is a simulation diagram of the photoelectric conversion efficiency of various photodiodes;

[0040] Figure 5A It is an exemplary plan view of a photodiode according to an embodiment of the present disclosure;

[0041] Figure 5B It is Figure 5A An exemplary cross-sectional view of the photodiode in along the A-A direction;

[0042] Figure 6 It is an electronic device including a photodiode according to at least one embodiment of the present disclosure;

[0043] Figure 7 It is an exemplary manufacturing method of a photodiode according to at least one embodiment of the present disclosure;

[0044] Figure 8 It is another exemplary manufacturing method of a photodiode according to at least one embodiment of the present disclosure. Detailed Description of the Invention

[0045] Before proceeding with the following detailed description, it may be advantageous to set forth definitions of certain words and phrases used throughout this patent document. The terms "coupled," "connected," and their derivatives refer to any direct or indirect communication or connection between two or more elements, whether or not those elements are in physical contact with each other. The terms "transmit," "receive," and "communicate," and their derivatives, cover both direct and indirect communication. The terms "comprise" and "include," and their derivatives, mean including but not limited to. The term "or" is inclusive, meaning and / or. The phrase "associated with," and its derivatives, means including, included within, interconnected, contains, contained within, connected or coupled with, communicating with, cooperating with, interlacing, juxtaposed, proximate, bound or bound to, having, having the attribute of, having a relationship or relationship with, etc. The term "controller" refers to any device, system, or part thereof that controls at least one operation. Such a controller may be implemented in hardware, or in a combination of hardware and software and / or firmware. The functions associated with any particular controller may be centralized or distributed, whether local or remote. The phrase "at least one," when used in conjunction with a list of items, means that different combinations of one or more of the listed items may be used, and only one item in the list may be required. For example, "at least one of A, B, C" includes any of the following combinations: A, B, C, A and B, A and C, B and C, A and B and C.

[0046] Throughout this patent document, definitions of other specific words and phrases are provided. Those of ordinary skill in the art should understand that in many cases, if not most cases, such definitions apply to the prior and future use of the words and phrases so defined.

[0047] In this patent document, the application combination of modules and the hierarchical division of sub-modules are only for illustration purposes. Without departing from the scope of this disclosure, the application combination of modules and the hierarchical division of sub-modules can have different forms.

[0048] Figure 1 is a schematic cross-sectional structure diagram showing a conventional photodiode.

[0049] As Figure 1 shown, Figure 1 In [the figure], the photodiode 100 is fabricated using a CMOS process and may include a first-type substrate 101, and the first-type substrate may include a second-type doped well 111. A PN junction contact surface 104 may be formed between the first-type substrate 101 and the second-type doped well 111. In the case of a reverse bias, a space charge region 106 may be formed near the PN junction contact surface 104. When the light source irradiates from the upper surface of the illustrated substrate, only the photoelectrons generated in the region near 106 have a relatively high probability of being converted into photocurrent. Therefore, Figure 1 the photoelectric conversion efficiency of the conventional photodiode shown in [the figure] is relatively low.

[0050] Figure 2A is an example plan view of a photodiode according to an embodiment of the present disclosure.

[0051] As Figure 2A shown, Figure 2A In [the figure], the photodiode 200 may include a first-type doped well 202, a second-type doped well 211, and a first-type substrate 201. The second-type doped well 211 may be adjacent to the first-type doped well 202. The first-type substrate 201 may be adjacent to the second-type doped well 211. For example, the second-type doped well 211 may at least partially surround the first-type doped well 202. The first-type substrate 201 may at least partially surround the second-type doped well 211.

[0052] Figure 2B is Figure 2A an example cross-sectional view of the photodiode in [the figure] along the A-A direction.

[0053] As Figure 2B shown, Figure 2BThe photodiode 200 therein may include a first-type doped well 202, a second-type doped well 211, a first-type substrate 201, a first electrode 212, and a second electrode 213. A first PN junction may be formed between the second-type doped well 211 and the first-type substrate 201, and a second PN junction may be formed between the first-type doped well 202 and the second-type doped well 211. For example, the region where the first-type doped well 202 and the second-type doped well 211 are in contact may form a first PN connection surface 203, and the region where the second-type doped well 211 and the first-type substrate 201 are in contact may form a second PN connection surface 204. That is to say, the second-type doped well 211 may be adjacent to the first-type doped well 211 and the first-type substrate 201 respectively, and the contact surface regions form the first PN connection surface 203 and the second PN connection surface 204 respectively. A first space charge region 205 may be formed near the first PN connection surface 203 (for example, represented by the dotted line around the first PN connection surface 203), and a second space charge region 206 may be formed near the second PN connection surface 204 (for example, represented by the dotted line around the second PN connection surface 204).

[0054] The second-type doped well 211 may be adjacent to the first-type doped well 202. The first-type substrate 201 may be adjacent to the second-type doped well 211. For example, the second-type doped well 211 may at least partially surround the first-type doped well 202. The first-type substrate 201 may at least partially surround the second-type doped well 211. At least a part of the upper surface of the first-type doped well 202 may be exposed, at least a part of the upper surface of the second-type doped well 211 may be exposed, and at least a part of the upper surface of the first-type substrate 201 may be exposed. That is to say, the upper surface of the photodiode 200 includes at least the exposed parts of the first-type doped well 202, the second-type doped well 211, and the first-type substrate 201. For example, at least the exposed parts of the first-type doped well 202, the second-type doped well 211, and the first-type substrate 201 may be the light incident surface of the photodiode.

[0055] The first electrode 212 may be connected to at least the exposed part of the upper surface of the first-type doped well 202 and at least the exposed part of the upper surface of the first-type substrate 201. The second electrode 213 may be connected to at least the exposed part of the upper surface of the second-type doped well 211.

[0056] In one embodiment, the first type of substrate 201 is a P-type substrate (P-substrate), the second type of doped well 211 is N-type doped (N-well or Deep N-Well), the first type of doped well is P-type doped, the first electrode 212 is a negative electrode, and the second electrode 213 is a positive electrode. The first type of substrate 201, the first type of doped well 202, and the second type of doped well 211 can all form ohmic contacts by injecting high-concentration ions, thereby leading out the first electrode 212 or the first electrode 212. When the photodiode 200 operates, both the first PN junction and the second PN junction are in a biased state through the first electrode 212 and the second electrode 213. The photodiode 200 can be silicon-based, but the present disclosure is not limited thereto.

[0057] As Figure 2B shown, the lower surface of the first type of doped well 202 can be a flat plane, and the lower surface of the second type of doped well 211 can be a flat plane.

[0058] Figure 2A and Figure 2B The photoelectric conversion efficiency of the photodiode 200 shown in Figure 1 is higher than that of the conventional photodiode 100 shown in

[0059] (1) Figure 1 The photodiode 100 of Figure 2A and Figure 2B only has one space charge region 106, while the photodiode 200 shown in

[0060] (2) Figure 2A and Figure 2B In the photodiode 200 shown, there is a neutral region that does not generate space charge between the space charge regions 205 and 206. The photo-generated carriers generated in the neutral region are surrounded by the space charge regions 205 and 206. Whether the photo-generated carriers diffuse towards the space charge region 205 or 206, there is a certain probability of being converted into photocurrent. In contrast,Figure 1 Among the photo-generated carriers generated in the same neutral region, only the carriers diffusing towards the space charge region 106 have the possibility of being converted into photocurrent, while the photo-generated carriers diffusing in other directions will be recombined during the diffusion process. Figure 2A and Figure 2B The recombination probability of the photodiode 200 shown in Figure 1 in this neutral region is lower than that of the photodiode 100 shown in

[0061] Figure 3A is an exemplary plan view of a photodiode according to an embodiment of the present disclosure.

[0062] As Figure 3A shown, Figure 3A the photodiode 300 in Figure 3A may include a first-type doped well 302, a second-type doped well 311, and a first-type substrate 301. The second-type doped well 311 may be adjacent to the first-type doped well 302. The first-type substrate 301 may be adjacent to the second-type doped well 311. For example, the second-type doped well 311 may at least partially surround the first-type doped well 302. The first-type substrate 301 may at least partially surround the second-type doped well 311. As

[0063] Figure 3B is Figure 3A an exemplary cross-sectional view of the photodiode in

[0064] As Figure 3B shown, Figure 3BThe photodiode 300 therein may include a first-type doped well 302, a second-type doped well 311, and a first-type substrate 301. The photodiode 300 may further include a first electrode (not shown) that can be connected to the first-type doped well 302 and the first-type substrate 301, and a second electrode (not shown) that can be connected to the second-type doped well 311. A first PN junction may be formed between the second-type doped well 311 and the first-type substrate 301, and a second PN junction may be formed between the first-type doped well 302 and the second-type doped well 311. For example, the region where the first-type doped well 302 and the second-type doped well 311 are in contact may form a first PN connection surface 303, and the region where the second-type doped well 311 and the first-type substrate 301 are in contact may form a second PN connection surface 304. That is to say, the second-type doped well 311 may be adjacent to the first-type doped well 311 and the first-type substrate 301 respectively, and the contact surface regions form the first PN connection surface 303 and the second PN connection surface 304 respectively. A first space charge region 305 may be formed near the first PN connection surface 303 (for example, represented by the dotted line around the first PN connection surface 303), and a second space charge region 306 may be formed near the second PN connection surface 304 (for example, represented by the dotted line around the second PN connection surface 304).

[0065] The second-type doped well 311 may be adjacent to the first-type doped well 302. The first-type substrate 301 may be adjacent to the second-type doped well 311. For example, the second-type doped well 311 may at least partially surround the first-type doped well 302. The first-type substrate 301 may at least partially surround the second-type doped well 311. At least a part of the upper surface of the first-type doped well 302 may be exposed, at least a part of the upper surface of the second-type doped well 311 may be exposed, and at least a part of the upper surface of the first-type substrate 301 may be exposed. That is to say, the upper surface of the photodiode 300 includes at least a part of the exposed first-type doped well 302, second-type doped well 311, and first-type substrate 301. For example, at least a part of the exposed first-type doped well 302, second-type doped well 311, and first-type substrate 301 may be the light incident surface of the photodiode.

[0066] When the photodiode 300 operates, both the first PN junction and the second PN junction are in a biased state through the first electrode and the second electrode. The photodiode 300 may be silicon-based, but the present disclosure is not limited thereto.

[0067] Compared with Figure 2A and Figure 2B the structure of the photodiode 200 shown, Figure 3A and Figure 3BThe second-type doped well 311 of the photodiode 300 shown may include one or more hollow structures. That is, the lower surface of the first-type doped well 302 of the photodiode 300 may be a flat plane, and the second-type doped well 311 may include one or more hollow structures. For example, a certain number of protrusions arranged in a certain manner may be formed in the second-type doped well 311. Figure 3B The three regularly arranged rectangular hollow structures of the second-type doped well 311 shown in Figure 3B are only examples. Those skilled in the art can understand that according to the usage requirements, the second-type doped well 311 may include hollow structures with various arrangement rules, various numbers, and various shapes. Sufficient space may be maintained between the protrusions / hollow structures to form their respective space charge regions. The first-type substrate 301 may be filled in the interval region between the hollow structures. Due to the existence of multiple hollow structures in the second doped well 311, PN junctions are also formed between the side walls of these hollow structures by the second-type doped well 311 and the first-type substrate 301, generating space charge regions 306. Compared with Figure 2A and Figure 2B the structure of the photodiode 200 shown, Figure 3A and Figure 3B the photodiode 300 shown additionally includes PN junctions formed at the side walls of the multiple hollow structures of the second doped well 311. Therefore, when the active region area is the same, Figure 3A and Figure 3B the volume of the space charge region of the photodiode 300 shown is larger than the volume of the space charge region of the photodiode 200. By increasing the space charge region, the photoelectric conversion efficiency can be effectively improved. Therefore, Figure 3A and Figure 3B the photodiode 300 shown can further improve the photoelectric conversion efficiency (especially in the short wavelength band).

[0068] Figure 4 are simulation diagrams of the photoelectric conversion efficiencies of various photodiodes.

[0069] Figure 4 The simulation diagram includes the simulation results of the traditional structure photodiode 100 and the photodiodes 200 and 300 according to the present disclosure. As Figure 4 shown, in the range where the incident light wavelength is 400 nm to 700 nm, the photodiode 300 exhibits the optimal photoelectric conversion efficiency, and the photoelectric conversion efficiency of the traditional photodiode 100 is lower than both the photodiodes 200 and 300.

[0070] Figure 5A is an example plan view of a photodiode according to an embodiment of the present disclosure.

[0071] As Figure 5A shown,Figure 5A The photodiode 500 in Figure 5A may include a first-type doped well 502, a second-type doped well 511, and a first-type substrate 501. The second-type doped well 511 may be adjacent to the first-type doped well 502. The first-type substrate 501 may be adjacent to the second-type doped well 511. For example, the second-type doped well 511 may at least partially surround the first-type doped well 502. The first-type substrate 501 may at least partially surround the second-type doped well 511. As

[0072] Figure 5B shown, the rectangular block included in the first-type doped well 502 may indicate that the first-type doped well 502 in this region is in the shape of a shallow trench; the region of the first-type doped well 502 other than the rectangular block may indicate that the first-type doped well 502 in this region is flat. Figure 5A FIG. is an exemplary cross-sectional view of the photodiode in

[0073] As Figure 5B shown, Figure 5B the photodiode 500 in

[0074] The second type of doped well 511 can be adjacent to the first type of doped well 502. The first type of substrate 501 can be adjacent to the second type of doped well 511. For example, the second type of doped well 511 can at least partially surround the first type of doped well 502. The first type of substrate 501 can at least partially surround the second type of doped well 511. At least a part of the upper surface of the first type of doped well 502 can be exposed, at least a part of the upper surface of the second type of doped well 511 can be exposed, and at least a part of the upper surface of the first type of substrate 501 can be exposed. That is to say, the upper surface of the photodiode 500 includes at least a part of the exposed first type of doped well 502, the second type of doped well 511, and the first type of substrate 501. For example, at least a part of the exposed first type of doped well 502, the second type of doped well 511, and the first type of substrate 501 can be the light incident surface of the photodiode.

[0075] When the photodiode 500 operates, both the first PN junction and the second PN junction are in a biased state through the first electrode and the second electrode. The photodiode 500 can be silicon-based, but the present disclosure is not limited thereto.

[0076] Compared with Figure 3A and Figure 3B the structure of the photodiode 200 shown, Figure 5A and Figure 5B the first type of doped well 502 of the photodiode 500 shown can also include one or more hollow structures. That is to say, the second type of doped well 511 of the photodiode 500 can include one or more hollow structures, and the first type of doped well 502 can also include one or more hollow structures. For example, a certain number of hollow structures can be formed in the first type of doped well 502 and the second type of doped well 511 and arranged in a certain manner. Figure 5BThe three regularly arranged rectangular hollow structures of the second type of doped well 511 and the three regularly arranged trapezoidal hollow structures of the first type of doped well 502 shown are merely examples. Those skilled in the art can understand that according to the usage requirements, the first type of doped well 502 and the second type of doped well 511 can include various arrangement rules, various quantities, and various shapes of hollow structures. Sufficient space can be maintained between the hollow structures to form their respective space charge regions. The first type of substrate 501 can be filled in the intervals between the hollow structures of the second type of doped well 511. The second type of doped well 511 can be filled in the intervals between the hollow structures of the first type of doped well 502. Due to the existence of multiple hollow structures in the first type of doped well 502 and the second doped well 511, PN junctions are also formed on the sidewalls of these hollow structures between the first type of doped well 502 and the second type of doped well 511, as well as between the second type of doped well 511 and the first type of substrate 501, and space charge regions 505 and 506 are respectively generated. In addition, a light trapping structure can be included in the shallow trench 421 which is a hollow structure of the first type of doped well 502. The light trapping structure can be filled with a silicon oxide material.

[0077] Compared with Figure 3A and Figure 3B the structure of the photodiode 300 shown, Figure 5A and Figure 5B the photodiode 500 shown additionally includes a PN junction formed at the sidewalls between multiple hollow structures of the first type of doped well 502, and a light trapping structure included in the multiple hollow structures of the first type of doped well 502. In the reverse bias case, the PN junction contact surfaces 503 and 504 respectively form space charge regions 505 and 506. Affected by the multiple hollow structures / shallow trench channels of the first type of doped well 502, the space charge regions 505 and 506 increase the volume of many sidewalls. Therefore, the volume of the space charge region of the photodiode 500 will increase significantly, thereby increasing the absorption of photo-generated carriers and thus improving the photoelectric conversion efficiency.

[0078] In addition, compared with Figure 3A and Figure 3B the structure of the photodiode 300 shown, the PN junction contact surface 504 formed under the shallow trench 521 and extending towards the bottom surface of the substrate is at a deeper position within the photodiode 300. The PN junction contact surface 504 at a deeper position within the photodiode 300 can more effectively absorb the photoelectrons generated from the depths of the photodiode 300, which further improves the photoelectric conversion efficiency.

[0079] In addition, compared with Figure 3A and Figure 3BCompared with the structure of the photodiode 300 shown, the shallow trench 521 filled with silicon oxide material can form multiple light-trapping structures on the upper surface of the photodiode 300, which increases the optical path of photons, improves the absorption efficiency of photons, and thus improves the photoelectric conversion efficiency.

[0080] Figure 6 An electronic device including a photodiode according to at least one embodiment of the present disclosure.

[0081] As Figure 6 shown, the electronic device 600 includes a processor 610, a memory 620, and a photodiode 630. The photodiode 630 is a photodiode according to any embodiment of the present disclosure. For example, it is connected to the processor 610 and is controlled to detect the light intensity, and for example, feedbacks the light intensity to the functional unit responsible for detecting images in the processor 610. This functional unit can generate an image by detecting the light intensity.

[0082] The memory 620 includes one or more computer program modules 621. The one or more computer program modules 621 are stored in the memory 620 and can be configured to be read and executed by the processor 610. The one or more computer program modules 621 include instructions for driving the above-mentioned photodiode 630 according to at least one embodiment of the present disclosure to perform light intensity measurement. When executed by the processor 610, it can drive the photodiode 630 to perform the above light intensity measurement steps.

[0083] The memory 620 and the processor 610 can be interconnected through a bus system and / or other forms of connection mechanisms (not shown). For example, the bus can be a peripheral component interconnect standard (PCI) bus or an extended industry standard architecture (EISA) bus, etc. The communication bus can be divided into an address bus, a data bus, a control bus, etc.

[0084] Exemplarily, the processor 610 can be a central processing unit (CPU), a digital signal processor (DSP), a graphics processing unit (GPU), or other forms of processing units with data processing capabilities and / or program execution capabilities, such as a field programmable gate array (FPGA), etc. The processor 610 can be a general-purpose processor or a dedicated processor, and can control other components in the electronic device 600 to perform desired functions.

[0085] Exemplarily, the memory 620 may include any combination of one or more computer program products, and the computer program products may include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. The volatile memory may include, for example, random access memory (RAM) and / or cache, etc. The non-volatile memory may include, for example, read-only memory (ROM), hard disk, erasable programmable read-only memory (EPROM), portable compact disc read-only memory (CD-ROM), USB memory, flash memory, etc. One or more computer program modules 621 may be stored on the computer-readable storage medium, and the processor 610 may run one or more computer program modules 621 to implement various functions of the electronic device 600. Various application programs and various data, as well as various data used and / or generated by the application programs, etc., may also be stored in the computer-readable storage medium.

[0086] For example, the electronic device 600 may further include input devices such as a camera, a touch screen, a touchpad, a keyboard, a mouse, a camera, a microphone, an accelerometer, a gyroscope, etc.; output devices such as a liquid crystal display, a speaker, a vibrator, etc.; storage devices such as a magnetic tape, a hard disk (HDD or SDD), etc.; and communication devices such as a network interface card such as a LAN card, a modem, etc. The communication device may allow the electronic device 600 to communicate with other devices wirelessly or wirelessly to exchange data and perform communication processing via a network such as the Internet. The driver is connected to the I / O interface as needed. A removable storage medium, such as a magnetic disk, an optical disc, a magneto-optical disc, a semiconductor memory, etc., is installed on the drive as needed so that a computer program read from it can be installed into the storage device as needed.

[0087] For example, the electronic device 600 may further include a peripheral interface (not shown in the figure), etc. The peripheral interface may be various types of interfaces, such as a USB interface, a Lightning interface, etc. The communication device may communicate with a network and other devices through wireless communication. The network may be, for example, the Internet, an intranet, and / or a wireless network such as a cellular phone network, a wireless local area network (LAN), and / or a metropolitan area network (MAN). The wireless communication may use any one of a variety of communication standards, protocols, and technologies, including but not limited to Global System for Mobile Communications (GSM), Enhanced Data GSM Environment (EDGE), Wideband Code Division Multiple Access (W-CDMA), Code Division Multiple Access (CDMA), Time Division Multiple Access (TDMA), Bluetooth, Wi-Fi (e.g., based on IEEE 802.11a, IEEE 802.11b, IEEE 802.11g, and / or IEEE 802.11n standards), Voice over Internet Protocol (VoIP), WiMAX, protocols for email, instant messaging, and / or Short Message Service (SMS), or any other suitable communication protocol.

[0088] The electronic device 600 may be, for example, a system-on-chip (SOC) or a device including the SOC. For example, it may be any device such as a mobile phone, a tablet computer, a laptop computer, an e-book, a game console, a television, a digital photo frame, a navigator, a household appliance, a communication base station, an industrial controller, a server, etc., or any combination of a data processing device and hardware. The embodiments of the present disclosure are not limited thereto. The specific functions and technical effects of the electronic device 600 may refer to the description of the photodiode according to at least one embodiment of the present disclosure above, and will not be elaborated herein.

[0089] Figure 7 is an exemplary manufacturing method of a photodiode according to at least one embodiment of the present disclosure. Those skilled in the art should understand that Figure 7 The flowchart shown in Figure 7 is only schematic. Without departing from the gist of the present invention, the various steps of the method shown in

[0090] In block S701, a first type of substrate may be prepared.

[0091] In block S702, a second type of ion implantation may be performed on the first type of substrate to form a first type of doped well, wherein at least a part of the upper surface of the first type of doped well is exposed, wherein the first type of substrate is adjacent to the second type of doped well, and a first PN junction is formed between the second type of doped well and the first type of substrate.

[0092] In block S703, a low-energy first-type ion implantation can be performed on a first-type substrate to form a second-type doped well, where at least a part of the upper surface of the second-type doped well is exposed, where the second-type doped well is adjacent to the first-type doped well, and where a second PN junction is formed between the first-type doped well and the second-type doped well.

[0093] In one embodiment, the first-type doped well and the first-type substrate can be of P type, and the second-type doped well can be of N type.

[0094] In block S704, a first electrode can be fabricated, and the first electrode is connected to at least a part of the upper surface of the first-type doped well and at least a part of the upper surface of the first-type substrate.

[0095] In block S705, a second electrode can be fabricated, and the second electrode is connected to at least a part of the upper surface of the second-type doped well.

[0096] In one embodiment, the first electrode is a negative electrode and the second electrode is a positive electrode. When the photodiode operates, both the first PN junction and the second PN junction are in a biased state.

[0097] In one embodiment, the lower surface of the first-type doped well is a flat plane, and the lower surface of the second-type doped well is a flat plane.

[0098] In one embodiment, the lower surface of the first-type doped well is a flat plane, and the second-type doped well includes one or more hollow structures.

[0099] Figure 8 is another exemplary manufacturing method of a photodiode according to at least one embodiment of the present disclosure. Those skilled in the art should understand that Figure 8 the flowcharts shown are only schematic, and without departing from the gist of the present invention, the various steps of the methods shown can be executed in a scrambled order, in reverse order, or in parallel, Figure 8 and in addition, some steps can be added or omitted.

[0100] To avoid redundancy, Figure 8 the same step S801 as in Figure 7 will not be described repeatedly.

[0101] In block S802, a shallow trench can be etched on the upper surface of the first-type substrate.

[0102] In block S803, a second type of ion implantation can be performed on the etched first type of substrate. For example, a second type of ion implantation can be performed on the etched first type of substrate to form a first type of doped well, wherein at least a portion of the upper surface of the first type of doped well is exposed, wherein the first type of substrate is adjacent to the second type of doped well, and a first PN junction is formed between the second type of doped well and the first type of substrate.

[0103] Due to the presence of the shallow trench etched in block S802, the second type of ions implanted in block S803 will diffuse in the first type of substrate into a shape similar to the distribution of the shallow trench, as Figure 6 shown. In the same vertical plane as the shallow trench, after the second type of ion implantation, it will diffuse to a deeper position in the first type of substrate and form PN junction contact surfaces with different depths with the first type of substrate (i.e., form one or more hollow structures). One or more of the hollow structures included in the second type of doped well can be rectangular in shape.

[0104] In block S804, a low-energy first type of ion implantation can be performed on the etched first type of substrate. For example, a low-energy first type of ion implantation can be performed on the etched first type of substrate to form a second type of doped well, wherein at least a portion of the upper surface of the second type of doped well is exposed, wherein the second type of doped well is adjacent to the first type of doped well, and a second PN junction is formed between the first type of doped well and the second type of doped well.

[0105] Due to the presence of the shallow trench etched in block S802, the low-energy first type of ion implantation performed in block S804 will diffuse in the first type of substrate into a shape similar to the distribution of the shallow trench, as Figure 6 shown. In the same vertical plane as the shallow trench, after the second type of ion implantation, it will diffuse to a deeper position in the first type of substrate and form PN junction contact surfaces with different depths with the first type of substrate (i.e., form one or more hollow structures). One or more of the hollow structures included in the first type of doped well can be trapezoidal in shape, but the present disclosure is not limited thereto.

[0106] A first electrode can be fabricated, and the first electrode is connected to at least a portion of the upper surface of the first type of doped well and at least a portion of the upper surface of the first type of substrate. A second electrode can be fabricated, and the second electrode is connected to at least a portion of the upper surface of the second type of doped well.

[0107] In one embodiment, the first electrode is a negative electrode and the second electrode is a positive electrode. During the operation of the photodiode, both the first PN junction and the second PN junction are in a biased state.

[0108] In S805, silicon oxide can be deposited in the shallow trench. For example, silicon oxide can be deposited in the shallow trench to form a light-trapping structure. For example, high-density plasma chemical vapor deposition can be used to fill the shallow trench with silicon oxide to form a light-trapping structure.

[0109] The present utility model provides a photodiode structure and a manufacturing method thereof. The doping well of the photodiode is improved into a hollow structure to increase the space charge region and reduce the recombination probability of photoelectrons (i.e., reduce the probability of electron-hole pair annihilation in the active region of the photodiode), thereby improving the photoelectric conversion efficiency and alleviating or solving the problem of low photoelectric conversion rate of the photodiode element in the prior art due to the long path of photoelectrons and their mid-way annihilation. In addition, the present utility model also forms a light-trapping structure by adding a shallow trench structure to increase the optical path of incident light in the photodiode and reduce the recombination probability of photoelectrons in the deeper part of the substrate. The photodiode according to the present utility model can improve the photoelectric conversion efficiency.

[0110] The text and drawings in this disclosure are provided only as examples to assist in understanding the disclosure. They should not be construed as limiting the scope of the disclosure in any way. Although certain embodiments and examples have been provided, it will be clear to those skilled in the art based on the content disclosed herein that the illustrated embodiments and examples can be changed without departing from the scope of the disclosure.

[0111] Although the disclosure has been described with exemplary embodiments, various changes and modifications can be suggested to those skilled in the art. The disclosure is intended to cover such changes and modifications that fall within the scope of the appended claims.

[0112] Any description in this disclosure should not be construed as implying that any particular element, step, or function is an essential element that must be included within the scope of the claims. The scope of the patent subject matter is defined only by the claims.

Claims

1. A photodiode, characterized in that, Comprising: A first-type doped well, at least a part of the upper surface of the first-type doped well being exposed; A second-type doped well, adjacent to the first-type doped well, at least a part of the upper surface of the second-type doped well being exposed; A first-type substrate, adjacent to the second-type doped well, at least a part of the upper surface of the first-type substrate being exposed; A first electrode, connected to at least the part of the upper surface of the first-type doped well and at least the part of the upper surface of the first-type substrate; A second electrode, connected to at least the part of the upper surface of the second-type doped well; Wherein, a first PN junction is formed between the second-type doped well and the first-type substrate; Wherein, a second PN junction is formed between the first-type doped well and the second-type doped well.

2. The photodiode according to claim 1, characterized in that, The first-type doped well and the first-type substrate are of P type, and the second-type doped well is of N type.

3. The photodiode according to claim 2, wherein, The first electrode is a negative electrode, and the second electrode is a positive electrode.

4. The photodiode according to claim 3, characterized in that, When the photodiode operates, both the first PN junction and the second PN junction are in a biased state.

5. The photodiode according to claim 1, characterized in that, The lower surface of the first-type doped well is a flat plane.

6. The photodiode according to claim 5, wherein, The lower surface of the second-type doped well is a flat plane.

7. The photodiode according to claim 5, characterized in that, The second-type doped well includes one or more hollow structures.

8. The photodiode according to claim 1, characterized in that, The first-type doped well includes one or more hollow structures.

9. The photodiode according to claim 8, wherein The second-type doped well includes one or more hollow structures.

10. The photodiode according to claim 8, characterized in that, One or more of the hollow structures included in the first-type doped well are trapezoidal in shape.

11. The photodiode according to claim 10, characterized in that, In one or more of the hollow structures included in the first-type doped well, there are light-trapping structures filled with silicon oxide.

12. The photodiode according to claim 7 or 9, characterized in that, One or more of the hollow structures included in the second-type doped well are rectangular in shape.

13. An electronic device, characterized in that, Comprising the photodiode according to any one of claims 1-12.

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