Relay driving circuit for charging pile

Abstract

The utility model provides a relay drive circuit for a charging pile, which relates to the technical field of electric automobile piles and comprises a first field effect transistor, a second field effect transistor, a first relay, a second relay, a third relay and a fourth relay. An S pole and a G pole of the first field effect transistor are connected, a first resistor is arranged between the S pole and the G pole of the first field effect transistor, a D pole of the first field effect transistor is connected with an S pole of the second field effect transistor, and a second resistor is arranged between the S pole and the G pole of the second field effect transistor. The second input ends of the first relay, the second relay, the third relay and the fourth relay are connected with the D pole of the second field effect transistor. The circuit is simple in structure and low in power consumption.

Description

Technical Field

[0001] The utility model relates to the technical field of AC charging piles for electric vehicles, and particularly relates to a relay driving circuit for a charging pile. Background Art

[0002] Among various control circuits of AC charging piles for electric vehicles, relays are relatively common interface circuits. In order to achieve high power and small volume for newly emerged new relays, the coil driving is usually divided into two stages: a start-up stage and a holding stage, and their coil currents correspond to the start-up current and the holding current respectively. Generally speaking, in order to provide the peak power at the moment when the contact is closed, the start-up current is relatively large; once the contact is closed, the power required to maintain the closed state of the contact is relatively small, so the holding current is relatively small. The existing technology of AC charging piles generally uses an electronic switch to drive the relay coil at the low end, and this circuit cannot meet the requirements of the new relay for the driving circuit. Using the traditional driving circuit will cause the coil to overheat and damage it.

[0003] Therefore, there is an urgent need for a relay driving circuit for a charging pile at present to meet the power supply requirements of the new high-power and small-volume relay. Summary of the Utility Model

[0004] The utility model provides a relay driving circuit for a charging pile, which solves the problem of driving a new high-power and small-volume relay.

[0005] In order to achieve the above purpose, the technical solution adopted by the utility model is as follows:

[0006] A relay driving circuit for a charging pile includes a first field-effect transistor, a second field-effect transistor, a first relay, a second relay, a third relay, and a fourth relay;

[0007] The S pole and the G pole of the first field-effect transistor are connected, and a first resistor is arranged therebetween. The D pole of the first field-effect transistor is connected to the S pole of the second field-effect transistor. The S pole and the G pole of the second field-effect transistor are connected, and a second resistor is arranged therebetween. The 2nd input terminals of the first relay, the second relay, the third relay, and the fourth relay are all connected to the D pole of the second field-effect transistor;

[0008] It further includes a third field-effect transistor and a fourth field-effect transistor. The D pole of the third field-effect transistor is connected to the 1st input terminals of the second relay, the third relay, and the fourth relay. The S pole and the G pole of the third field-effect transistor are connected, and a third resistor is arranged therebetween;

[0009] The D pole of the fourth field-effect transistor is connected to the 1st input terminal of the first relay. The S pole and the G pole of the fourth field-effect transistor are connected, and a fourth resistor is arranged therebetween.

[0010] Further, a first diode is provided between the second field effect transistor and the first relay, a second diode is provided between the second field effect transistor and the second relay, a third diode is provided between the second field effect transistor and the third relay, and a fourth diode is provided between the second field effect transistor and the fourth relay;

[0011] The 1st input terminal and the 2nd input terminal of the first relay, the 1st input terminal and the 2nd input terminal of the second relay, the 1st input terminal and the 2nd input terminal of the first relay, and the 1st input terminal and the 2nd input terminal of the first relay are connected to each other and a fifth diode is provided therebetween.

[0012] Further, a fifth resistor is connected to the 1st input terminal of the first relay, and the fifth resistor is arranged in parallel with the first diode;

[0013] A sixth resistor is connected to the 1st input terminal of the second relay, and the sixth resistor is arranged in parallel with the second diode;

[0014] A seventh resistor is connected to the 1st input terminal of the third relay, and the seventh resistor is arranged in parallel with the third diode;

[0015] An eighth resistor is connected to the 1st input terminal of the fourth relay, and the eighth resistor is arranged in parallel with the fourth diode.

[0016] In summary, due to the adoption of the above technical solutions, the beneficial effects of the present utility model are as follows:

[0017] The structure of the present utility model is simple, the cost is low, and the power consumption is low. Description of the Drawings

[0018] Figure 1 It is a schematic diagram of the circuit connection structure of the present utility model. Detailed Embodiment

[0019] The following will describe the present utility model in detail with reference to the drawings.

[0020] In order to make the purpose, technical solutions and advantages of the present utility model clearer, the present utility model will be further described in detail below with reference to the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present utility model, and are not used to limit the present utility model.

[0021] In this embodiment, a relay driving circuit for a charging pile is provided, as Figure 1 shown, which includes a first field effect transistor F2 and a second field effect transistor F1, a first relay K1, a second relay K2, a third relay K3 and a fourth relay K4;

[0022] The S pole and the G pole of the first field effect transistor F2 are connected, and a first resistor R101 is arranged therebetween. The D pole of the first field effect transistor F2 is connected to the S pole of the second field effect transistor F1. The S pole and the G pole of the second field effect transistor F2 are connected, and a second resistor R41 is arranged therebetween. The 2nd input ends of the first relay K1, the second relay K2, the third relay K3 and the fourth relay K4 are all connected to the D pole of the second field effect transistor F1;

[0023] It further includes a third field effect transistor Q1 and a fourth field effect transistor Q2. The D pole of the third field effect transistor Q1 is connected to the 1st input ends of the second relay K2, the third relay K3 and the fourth relay K4. The S pole and the G pole of the third field effect transistor Q1 are connected, and a third resistor R3 is arranged therebetween;

[0024] The D pole of the fourth field effect transistor is connected to the 1st input end of the first relay K1. The S pole and the G pole of the fourth field effect transistor Q4 are connected, and a fourth resistor R96 is arranged therebetween.

[0025] For further optimization of the above embodiment, a first diode D17 is arranged between the second field effect transistor F1 and the first relay K1. A second diode D16 is arranged between the second field effect transistor F1 and the second relay K2. A third diode D15 is arranged between the second field effect transistor F1 and the third relay K2. A fourth diode D14 is arranged between the second field effect transistor F1 and the fourth relay K4;

[0026] The 1st input end and the 2nd input end of the first relay K1, the 1st input end and the 2nd input end of the second relay K2, the 1st input end and the 2nd input end of the first relay K1 and the 1st input end and the 2nd input end of the first relay K1 are connected, and a fifth diode (D1, D10, D11 and D2) is arranged therebetween.

[0027] For further optimization of the above embodiment, a fifth resistor R100 is connected to the 1st input end of the first relay K1, and the fifth resistor R100 is arranged in parallel with the first diode D17;

[0028] A sixth resistor R99 is connected to the 1st input end of the second relay K2, and the sixth resistor R99 is arranged in parallel with the second diode D16;

[0029] A seventh resistor R45 is connected to the 1st input end of the third relay K3, and the seventh resistor R45 is arranged in parallel with the third diode D15;

[0030] The 1st input terminal of the fourth relay K4 is connected with an eighth resistor R44, and the eighth resistor R44 is arranged in parallel with a fourth diode D14.

[0031] Figure 1 RLY_L and RLY_N in [description] come from the GPIO pins of the single-chip microcomputer. The single-chip microcomputer drives the high-power relays on the L and N lines through these two pins to complete the closing and opening of the AC power supply. The separate driving signals for the L and N relays are for realizing the function of detecting relay adhesion. The RLY_RS signal is used to short-circuit or not short-circuit the resistors R44, R45, R99, and R100 connected in series on the relay coil, and after the relay is attracted, the short-circuit of the resistor is released and it is connected in series with the relay coil to reduce the power consumption of the relay.

[0032] The above are only the preferred embodiments of the present invention, and are not intended to limit the present invention. Any modifications, equivalent replacements, and improvements made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A relay driving circuit for a charging pile, characterized in that, Including a first field-effect transistor, a second field-effect transistor, a first relay, a second relay, a third relay, and a fourth relay; The S pole and the G pole of the first field-effect transistor are connected, and a first resistor is arranged therebetween. The D pole of the first field-effect transistor is connected to the S pole of the second field-effect transistor. The S pole and the G pole of the second field-effect transistor are connected, and a second resistor is arranged therebetween. The 2nd input terminals of the first relay, the second relay, the third relay, and the fourth relay are all connected to the D pole of the second field-effect transistor; It further includes a third field-effect transistor and a fourth field-effect transistor. The D pole of the third field-effect transistor is connected to the 1st input terminals of the second relay, the third relay, and the fourth relay. The S pole and the G pole of the third field-effect transistor are connected, and a third resistor is arranged therebetween; The D pole of the fourth field-effect transistor is connected to the 1st input terminal of the first relay. The S pole and the G pole of the fourth field-effect transistor are connected, and a fourth resistor is arranged therebetween.

2. The relay driving circuit for a charging pile according to claim 1, wherein, A first diode is arranged between the second field-effect transistor and the first relay. A second diode is arranged between the second field-effect transistor and the second relay. A third diode is arranged between the second field-effect transistor and the third relay. A fourth diode is arranged between the second field-effect transistor and the fourth relay; The 1st input terminal and the 2nd input terminal of the first relay, the 1st input terminal and the 2nd input terminal of the second relay, the 1st input terminal and the 2nd input terminal of the third relay, and the 1st input terminal and the 2nd input terminal of the fourth relay are connected, and a fifth diode is arranged therebetween.

3. The relay driving circuit for a charging pile according to claim 2, characterized in that, A fifth resistor is connected to the 1st input terminal of the first relay, and the fifth resistor is arranged in parallel with the first diode; A sixth resistor is connected to the 1st input terminal of the second relay, and the sixth resistor is arranged in parallel with the second diode; A seventh resistor is connected to the 1st input terminal of the third relay, and the seventh resistor is arranged in parallel with the third diode; An eighth resistor is connected to the 1st input terminal of the fourth relay, and the eighth resistor is arranged in parallel with the fourth diode.

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