Communication circuit integrating IIC communication and single-wire communication functions

Abstract

The utility model discloses a communication circuit integrating an IIC communication function and a single-wire communication function. According to the utility model, the circuit part is realized by an information reading circuit and an information forwarding circuit; the information reading circuit part is composed of a voltameter chip and a single-chip microcomputer circuit. The information forwarding circuit part is composed of a single-chip microcomputer and an external circuit. The information of the voltameter is read through the single-chip microcomputer, then programmed and simulated through the single-chip microcomputer, the read information is transferred out through the IO ports, and the information can be converted into IIC communication and single-line communication at the same time through several groups of IO ports, so that access of a host system is facilitated. Data reading and data forwarding are realized, and a communication mode that a single-chip microcomputer simulates a slave computer is provided; the device is simple in implementation process principle and easy to implement in mass production.

Description

Technical Field

[0001] The utility model relates to a field, and more specifically, to a communication circuit with IIC communication and single-line communication functions integrated into one. Background Art

[0002] With the development of electronic technology, the use of portable electronic devices has become increasingly common. Therefore, the safety of battery packs has attracted more and more attention, and people hope to obtain more battery information.

[0003] Currently, the chips inside battery packs, in addition to providing charge and discharge protection, are also required to have communication capabilities so users can access battery information in real time. However, most chips use the IIC communication interface, and some older systems or devices may not have redundant communication interfaces. Battery packs may only contain chips with IIC communication capabilities, or some non-Chinese chips may only have single-line communication capabilities, which cannot be used in domestically produced products.

[0004] Therefore, how to enable old systems or devices to have communication functions has become one of the urgent problems to be solved by those skilled in the art. Utility Model Content

[0005] The technical problem to be solved by the present invention is to overcome the deficiencies in the prior art and provide a communication circuit that integrates IIC communication and single-line communication functions, which not only meets the communication needs of existing new equipment, but also provides an upgrade solution for old systems or equipment, and accesses battery information under an existing physical channel.

[0006] The utility model discloses a communication circuit with IIC communication and single-line communication functions in one, which is realized by the following technical scheme. The circuit part is realized by two circuits: reading information and forwarding information. The information reading circuit part is composed of an electricity meter chip and a single-chip microcomputer circuit; the information forwarding circuit part is composed of a single-chip microcomputer and an external circuit. The electricity meter information is read by the single-chip microcomputer, and then the read information is transferred out through the IO port after being simulated by the single-chip microcomputer programming. Several groups of IO ports can be used to simultaneously convert to IIC communication and single-line communication, so as to facilitate access by the host system.

[0007] The IIC bus is a serial bus that uses two signal lines for communication: one clock line SCL and one data line SDA. When the clock line is at a high level, the data line is pulled low as the start signal and pulled high as the end signal. When transmitting data, the data line can only change the data when the clock line is at a low level, and 1 bit of data is transmitted during the high level of each clock pulse. The single-chip microcomputer can either act as the host to access the data of the fuel gauge chip or act as the slave to report relevant information to the external host. Since all the clock line and data line pin outputs on the IIC bus are open-drain structures, the wire-AND logic relationship of the SDA and SCL signals of all nodes on the bus is realized by connecting an external pull-up resistor.

[0008] During single-wire communication, the single-chip microcomputer acts as the slave and the external upper computer acts as the host to access the information stored in the single-chip microcomputer flash. Similarly, this pin is also set to the open-drain mode and a pull-up resistor is connected to realize the communication on the bus.

[0009] The pull-up resistor is 4.7K.

[0010] During the process of reading information, the single-chip microcomputer reads out all the battery information according to the communication method of the fuel gauge or protection chip and stores it in a specific FLASH area to prepare for forwarding the information.

[0011] During the forwarding process, the single-chip microcomputer simulates the slave to communicate. The host system can access the single-chip microcomputer according to the standard IIC communication protocol: The host first sends a start signal, and then sends an address code (this code is the pre-agreed address code of the single-chip microcomputer) to the single-chip microcomputer, and the direction is read. Wait for the single-chip microcomputer to receive this address code. If it is the same as the agreed code, it will send an acknowledgment signal to the host. After the host receives the acknowledgment signal, it sends a register code to the single-chip microcomputer. This code corresponds to the address in the FLASH. After the single-chip microcomputer checks the data correctly, it sends an acknowledgment signal to the host again. At this time, the host has to send the address code again and change the communication direction to read. After the single-chip microcomputer receives it, it starts to send the data corresponding to the address in the FLASH to the host. After the host receives it, it checks the correctness of the data and gives an acknowledgment signal. If you need to continue the communication, repeat this process. If there is no need to communicate, the host sends an end signal to end this communication.

[0012] The host system can also access the single-chip microcomputer through a single wire: The single bus requires a strict signaling protocol to ensure the integrity of the data. Here, four signaling protocols are adopted: the initialization process (reset pulse and subsequent online acknowledgment pulse), write 0, write 1, and read data. Except for the online acknowledgment pulse, all other signals are sent by the bus host.

[0013] Compared with the prior art, the beneficial effects of the present utility model are:

[0014] This utility model is realized by two parts: reading data and forwarding data, and provides a communication mode of a single-chip microcomputer simulating a slave; the implementation process principle of this utility model is simple and easy to mass-produce, so this utility model has high industrial utilization value. Description of the Drawings

[0015] Figure 1 It is the timing diagram of the initialization process of this utility model;

[0016] Figure 2 It is the timing diagram of the write data time slot process of this utility model;

[0017] Figure 3 It is the timing diagram of the read data time slot process of this utility model;

[0018] Figure 4 It is the IIC interface circuit at the single-chip microcomputer end of this utility model;

[0019] Figure 5 It is the single-wire communication interface circuit at the single-chip microcomputer end of this utility model (DQ is the single-wire communication pin). Detailed Implementation Modes

[0020] In order to be able to more clearly understand the above-mentioned objects, features and advantages of this utility model, the following describes this utility model in detail in conjunction with the drawings and specific implementation modes. It should be noted that, without conflict, the implementation modes of this application and the features in the implementation modes can be combined with each other. In the following description, many specific details are set forth in order to fully understand this utility model. The described implementation modes are only a part of the implementation modes of this utility model, rather than all of the implementation modes. Based on the implementation modes in this utility model, all other implementation modes obtained by those of ordinary skill in the art without making creative efforts fall within the scope of protection of this utility model. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which this utility model belongs. The terms used in the description of this utility model herein are only for the purpose of describing specific implementation modes, and are not intended to limit this utility model.

[0021] Such as Figure 4-5As shown in the figure, a communication circuit with both IIC communication and single-wire communication functions is realized by two parts of circuits: the information reading circuit and the information forwarding circuit. The information reading circuit consists of a fuel gauge chip and a single-chip microcomputer circuit; the information forwarding circuit consists of a single-chip microcomputer and an external circuit. The single-chip microcomputer reads the fuel gauge information, and then through programming simulation of the single-chip microcomputer, the read information is transferred out through the IO port. Several groups of IO ports can be used to simultaneously convert to IIC communication and single-wire communication, facilitating access by the host system. The IIC bus is a serial bus that uses two signal lines for communication: one clock line SCL and one data line SDA; when the clock line is at a high level, the data line is pulled low as the start signal and pulled high as the end signal; when transmitting data, the data line can only change data when the clock line is at a low level, and 1 bit of data is transmitted during the high level of each clock pulse; the single-chip microcomputer can act as a host to access the data of the fuel gauge chip and also act as a slave to report relevant information to the external host; since all the clock line and data line pin outputs on the IIC bus are open-drain structures, the wire-and logic relationship of the SDA and SCL signals of all nodes on the bus is realized by connecting an external pull-up resistor; during single-wire communication, the single-chip microcomputer acts as a slave and the external host computer acts as a host to access the information stored in the single-chip microcomputer flash; this pin is also set to the open-drain mode and a pull-up resistor is connected to realize communication on the bus.

[0022] During the information reading process, the single-chip microcomputer reads out all the battery information according to the communication method of the fuel gauge or protection chip and stores it in a specific FLASH area to prepare for information forwarding.

[0023] During the forwarding process, the single-chip microcomputer simulates slave communication, and the host system can access the single-chip microcomputer according to the standard IIC communication protocol: the host first sends a start signal, and then sends an address code (this code is the pre-agreed address code of the single-chip microcomputer) to the single-chip microcomputer, with the direction being read; wait for the single-chip microcomputer to receive this address code, if it is the same as the agreed code, then send an acknowledgement signal to the host, the host receives the acknowledgement signal, and then sends a register code to the single-chip microcomputer, this code corresponds to the address in the FLASH, after the single-chip microcomputer checks the data is correct, it sends an acknowledgement signal to the host again; at this time, the host needs to send the address code again and change the communication direction to read, after the single-chip microcomputer receives it, it starts to send the data corresponding to the address in the FLASH to the host, after the host receives it, it checks the correctness of the data and gives an acknowledgement signal. If you need to continue communication, repeat this process, if there is no need to communicate, the host sends an end signal to end this communication.

[0024] The host system can also access the single-chip microcomputer through a single wire: The single bus requires a strict signaling protocol to ensure data integrity. Four signaling protocols are adopted here: the initialization process (reset pulse and subsequent online acknowledgement pulse), write 0, write 1, and read data. All other signals except the online acknowledgement pulse are sent by the bus host.

[0025] Any communication with the microcontroller must start with an initialization process, as Figure 1 shown. The online response pulse after the reset pulse indicates that the microcontroller is ready to receive the address command. The host issues a reset pulse that lasts for 480 - 960 μs. Then the host releases the bus and enters the receive mode, and the pull-up resistor pulls the bus to a high level. After the microcontroller detects the rising edge on the bus, it will wait for 15 - 60 μs and then issue an online response pulse that lasts for 60 - 240 μs.

[0026] When the host pulls the bus from a logic high level to a logic low level, a write time slot starts, as Figure 2 shown. There are two types of write time slots: write 1 and write 0. All write time slots must be maintained for 60 - 120 μs, and a minimum recovery time of 1 μs is required between two write time slots. The microcontroller samples the bus data between 15 - 60 μs after the falling edge of the line. If the bus is high during sampling, it is a write 1; if the bus is low during sampling, it is a write 0. If the host wants to write 1, it must first pull the bus low and then release it, and pull the bus high within 15 μs; if the host wants to write 0, it must pull the bus low and keep it low throughout the duration of the write time slot.

[0027] When the host pulls the bus from a logic high level to a logic low level, a read time slot starts, as Figure 3 shown. The host must keep the bus at a low level for at least 1 μs and then release the bus to enable the microcontroller to output valid data. The host samples the data within 15 μs after the start of the read time slot. The microcontroller releases the bus at the end of the read time slot, allowing the external pull-up resistor to pull it to a high level. All read time slots must be maintained for 60 - 120 μs, and a minimum recovery time of 1 μs is required between two read time slots.

[0028] Embodiment:

[0029] A certain protection chip has IIC communication. Connect its IIC communication interface to the IO port of the microcontroller, add a suitable pull-up resistor to the Vcc of the microcontroller, and the protection chip and the microcontroller share the ground. The microcontroller can read and store the battery information obtained by the protection chip; another group of I0 ports (interface 1) of the microcontroller are connected to resistors and led out, and the IO port (interface 2) for single-wire communication can also be led out. When an external host needs single-wire communication, it can be connected to the IO port (interface 2) of the microcontroller for single-wire communication. At the same time, other hosts with IIC communication interfaces can also be connected to interface 1 of the microcontroller to obtain battery information through IIC communication.

[0030] The above are only the preferred embodiments of the present utility model. It should be noted that for those of ordinary skill in the art, without departing from the principle of the present utility model, several improvements and modifications can be made, and these improvements and modifications should also be regarded as the protection scope of the present utility model.

Claims

1. A communication circuit integrating IIC communication and single-wire communication functions, characterized in that, The circuit part is implemented by two parts of circuits: the information reading circuit and the information forwarding circuit; the information reading circuit part consists of a fuel gauge chip and a single-chip microcomputer circuit; the information forwarding circuit part consists of a single-chip microcomputer and an external circuit; the single-chip microcomputer reads the fuel gauge information, and then through programming simulation of the single-chip microcomputer, the read information is transferred out through the IO port, or several groups of IO ports are simultaneously converted into IIC communication and single-wire communication; The IIC bus is a serial bus that uses two signal lines for communication: one clock line SCL and one data line SDA; when the clock line is at a high level, the data line is pulled low as the start signal and pulled high as the end signal; when transmitting data, the data line can only change the data when the clock line is at a low level, and 1 bit of data is transmitted during the high level of each clock pulse; the single-chip microcomputer can not only act as a host to access the data of the fuel gauge chip, but also act as a slave to report relevant information to an external host; since all the clock line and data line pin outputs on the IIC bus are open-drain structures, the wire-and logic relationship of the SDA and SCL signals of all nodes on the bus is realized by connecting an external pull-up resistor; During single-wire communication, the single-chip microcomputer acts as a slave and the external host computer acts as a host to access the information stored in the single-chip microcomputer flash; similarly, this pin is also set to the open-drain mode, and a pull-up resistor is connected to realize communication on the bus.

2. The communication circuit with both IIC communication and single-wire communication functions as claimed in claim 1, characterized in that The pull-up resistor is 4.7K.

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