Linear Hall chip with anti-backflow function
By incorporating anti-return circuit at the Hall output end and using PMOS tube to control the secondary op amp, the problem of backflow of linear Hall sensor electrical signals is solved, and the protection of backflow without pressure difference is achieved, reducing costs and operation pressure.
Patent Information
- Application Number
- CN202422401283.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-30
- Publication Date
- 2025-08-22
- Estimated Expiration
- 2034-09-30
AI Technical Summary
Existing linear Hall sensors are prone to electrical signal backflow in magnetic shaft keyboards, resulting in chaos in the chip working state. The existing anti-return solution is expensive or increases the operation pressure of the main control chip.
The built-in anti-return circuit is the Hall output terminal. The PMOS tube is used as a switching device to prevent the current backflow by controlling the output signal of the secondary op amp, and the sensitivity adjustment is performed in combination with the sensitivity analog switch and the adjustment device.
Achieve no pressure difference-proof protection, reduce material costs, reduce the operation pressure of the main control chip, and prevent the chip from entering the wrong working state.
Smart Images
Figure CN223261518U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of Hall chips, in particular to a linear Hall chip with an anti-backflow function. Background Art
[0002] A Hall effect chip is a chip used to detect magnetic fields and operates based on the Hall effect. The output signal level of a full-range linear Hall effect sensor depends on the strength of the magnetic field applied to the sensitive surface of the device, varying proportionally with the magnetic field strength.
[0003] Currently, linear Hall sensors in magnetic keyboards typically operate using a row-column scanning method. The main control chip receives the output signals of each Hall sensor row by row in the layout order within a certain period of time, then scans the next row until all key signals are received, forming a signal reception cycle. This method enables fast key press response. However, because the output ports of Hall sensors in the same row operate in parallel, the output ports of Hall sensors in the same row are affected by the outputs of other Hall sensors connected in parallel. The output current of the active chip can flow back into the inactive chips, generating a reverse input voltage that pulls up the chip power supply, disrupting the sensor's operating state and causing it to enter an incorrect operating state.
[0004] Although some anti-backflow solutions have emerged, the existing anti-backflow treatment on magnetic axis keyboards is generally divided into two types: one is to connect a diode in series to the output port of each Hall sensor, and then process the output signal in parallel. This is very expensive and the output voltage value will reduce the voltage difference of the conduction voltage of a diode; the other is to connect the output of the Hall sensor in parallel to a multi-select analog switch, and select the key signal output by controlling the on and off of the switch, but this will also increase the cost and increase the computing pressure of the main control chip. Utility Model Content
[0005] In view of the defects in the prior art, the utility model provides a linear Hall chip with an anti-backflow function to prevent the backflow of external electrical signals.
[0006] In order to achieve the above purpose, the technical solution adopted by the utility model is:
[0007] A linear Hall chip with an anti-backflow function is applied to a Hall sensor and includes a two-stage operational amplifier deployed in the linear Hall chip. The linear Hall chip has a built-in anti-backflow circuit at the Hall output end. The anti-backflow circuit includes an anti-backflow processor. The anti-backflow processor includes a first input end, a second input end, a load tube, a first output end, and a second output end. The first input end is connected to the Hall output end VOUT of the linear Hall chip, the second input end is connected to the power supply end VDD of the linear Hall chip, and the two inputs are connected to the load tube for adjusting the trigger voltage difference after passing through current-limiting resistors. The first output end is connected to the second output end through a switching device, and the second output end is connected to the two-stage operational amplifier through a switching tube. The two-stage operational amplifier is also connected to the first input end of the anti-backflow processor through the switching tube.
[0008] Preferably, the switching device is a PMOS tube, the substrate of the PMOS tube is connected to the second output end, and the output signal of the second output end is used to control the power input of the switching tube.
[0009] Preferably, the output voltage value of the output signal is equal to the voltage of the power supply terminal VDD.
[0010] Preferably, the control signal output from the first output terminal also outputs a synchronous control signal with a polarity opposite to that of the control signal through an inverter, and is transmitted to the control terminal of the previous stage signal transmission switch for controlling the input path of the secondary operational amplifier.
[0011] Preferably, the secondary operational amplifier includes a secondary output amplifier, and the secondary output amplifier is connected to the switch tube and the first input end respectively.
[0012] Preferably, a sensitivity analog switch is further disposed in the linear Hall chip, the anti-backflow circuit is further connected to the sensitivity analog switch, and the sensitivity analog switch is further connected to the secondary operational amplifier.
[0013] Preferably, a regulating device is further connected between the sensitivity analog switch and the secondary operational amplifier.
[0014] Preferably, the regulating device is an adjustable resistor.
[0015] Preferably, the sensitivity analog switch is a multi-bit sensitivity analog switch.
[0016] The beneficial effects of the present invention are as follows: by building an anti-backflow circuit into the Hall output end to protect the output end and prevent external electrical signals from flowing back, and by using a PMOS tube device as the switch device for controlling the output of the secondary operational amplifier, no conduction voltage drop is generated when turned on, which does not affect the voltage output level of the chip during normal operation, thereby achieving no-voltage difference anti-backflow protection, thereby preventing the voltage and current at the chip output port from flowing back into the chip and entering an erroneous working state. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the following briefly describes the drawings required for the specific embodiments or the description of the prior art. Similar elements or parts are generally identified by similar reference numerals throughout the drawings. Elements or parts in the drawings are not necessarily drawn to scale.
[0018] Figure 1 A circuit schematic diagram of an anti-backflow circuit for a linear Hall chip with an anti-backflow function provided by an embodiment of the utility model;
[0019] Figure 2 This is a block diagram of the internal structure of a linear Hall chip with anti-backflow function provided by an embodiment of the utility model. DETAILED DESCRIPTION
[0020] The following embodiments of the technical solution of the present invention are described in detail with reference to the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solution of the present invention and are therefore only examples and are not intended to limit the scope of protection of the present invention.
[0021] It should be noted that, unless otherwise specified, the technical terms or scientific terms used in this application should have the common meanings understood by those skilled in the art to which this utility model belongs.
[0022] like Figure 1 、 Figure 2As shown, a linear Hall chip with an anti-backflow function is applied to a Hall sensor, including a two-stage operational amplifier deployed in the linear Hall chip. The linear Hall chip has a built-in anti-backflow circuit at the Hall output end. The anti-backflow circuit includes an anti-backflow processor. The anti-backflow processor includes a first input end, a second input end, a load tube, a first output end, and a second output end. The first input end is connected to the Hall output end VOUT of the linear Hall chip, the second input end is connected to the power supply end VDD of the linear Hall chip, and the two inputs are connected to the load tube for adjusting the trigger voltage difference after passing through a current limiting resistor. The first output end is connected to the second output end through a switching device, and the second output end is connected to the two-stage operational amplifier through a switching tube. The two-stage operational amplifier is also connected to the first input end of the anti-backflow processor through the switching tube.
[0023] In this embodiment, the two-stage operational amplifier includes a two-stage output amplifier, and the two-stage output amplifier is connected to the switch tube and the first input end respectively.
[0024] The switching device adopts a PMOS tube, the substrate of the PMOS tube is connected to the second output end, and the output signal of the second output end is used to control the power input of the switching tube; wherein the output voltage value of the output signal is equal to the voltage of the power supply end VDD.
[0025] It is important to note that the substrate of the switch tube [P1] PMOS cannot be connected to the power supply VDD like the source, but must be connected to the drain terminal V_ch. This is a key step in preventing backflow.
[0026] This is because for the general circuit connection structure, the substrate end of a PMOS tube must be connected to the highest potential in the chip, that is, the power supply potential VDD, in order to work normally; however, in this solution, the anti-backflow effect is required, and the substrate end of the PMOS tube can only be connected to the low potential end, that is, V_ch. Otherwise, the PMOS tube structure will have a constant conduction state and cannot achieve the anti-backflow effect.
[0027] The control signal output from the first output end also outputs a synchronous control signal with a polarity opposite to that of the control signal through an inverter, and is transmitted to the control end of the previous-stage signal transmission switch, which is used to control the input path of the secondary operational amplifier and to turn on or off the input signal of the secondary operational amplifier.
[0028] It should be noted that the linear Hall chip of this embodiment also includes an existing clock circuit, a logic circuit, a bias source circuit, and a reference source circuit, etc., which are well known to those skilled in the art and will not be described in detail here.
[0029] The anti-backflow circuit is Figure 1The structure of the dotted box is removed; the dotted box is part of the secondary operational amplifier; the switching device is Figure 1 In P1, the switch tube is Figure 1 P2 in Figure 2 The output amplifier in is a secondary output amplifier;
[0030] The input signal is Figure 2 In the embodiment, the front stage signal is transmitted through the Hall plate, the Hall voltage amplifier and the offset circuit; the front stage signal transmission switch and Figure 2 The transfer switches in have the same meaning.
[0031] In this embodiment, the control signal output by the first output terminal is represented by P_g in the accompanying drawings, and the synchronous control signal with opposite polarity is represented by N_g; the output signal of the second output terminal is represented by V_ch in the accompanying drawings. The V_ch signal is also an output signal, and the output voltage value is equal to the power supply voltage VDD, but is controlled by the control of the switching device to turn on or off; it is used to control the remaining circuits that are directly connected to the VOUT output port, and V_ch needs to be used instead of the power supply voltage interface VDD.
[0032] To better understand this solution, its working process is as follows:
[0033] When the voltage VOUT at the Hall output terminal is greater than the power supply voltage VDD, it is considered that anti-backflow protection is required at this time, and the output P_g is high, turning off the secondary op amp output control switch PMOS[P1], blocking the previous stage signal path; thereby preventing the Hall output terminal from driving the power supply terminal to generate an operating voltage;
[0034] When the Hall output voltage VOUT is lower than the power supply voltage VDD, the Hall sensor works normally and does not need anti-backflow protection. The output P_g is low level, the secondary op amp output control switch PMOS[P1] is turned on, and the front-stage signal path is turned on, so that the chip can work normally.
[0035] Since the output control switch of the secondary op amp is a PMOS tube device, no conduction voltage drop will be generated when it is turned on, so it will not affect the voltage output level when the chip is working normally.
[0036] The above technical solution protects the output end by building an anti-backflow circuit into the Hall output end to prevent the backflow of external electrical signals, and uses a PMOS tube device to control the output of the secondary operational amplifier. When it is turned on, no conduction voltage drop will be generated, and the voltage output level of the chip during normal operation will not be affected, thereby achieving no-voltage difference anti-backflow protection, thereby preventing the voltage and current at the chip output port from flowing back into the chip and entering an erroneous working state; at the same time, since the Hall sensor has its own anti-backflow function, it can reduce the circuit cost of the magnetic axis keyboard solution for anti-backflow processing, reduce material costs, alleviate the calculation and output pressure of the keyboard main control chip, and effectively reduce the solution cost.
[0037] Furthermore, in another embodiment, based on the above technical solution, referring to Figure 2 A sensitivity analog switch is also deployed in the linear Hall chip, the anti-backflow circuit is also connected to the sensitivity analog switch, and the sensitivity analog switch is also connected to the secondary operational amplifier.
[0038] During implementation, an adjustment device is also connected between the sensitivity analog switch and the secondary operational amplifier to perform sensitivity adjustment; the adjustment device uses an adjustable resistor, and the sensitivity analog switch is a multi-bit sensitivity analog switch; through the implementation of the above scheme, on the basis of realizing the anti-backflow function, sensitivity adjustment can also be performed.
[0039] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or replace some or all of the technical features therein with equivalents. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present invention, and they should all be included in the scope of the claims and description of the present invention.
Claims
1. A linear Hall chip with anti-backflow function, applied to a Hall sensor, comprising a secondary operational amplifier deployed in the linear Hall chip, characterized in that: The linear Hall chip has a built-in anti-backflow circuit at the Hall output end. The anti-backflow circuit includes an anti-backflow processor. The anti-backflow processor includes a first input end, a second input end, a load tube, a first output end, and a second output end. The first input end is connected to the Hall output end VOUT of the linear Hall chip, and the second input end is connected to the power supply end VDD of the linear Hall chip. The two inputs are connected to the load tube for adjusting the trigger voltage difference after passing through a current-limiting resistor. The first output end is connected to the second output end through a switching device, and the second output end is connected to the secondary operational amplifier through a switching tube. The secondary operational amplifier is also connected to the first input end of the anti-backflow processor through the switching tube.
2. The linear Hall chip with anti-backflow function according to claim 1, characterized in that: The switching device is a PMOS tube, the substrate of the PMOS tube is connected to the second output end, and the output signal of the second output end is used to control the power input of the switching tube.
3. The linear Hall chip with anti-backflow function according to claim 2, characterized in that: An output voltage value of the output signal is equal to a voltage of the power supply terminal VDD.
4. The linear Hall chip with anti-backflow function according to claim 3, characterized in that: The control signal outputted from the first output terminal also outputs a synchronous control signal with opposite polarity to the control signal through an inverter, and transmits it to the control terminal of the preceding signal transmission switch for controlling the input path of the secondary operational amplifier.
5. The linear Hall chip with anti-backflow function according to claim 4, characterized in that: The secondary operational amplifier includes a secondary output amplifier, and the secondary output amplifier is connected to the switch tube and the first input end respectively.
6. A linear Hall chip with anti-backflow function according to claim 1 or 5, characterized in that: A sensitivity analog switch is further disposed in the linear Hall chip, the anti-backflow circuit is further connected to the sensitivity analog switch, and the sensitivity analog switch is further connected to the secondary operational amplifier.
7. The linear Hall chip with anti-backflow function according to claim 6, characterized in that: A regulating device is also connected between the sensitivity analog switch and the secondary operational amplifier.
8. The linear Hall chip with anti-backflow function according to claim 7, characterized in that: The regulating device adopts an adjustable resistor.
9. The linear Hall chip with anti-backflow function according to claim 7, characterized in that: The sensitivity analog switch is a multi-bit sensitivity analog switch.