Biasing circuit irrelevant to voltage and temperature

Through the negative and positive temperature coefficient resistance connected in series and the bias circuit of the clamp diode or MOS tube, the problem of gain in the GaAs circuit being affected by temperature and power supply voltage is solved, and the stability of the bias voltage and the improvement of chip integration is achieved.

CN223296324UActive Publication Date: 2025-09-02SICHUAN BOWEI TECH CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202422936129.5
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-11-29
Publication Date
2025-09-02
Estimated Expiration
2034-11-29

AI Technical Summary

Technical Problem

The gain of the pHEMT tube in the GaAs circuit is severely affected by the temperature and power supply voltage. The existing bias circuit cannot reduce the impact of power supply voltage fluctuations and temperature fluctuations at the same time, and the GaAs process and CMOS process cannot achieve single-chip integration.

Method used

The first negative temperature coefficient resistor, the second negative temperature coefficient resistor and the positive temperature coefficient resistor connected in series are used to clamp the diode or MOS tube in parallel, and the bias voltage is independent of the temperature and voltage through the voltage division of different temperature coefficient resistors and the clamping of the diode.

Benefits of technology

The stability of the bias voltage is achieved, the chip area is reduced, the chip integration is improved, the structure is simplified, and the integration is easy to be achieved under the same process.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN223296324U_ABST
    Figure CN223296324U_ABST
Patent Text Reader

Abstract

The utility model discloses a bias circuit irrelevant to voltage and temperature, which belongs to the technical field of radio frequency, and comprises a first negative temperature coefficient resistor R0, a second negative temperature coefficient resistor R1 and a positive temperature coefficient resistor R2 which are connected in series, and a clamping diode D1 is connected in parallel at two ends of the R1 and the R2 which are connected in series. The relationship between the diode voltage and the partial voltage of the resistor R1 and the resistor R2 along with temperature change is opposite, and mutual compensation can be realized, so that the bias voltage is irrelevant to the temperature; meanwhile, the clamping effect of the diode is utilized, so that the bias voltage is irrelevant to the fluctuation of the power supply, that is, the bias voltage finally output by the bias circuit is irrelevant to the temperature and the voltage, and the stability of the bias voltage is ensured. Furthermore, compared with a bandgap + LDO circuit combination, the biasing circuit only comprises two resistors and one diode, the biasing circuit and a chip can be easily integrated in the same technology, the area of the chip is reduced, and the integration level of the chip is improved.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The utility model relates to the field of radio frequency technology, in particular to a bias circuit which is independent of voltage and temperature. Background Art

[0002] In GaAs circuits, the gain of pHEMT tubes is seriously affected by temperature and power supply voltage. If a relatively stable gain value is required, the bias voltage needs to be kept stable under the change of temperature and voltage. In GaAs process RF circuits, two RF bias structures are commonly used: current mirror bias or resistor divider bias. Figure 1 As shown, the current mirror bias structure includes a transistor, the gate of the transistor is connected to its source and then connected to the power supply VDD, and the gate of the transistor is connected to the radio frequency circuit (RF circuit) through a resistor. At this time, the bias voltage Vg output by the current mirror bias structure is Vg=Vg1, where Vg1 represents the voltage between the gate and source of the transistor. At this time, Vg fluctuates greatly with temperature changes and fluctuates less with voltage changes. Figure 2 As shown, the resistor divider structure includes resistors R1 and R2 connected in series, resistor R1 is connected to the power supply VDD, resistor R2 is grounded, and the RF circuit is connected between resistors R1 and R2. At this time, the bias voltage Vg output between resistors R1 and R2 is VDD_RF*R2 / (R1+R2), where VDD_RF is the power supply voltage of the RF circuit. At this time, Vg fluctuates greatly with voltage changes and fluctuates slightly with temperature changes. Both bias structures cannot reduce the impact of power supply voltage fluctuations and temperature fluctuations at the same time.

[0003] Furthermore, existing bias circuits that are independent of voltage and temperature often use a circuit combination of bandgap (bandgap reference) + LDO (low dropout linear regulator). The circuit combination of bandgap + LDO often uses CMOS technology, while the RF amplifier itself uses GaAs technology, which cannot be integrated into a single chip and can only be implemented through SIP, increasing the chip area. Utility Model Content

[0004] The purpose of the utility model is to overcome the problems of the prior art and provide a bias circuit that is independent of voltage and temperature.

[0005] The purpose of the utility model is achieved through the following technical solution: a bias circuit that is independent of voltage and temperature, the bias circuit comprising a first negative temperature coefficient resistor, a second negative temperature coefficient resistor and a positive temperature coefficient resistor connected in series, a clamping diode being connected in parallel at both ends of the second negative temperature coefficient resistor and the positive temperature coefficient resistor after the series connection, and a bias voltage of the radio frequency circuit being output between the second negative temperature coefficient resistor and the positive temperature coefficient resistor.

[0006] In one example, the clamping diode is replaced by a MOS transistor, the source of the MOS transistor serves as the anode of the diode, and the source and drain of the MOS transistor are connected to serve as the cathode of the diode.

[0007] In one example, the first negative temperature coefficient resistor is connected to a power supply, the positive temperature coefficient resistor is grounded, the anode of the clamping diode or the source of the MOS tube is connected between the first negative temperature coefficient resistor and the second negative temperature coefficient resistor, and the cathode of the clamping diode or the source and drain of the MOS tube are connected and then connected to the ground end of the positive temperature coefficient resistor.

[0008] In one example, the value range of R1 is 2kΩ-7kΩ; the value range of R2 is 2kΩ-7kΩ.

[0009] In one example, the bias circuit also includes a voltage divider resistor group, which includes several voltage divider resistors connected in series. One end of the voltage divider resistor group is connected between the second negative temperature coefficient resistor and the positive temperature coefficient resistor, and the other end is grounded. Multiple bias voltages of different sizes are drawn between two adjacent voltage divider resistors.

[0010] It should be further explained that the technical features corresponding to the above examples can be combined or replaced with each other to form a new technical solution.

[0011] Compared with the prior art, the present invention has the following beneficial effects:

[0012] 1. In one example, a diode or a diode-connected MOS tube is used as a bias part, and its voltage is negatively correlated with temperature. A second negative temperature coefficient resistor and a positive temperature coefficient resistor with different temperature coefficients are used to divide the voltage, so that the voltage divider ratio is a positive temperature coefficient relationship. The relationship between the diode voltage or the MOS gate-source voltage and the resistor voltage divider changes with temperature is opposite, and they can compensate each other, thereby making the bias voltage independent of temperature. At the same time, the clamping effect of the diode can maintain a small voltage fluctuation, making the bias voltage independent of the fluctuation of the power supply, that is, the bias voltage finally output by the bias circuit is independent of temperature and voltage, thereby ensuring the stability of the bias voltage. Furthermore, compared with the bandgap+LDO circuit combination, the bias circuit of the present application only includes two resistors and one diode, the structure is greatly simplified, and it is easy to integrate with the chip under the same process, reducing the chip area and improving the chip integration.

[0013] 2. In one example, a voltage divider resistor group is introduced to provide multiple bias voltages of different sizes, which can meet the DC voltage requirements of different RF circuits and can provide DC voltage for multiple RF circuits at the same time. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] The specific implementation methods of the present invention are further described in detail below in conjunction with the accompanying drawings. The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The same reference numerals are used in these drawings to represent the same or similar parts. The schematic embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application.

[0015] Figure 1 The schematic diagram of the existing current mirror bias circuit is shown in FIG.

[0016] Figure 2 This is the schematic diagram of the existing resistor voltage divider bias circuit;

[0017] Figure 3 A schematic diagram of a bias circuit provided as an example of the present utility model;

[0018] Figure 4 A schematic diagram of a stable bias voltage obtained by multiplying the negative temperature coefficient of the diode anode voltage and the positive temperature coefficient of the voltage divider resistor provided in an example of the present invention;

[0019] Figure 5 This is a schematic diagram of a bias circuit provided in another example of the present invention. DETAILED DESCRIPTION

[0020] The following is a clear and complete description of the technical solution of the present invention in conjunction with the accompanying drawings. Obviously, the embodiments described are only some of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making any creative efforts are within the scope of protection of the present invention.

[0021] In the description of the present invention, it should be noted that the directions or positional relationships indicated by "center", "up", "down", "left", "right", "vertical", "horizontal", "inside", "outside", etc. are based on the directions or positional relationships described in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the use of ordinal numbers (for example, "first and second", "first to fourth", etc.) is for the purpose of distinguishing objects and is not limited to this order, and cannot be understood as indicating or implying relative importance.

[0022] In the description of this utility model, it should be noted that, unless otherwise expressly specified or limited, the terms "mounted," "connected," and "connected" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integral connections; mechanical connections, electrical connections; direct connections, indirect connections through an intermediate medium, and internal communication between two components. Those skilled in the art will understand the specific meanings of the above terms in this utility model in specific contexts.

[0023] In addition, the technical features involved in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0024] In one example, if Figure 3 As shown, a bias circuit that is independent of voltage and temperature includes a first negative temperature coefficient resistor R0, a second negative temperature coefficient resistor R1, and a positive temperature coefficient resistor R2 connected in series. That is, resistors R0 and R1 both have negative temperature coefficients, and their resistance values ​​decrease as temperature increases. When resistor R1 with a negative temperature coefficient is used for voltage division, the resistor voltage division ratio decreases, which will result in a decrease in the output bias voltage. Resistor R2 has a positive temperature coefficient, and its resistance value increases as temperature increases. When resistors with a positive temperature coefficient are used for voltage division, the resistor voltage division ratio increases, which will result in an increase in the output bias voltage. Furthermore, the series-connected resistors R1 and R2 function as a whole, with a clamping diode D1 connected in parallel at both ends. The bias voltage of the RF circuit is output between resistors R1 and R2, that is, the common connection point between resistors R1 and R2 is connected to the RF circuit.

[0025] Optionally, the clamping diode may be replaced by a diode-connected MOS transistor, that is, the source of the MOS transistor serves as the anode of the diode, and the source and drain of the MOS transistor are connected as the cathode of the diode, thereby exhibiting diode characteristics.

[0026] Furthermore, resistor R0 is connected to power supply VDD, resistor R2 is grounded, the anode of the clamping diode or the source of the MOS transistor is connected between resistor R0 and resistor R1, and the cathode of the clamping diode or the source and drain of the MOS transistor are connected to the ground terminal of resistor R2, that is, the cathode of the clamping diode or the source and drain of the MOS transistor are connected between resistor R2 and ground. As an implementation method, resistor R2 is connected to power supply VDD via resistor R0, resistor R1 is grounded, the anode of the clamping diode or the source of the MOS transistor is connected between resistor R0 and resistor R2, and the cathode of the clamping diode or the source and drain of the MOS transistor are connected and then connected to the ground terminal of resistor R1.

[0027] against Figure 3In the bias circuit shown, set R1 = k1*Temp, R2 = k2*Temp, where Temp is the temperature value, k1 and k2 are the temperature coefficients of R1 and R2 respectively, where k1 < 0, k2 > 0, then the bias voltage Vref = (V1 / (R1+R2))*R2 = V1*(1 / (R1 / R2+1)), V1 is the diode anode voltage, which has a negative temperature coefficient, and 1 / (R1 / R2+1) is a positive temperature coefficient, as shown in Figure 4 As shown, V1*(1 / (R1 / R2+1)) can obtain a stable bias voltage, so that the bias voltage Vref has the performance that is independent of temperature and voltage.

[0028] In one example, the value range of R1 is 2kΩ-7kΩ, preferably 5kΩ; the value range of R2 is 2kΩ-7kΩ, preferably 3kΩ.

[0029] In one example, if Figure 5 As shown, the bias circuit also includes a voltage-divider resistor group, which includes several voltage-divider resistors r0, r1...rn connected in series. The voltage-divider resistors r0, r1...rn are connected in series as a whole (voltage-divider resistor group), one end of which is connected between the resistor R1 and the resistor R2, and the other end is grounded. Multiple bias voltages Vref1...Vrefn of different sizes are drawn between two adjacent voltage-divider resistors to meet the DC voltage requirements in different RF circuits, and can provide DC voltage to multiple RF circuits at the same time.

[0030] The present invention uses a diode (or a diode-connected MOS transistor) as part of the bias circuit. The diode's anode voltage V1 (or the MOS transistor's gate-source voltage) is negatively correlated with temperature. Voltage-dividing resistors R1 and R2 with different temperature coefficients achieve a voltage-dividing ratio with a positive temperature coefficient. The diode voltage and the resistor voltage change in opposite directions with temperature, allowing them to compensate for each other and achieve temperature-independence of the bias voltage. The clamping function of the diode (or diode-connected MOS transistor) is then utilized to minimize voltage fluctuations, ensuring that the bias voltage is independent of power supply fluctuations. That is, the bias voltage ultimately output by the bias circuit is independent of both temperature and voltage, thereby ensuring bias voltage stability. The present invention utilizes the mutual cancellation of positive and negative temperature coefficients for temperature compensation and the diode's clamping function to avoid voltage fluctuations. This design is not highly sensitive to chips produced by different FAB manufacturers and can be transplanted to different GaAs processes using the same principle. Therefore, the present invention's technical solution is highly mature, reliable, and versatile.

[0031] Furthermore, compared with the bandgap+LDO circuit combination, the bias circuit of the present application only includes two resistors and one diode, the structure is greatly simplified, and it is easy to integrate with the chip under the same process, reducing the chip area and improving the chip integration.

[0032] The above specific implementation methods are detailed descriptions of the present invention. It cannot be determined that the specific implementation methods of the present invention are limited to these descriptions. For ordinary technicians in the technical field to which the present invention belongs, they can make several simple deductions and substitutions without departing from the concept of the present invention, which should be regarded as falling within the scope of protection of the present invention.

Claims

1. A bias circuit that is independent of voltage and temperature, characterized in that The bias circuit includes a first negative temperature coefficient resistor, a second negative temperature coefficient resistor and a positive temperature coefficient resistor connected in series. A clamping diode is connected in parallel at both ends of the second negative temperature coefficient resistor and the positive temperature coefficient resistor connected in series. The bias voltage of the radio frequency circuit is output between the second negative temperature coefficient resistor and the positive temperature coefficient resistor.

2. The voltage- and temperature-independent bias circuit according to claim 1, wherein: The clamping diode is replaced by a MOS tube, the source of the MOS tube serves as the anode of the diode, and the source and drain of the MOS tube are connected to serve as the cathode of the diode.

3. The voltage- and temperature-independent bias circuit according to claim 1 or 2, characterized in that: The first negative temperature coefficient resistor is connected to the power supply, the positive temperature coefficient resistor is grounded, the anode of the clamping diode or the source of the MOS tube is connected between the first negative temperature coefficient resistor and the second negative temperature coefficient resistor, and the cathode of the clamping diode or the source and drain of the MOS tube are connected and then connected to the ground end of the positive temperature coefficient resistor.

4. The voltage- and temperature-independent bias circuit according to claim 1 or 2, wherein: The value range of the second negative temperature coefficient resistor is 2kΩ-7kΩ; the value range of the positive temperature coefficient resistor is 2kΩ-7kΩ.

5. The voltage- and temperature-independent bias circuit according to claim 1 or 2, wherein: The bias circuit also includes a voltage-divider resistor group, which includes several voltage-divider resistors connected in series. One end of the voltage-divider resistor group is connected between the second negative temperature coefficient resistor and the positive temperature coefficient resistor, and the other end is grounded. Multiple bias voltages of different sizes are drawn between two adjacent voltage-divider resistors.