High-capacity three-dimensional memory module

Abstract

The utility model aims to provide the high-capacity three-dimensional memory module which is small in occupied plane space, stable and reliable in structure and convenient to produce. The memory comprises a first circuit board and at least one group of second circuit boards, the first circuit board is provided with a plurality of connecting pins, all the second circuit boards are stacked above the first circuit board and are packaged into a whole, one surface of each second circuit board is provided with a plurality of first memory chips, and the other surface of each second circuit board is provided with a plurality of second memory chips. The other surface of the second circuit board is provided with a second memory chip, and the plurality of first memory chips and the second memory chip are connected in parallel through a printed circuit on the second circuit board. The memory module is applied to the technical field of memory modules.

Description

Technical Field

[0001] The utility model is applied to the technical field of memory modules, and particularly relates to a large-capacity three-dimensional memory module. Background Art

[0002] Currently, most large-capacity memory devices are packaged in a planar format, meaning a single chip is integrated on a single plane. Due to limitations on the space occupied by certain devices using printed circuit boards in certain locations, it may be necessary to reduce the planar area of ​​the printed circuit boards, particularly for large-capacity three-dimensional memory modules widely used in aviation, aerospace, and other fields. However, the field of large-capacity memory modules is constrained by technology and supply chain issues, necessitating the development of a three-dimensional stacked large-capacity three-dimensional memory module based on a domestically produced material system and supply chain to meet both spatial and structural stability requirements. Utility Model Content

[0003] The technical problem to be solved by the utility model is to overcome the deficiencies of the prior art and provide a large-capacity three-dimensional memory module which occupies little plane space, has a stable and reliable structure and is easy to produce.

[0004] The technical solution adopted by the present invention is as follows: the present invention includes a first circuit board and at least one group of second circuit boards, the first circuit board is provided with a plurality of connecting pins, all the second circuit boards are stacked and arranged above the first circuit board and packaged as one, one side of the second circuit board is provided with a plurality of first memory chips, and the other side of the second circuit board is provided with a second memory chip, and the plurality of first memory chips and the second memory chips are connected in parallel through the printed circuit on the second circuit board; all the second circuit boards are packaged as one with the first circuit board through an epoxy resin layer; the edges of the first circuit board and the plurality of second circuit boards after packaging are cut to form cutting parts, and the exposed printed circuit lines of the cutting parts on the first circuit board and the plurality of second circuit boards are connected one-to-one through gold-plated connecting wires.

[0005] As can be seen from the above scheme, the first circuit board is used as a pin circuit board, and connecting pins are set to make external connections. At least one group of second circuit boards is set as a functional layer to set the memory chip, wherein the first memory chip is used for data storage and the second memory chip is used for error checking and correction. By adopting a stacking design, a number of memory chips are distributed in a three-dimensional manner, thereby reducing the overall plane space occupied, and the layout and number of the first memory chips, as well as the number of second circuit boards, can be adjusted according to actual needs, thereby achieving the expansion of storage performance. By adopting a structure that is packaged as one, the overall structure of the first circuit board and the second circuit board is guaranteed to be stable and the connection is reliable, and the above structure is simple and easy to assemble quickly. The gold-plated connecting wires are used to realize the correlation connection of the circuits of the first circuit board and the second circuit board, so that the circuit boards are connected accordingly, which can achieve a three-dimensional structure while ensuring assembly efficiency.

[0006] A preferred solution is that both the first memory chip and the second memory chip are DDR3 memory chips with a 4 GiT capacity and a 16-bit data bus width.

[0007] A preferred solution is that several of the connecting pins of the first circuit board are of a ball grid array packaging structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 It is a structural diagram of the utility model;

[0009] Figure 2 This is a circuit principle block diagram of the utility model. DETAILED DESCRIPTION

[0010] like Figure 1 and Figure 2 As shown, in this embodiment, the utility model includes a first circuit board 1 and at least one group of second circuit boards 2, the first circuit board 1 is provided with a plurality of connecting pins 11, all the second circuit boards 2 are stacked and arranged above the first circuit board 1 and packaged as one body, one side of the second circuit board 2 is provided with a plurality of first memory chips 21, and the other side of the second circuit board 2 is provided with a second memory chip 22, and the plurality of first memory chips 21 and the second memory chips 22 are connected in parallel through the printed circuit on the second circuit board 2.

[0011] In this embodiment, the present invention comprises a set of second circuit boards 2, four sets of first memory chips 21, and one set of second memory chips 22. Both the first memory chips 21 and the second memory chips 22 are DDR3 memory chips with a 4Gbit capacity and a 16-bit data bus width. The four sets of first memory chips 21 are connected to form a storage unit. The second memory chips 22 are used for error checking and correction, thereby providing a 16G storage unit with a 72-bit data bus width. The second circuit board 2 is also provided with corresponding peripheral resistor and capacitor components.

[0012] In this embodiment, all second circuit boards 2 are encapsulated integrally with the first circuit board 1 via an epoxy resin layer 3. The epoxy resin layer 3 provides a fixed connection between all second circuit boards 2 and the first circuit board 1. A gap is provided between the first circuit board 1 and the closest second circuit board 2, as well as between adjacent second circuit boards 2. The epoxy resin layer 3 is formed by encapsulating the gap with epoxy resin and then potting. An epoxy resin layer 3 is also provided on the outer side of the outermost second circuit board 2 to provide component encapsulation and protection.

[0013] In this embodiment, the edges of the first circuit board 1 and the plurality of second circuit boards 2 are each provided with a cutout portion. The printed circuit lines exposed in the cutout portions on the first circuit board 1 and the plurality of second circuit boards 2 are connected one-to-one via gold-plated connecting wires. The cutout portions are formed by cutting the first circuit board 1 and the plurality of second circuit boards 2 after packaging. The printed circuit lines are exposed after the cutout portions are formed on the edges of the first circuit board 1 and the plurality of second circuit boards 2. The gold-plated connecting wires are formed by gold plating on the outer surfaces of the first circuit board 1, the second circuit board 2, and the epoxy resin layer 3. The gold-plated connecting wires connect the circuits of the first circuit board 1 and the second circuit board 2.

[0014] In this embodiment, the plurality of connecting pins 11 of the first circuit board 1 are packaged in a ball grid array (BGA) structure. The BGA structure ensures that sufficient pin connections are provided while occupying a small space, thereby ensuring reliable connection between the first circuit board 1 and the external circuit.

[0015] Although the embodiments of the present invention are described with practical solutions, they do not limit the meaning of the present invention. For those skilled in the art, it is obvious to modify the implementation scheme and combine it with other solutions based on this description.

Claims

1. A large-capacity three-dimensional memory module, comprising a first circuit board (1), wherein the first circuit board (1) is provided with a plurality of connecting pins (11), characterized in that: The large-capacity three-dimensional memory module further comprises at least one group of second circuit boards (2), all of the second circuit boards (2) are stacked and arranged above the first circuit board (1) and packaged as one body, a plurality of first memory chips (21) are arranged on one side of the second circuit board (2), and a second memory chip (22) is arranged on the other side of the second circuit board (2), and the plurality of first memory chips (21) and the second memory chips (22) are connected in parallel via a printed circuit on the second circuit board (2); all of the second circuit boards (2) are packaged as one body with the first circuit board (1) via an epoxy resin layer (3); the edges of the first circuit board (1) and the plurality of second circuit boards (2) after packaging are cut to form a cutting portion, and the exposed printed circuit lines on the cutting portions of the first circuit board (1) and the plurality of second circuit boards (2) are connected one-to-one via gold-plated connecting wires.

2. The large-capacity stereo memory module according to claim 1, characterized in that: The first memory chip (21) and the second memory chip (22) are both DDR3 memory chips with a 4 GiT capacity and a 16-bit data bus width.

3. The large-capacity stereo memory module according to claim 1, characterized in that: The plurality of connecting pins (11) of the first circuit board (1) are of a ball grid array packaging structure.

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