Packaging heat dissipation structure and semiconductor module

Abstract

The utility model provides a packaging heat dissipation structure and a semiconductor module, and relates to the technical field of semiconductor packaging. The packaging heat dissipation structure comprises a substrate, a packaging chip, a first heat conduction layer, a second heat conduction layer and a heat dissipation cover. The packaging chip is attached to the surface of one side of the substrate. The first heat conduction layer is arranged on the surface of one side, deviating from the substrate, of the packaging chip; the second heat-conducting layer is arranged on the surface of one side, deviating from the substrate, of the packaging chip, and is spaced from the first heat-conducting layer; the heat dissipation cover is attached to the substrate and covers the packaging chip. Wherein the heat dissipation cover is simultaneously contacted with the first heat conduction layer and the second heat conduction layer, and the heat conductivity of the first heat conduction layer is different from that of the second heat conduction layer. Compared with the prior art, heat conduction between the heat dissipation cover and the packaging chip is achieved through the first heat conduction layer and the second heat conduction layer, the heat conduction effect is better, heat dissipation can be rapidly achieved, the overall heat dissipation effect is improved, heat conduction of different partitions of the chip can be achieved, and heat dissipation is more accurate and reliable.

Description

Technical Field

[0001] The utility model relates to the technical field of semiconductor packaging, in particular to a packaging heat dissipation structure and a semiconductor module. Background Art

[0002] With the rapid development of the semiconductor industry, SIP system-level packaging (SIP) products utilize FC-BGA packaging, often leveraging its flip-chip bumps to provide a higher-density I / O layout. This packaging technology reduces the footprint by 30% to 60% compared to traditional packaging. However, improved product performance requires the integration of more chips and passive components, necessitating improved heat dissipation. Conventional methods typically utilize a mounted heatsink cover for heat dissipation, while traditional heat dissipation layers utilize indium sheets. However, due to its low melting point, indium easily overflows to the chip edge. Furthermore, the heat dissipation layer is connected to the chip surface via an adhesive layer, resulting in poor thermal conductivity and, consequently, poor overall heat dissipation. Utility Model Content

[0003] The purpose of the present invention includes providing a packaged heat dissipation structure and a semiconductor module, which can improve the heat dissipation effect and realize heat conduction in different areas of the chip, so that the heat dissipation is more precise.

[0004] The embodiment of the present utility model can be implemented as follows:

[0005] In a first aspect, the present invention provides a package heat dissipation structure, comprising:

[0006] substrate;

[0007] A packaged chip, wherein the packaged chip is attached to a surface of one side of the substrate;

[0008] a first heat-conducting layer, the first heat-conducting layer being arranged on a surface of the packaged chip facing away from the substrate;

[0009] a second heat-conducting layer, the second heat-conducting layer being arranged on a surface of the packaged chip facing away from the substrate and spaced apart from the first heat-conducting layer;

[0010] a heat dissipation cover, the heat dissipation cover being attached to the substrate and covering the outside of the packaged chip;

[0011] The heat dissipation cover is in contact with both the first heat conducting layer and the second heat conducting layer, and the first heat conducting layer and the second heat conducting layer have different thermal conductivities.

[0012] In an optional embodiment, the first heat-conducting layer is disposed in the middle of a surface of the packaged chip facing away from the substrate, and the second heat-conducting layers are respectively disposed on both sides of the first heat-conducting layer.

[0013] In an optional embodiment, there are two second heat-conducting layers, which are respectively arranged on both sides of the first heat-conducting layer, and the heat-conducting area of ​​each second heat-conducting layer is smaller than the heat-conducting area of ​​the first heat-conducting layer.

[0014] In an optional embodiment, the first heat-conducting layer and the second heat-conducting layer are both rectangular, and the thermal conductivity of the first heat-conducting layer is greater than the thermal conductivity of the second heat-conducting layer.

[0015] In an optional embodiment, an adhesive layer is further provided between the inner surface of the heat dissipation cover and the surface of the packaged chip facing away from the substrate.

[0016] In an optional embodiment, the adhesive layer covers a surface of the packaged chip facing away from the substrate, and wraps around the first heat conducting layer and the second heat conducting layer.

[0017] In an optional embodiment, the adhesive layer, the first heat-conducting layer, and the second heat-conducting layer have the same thickness.

[0018] In an optional embodiment, a filling glue layer is further provided between the packaged chip and the substrate, and the filling glue layer is provided in the heat dissipation cover and covers the bottom area of ​​the packaged chip.

[0019] In an optional embodiment, solder balls are further provided on a side of the substrate facing away from the packaged chip, and the solder balls are electrically connected to the packaged chip through the substrate.

[0020] In a second aspect, the present invention provides a semiconductor module, comprising a circuit board and a package heat dissipation structure as described in any one of the aforementioned embodiments, wherein the substrate is attached to the surface of the circuit board.

[0021] The package heat dissipation structure and semiconductor module provided by the embodiments of the present invention have the following beneficial effects:

[0022] The packaged heat dissipation structure and semiconductor module provided by the present invention embodiment have a packaged chip attached to one surface of a substrate, and a first heat-conducting layer and a second heat-conducting layer disposed on the back of the packaged chip, with the first and second heat-conducting layers spaced apart. A heat dissipation cover is attached to the substrate and covers the packaged chip, wherein the heat dissipation cover contacts both the first and second heat-conducting layers, and the first and second heat-conducting layers have different thermal conductivities. Compared to the prior art, the present invention achieves better heat conduction between the heat dissipation cover and the packaged chip through the first and second heat-conducting layers, resulting in faster heat dissipation and improved overall heat dissipation. It also enables heat conduction in different chip zones, resulting in more accurate and reliable heat dissipation. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following is a brief introduction to the drawings required for use in the embodiments. It should be understood that the following drawings only illustrate certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without paying any creative work.

[0024] Figure 1 A schematic diagram of the structure of the package heat dissipation structure provided in this embodiment from a first viewing angle;

[0025] Figure 2 A schematic diagram of the partial structure of the package heat dissipation structure provided in this embodiment at a second viewing angle;

[0026] Figures 3 to 6 A schematic diagram of the process flow of the method for preparing the packaged heat dissipation structure provided in this embodiment.

[0027] Icon: 100-package heat dissipation structure; 110-base; 120-package chip; 130-first heat conduction layer; 140-second heat conduction layer; 150-heat dissipation cover; 160-adhesive layer; 170-solder ball; 180-filling layer. DETAILED DESCRIPTION

[0028] As disclosed in the background, conventional heat sinks typically use indium sheets for heat dissipation. However, indium sheets have a low melting point and tend to overflow onto the chip edges, resulting in poor heat dissipation. Furthermore, conventional heat sinks are typically bonded to the back of the chip with an adhesive layer, which has poor thermal conductivity, affecting overall heat dissipation performance and resulting in poor heat dissipation. Furthermore, the full coverage of the adhesive layer prevents zoned heat dissipation on the chip, resulting in poor heat dissipation accuracy.

[0029] In order to solve the above problems, the present invention provides a novel package heat dissipation structure. The specific structure and principle of the package heat dissipation structure are introduced below.

[0030] To make the purpose, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings herein can be arranged and designed in various different configurations.

[0031] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but rather merely represents selected embodiments of the present invention. All other embodiments derived by persons of ordinary skill in the art based on the embodiments of the present invention without creative effort are intended to fall within the scope of protection of the present invention.

[0032] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, it does not need to be further defined or explained in subsequent drawings.

[0033] In the description of the present invention, it should be noted that if the terms "upper", "lower", "inside", "outside", etc. appear, the orientation or position relationship indicated is based on the orientation or position relationship shown in the accompanying drawings, or is the orientation or position relationship in which the utility model product is usually placed when in use. It is only for the convenience of describing the present invention and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, it cannot be understood as a limitation on the present invention.

[0034] In addition, the terms "first", "second", etc., if used, are merely used to distinguish and describe, and should not be understood as indicating or implying relative importance.

[0035] The embodiment of the utility model provides a package heat dissipation structure, which can improve the heat dissipation effect and realize heat conduction in different areas of the chip, so that the heat dissipation is more precise.

[0036] See also Figure 1 and Figure 2 The package heat dissipation structure 100 provided by the embodiment of the present invention includes a substrate 110, a package chip 120, a first heat-conducting layer 130, a second heat-conducting layer 140 and a heat dissipation cover 150. The package chip 120 is attached to one side surface of the substrate 110; the first heat-conducting layer 130 is arranged on the side surface of the package chip 120 away from the substrate 110; the second heat-conducting layer 140 is arranged on the side surface of the package chip 120 away from the substrate 110, and is spaced apart from the first heat-conducting layer 130; the heat dissipation cover 150 is attached to the substrate and covers the outside of the package chip 120; wherein the heat dissipation cover 150 is in contact with the first heat-conducting layer 130 and the second heat-conducting layer 140 at the same time, and the thermal conductivity of the first heat-conducting layer 130 and the second heat-conducting layer 140 are different.

[0037] It should be noted that the base 110 herein may be a structure such as a substrate, baseboard, or frame. A packaged chip 120 is attached to one surface of the base 110, and a first heat-conducting layer 130 and a second heat-conducting layer 140 are disposed on the back of the packaged chip 120, with the first and second heat-conducting layers 130, 140 spaced apart. A heat dissipation cover 150 is attached to the base and covers the packaged chip 120. The heat dissipation cover 150 is in contact with both the first and second heat-conducting layers 130, 140, and the first and second heat-conducting layers 130, 140 have different thermal conductivities. Heat conduction between the heat dissipation cover 150 and the packaged chip 120 is achieved through the first and second heat-conducting layers 130, 140, resulting in better thermal conductivity, faster heat dissipation, and improved overall heat dissipation. Heat conduction can also be achieved in different chip zones, resulting in more accurate and reliable heat dissipation.

[0038] In some embodiments, the first heat-conducting layer 130 is disposed in the middle of the surface of the packaged chip 120 facing away from the substrate 110, and the second heat-conducting layer 140 is disposed on both sides of the first heat-conducting layer 130. Preferably, the first heat-conducting layer 130 is located at the center of the back surface of the packaged chip 120, while the second heat-conducting layer 140 is located near the edge of the packaged chip 120. This allows different heat-conducting layers to be used for different heat-generating areas of the packaged chip 120 to conduct and dissipate heat, resulting in more accurate and reliable heat dissipation.

[0039] Furthermore, in some embodiments, there are two second heat-conducting layers 140, which are respectively disposed on either side of the first heat-conducting layer 130, and the heat-conducting area of ​​each second heat-conducting layer 140 is smaller than the heat-conducting area of ​​the first heat-conducting layer 130. Specifically, the first heat-conducting layer 130 and the second heat-conducting layer 140 are disposed separately, and the two second heat-conducting layers 140 are respectively disposed on the left and right sides of the first heat-conducting layer 130. In addition, the width of the first heat-conducting layer 130 is greater than the width of the second heat-conducting layer 140. Therefore, the first heat-conducting layer 130 plays a primary role in heat conduction, while the second heat-conducting layer 140 plays a secondary role in heat conduction.

[0040] In some embodiments, the first heat-conducting layer 130 and the second heat-conducting layer 140 are both rectangular, and the thermal conductivity of the first heat-conducting layer 130 is greater than that of the second heat-conducting layer 140. Preferably, the geometric centers of the first heat-conducting layer 130 and the two second heat-conducting layers 140 are on the same horizontal line, thereby better dissipating heat from the center of the back side of the packaged chip 120. Of course, the first heat-conducting layer 130 and the second heat-conducting layer 140 may also adopt other shapes, such as circular or diamond-shaped, and are not specifically limited here.

[0041] It should be noted that the first thermally conductive layer 130 here can be a nano-silver thermally conductive layer with a thermal conductivity of 429 W / (mK), and the second thermally conductive layer 140 can be a nano-copper thermally conductive layer with a thermal conductivity of 401 W / (mK). The first thermally conductive layer 130 and the second thermally conductive layer 140 are both printed using 3D printing technology. Therefore, the shape and size of the first thermally conductive layer 130 and the second thermally conductive layer 140 can be designed according to the technical requirements of the actual packaging chip 120. Of course, the specific materials selected for the first thermally conductive layer 130 and the second thermally conductive layer 140 are merely illustrative and do not serve any limiting purpose.

[0042] In some embodiments, an adhesive layer 160 is further disposed between the inner surface of the heat dissipation cover 150 and the surface of the packaged chip 120 facing away from the substrate 110. Specifically, the heat dissipation cover 150 and the packaged chip 120 are again fixed via the adhesive layer 160, ensuring the fit and secure fixation of the heat dissipation cover 150. The adhesive layer 160 may be a thermally conductive adhesive layer to further improve thermal conductivity.

[0043] Preferably, the adhesive layer 160 covers the surface of the packaged chip 120 facing away from the substrate 110 and surrounds the first thermally conductive layer 130 and the second thermally conductive layer 140. Specifically, the adhesive layer 160 can be formed by a 3D printing process, and the adhesive layer 160 can cover the entire back surface of the packaged chip 120, ensuring a sufficient bonding area and, therefore, a sufficient fixing effect.

[0044] In some embodiments, the adhesive layer 160, the first thermally conductive layer 130, and the second thermally conductive layer 140 have the same thickness. Specifically, the adhesive layer 160, the first thermally conductive layer 130, and the second thermally conductive layer 140 have the same thickness. Therefore, the adhesive layer 160 can expose the first thermally conductive layer 130 and the second thermally conductive layer 140, preventing the adhesive layer 160 from covering the first thermally conductive layer 130 and the second thermally conductive layer 140. This ensures that the first thermally conductive layer 130 and the second thermally conductive layer 140 can both be in direct thermal contact with the heat dissipation cover 150, thereby ensuring effective heat conduction and heat dissipation.

[0045] In some embodiments, a filler layer 180 is further disposed between the packaged chip 120 and the substrate 110. The filler layer 180 is disposed within the heat dissipation cover 150 and covers the bottom region of the packaged chip 120. Specifically, the packaged chip 120 can be mounted on the pads of the substrate 110 using a flip-chip process. The bumps of the flip-chip can be soldered to the pads using reflow soldering. A dispensing process can then be used to form the filler layer 180 at the bottom. The filler layer can then be fixed by baking, thereby forming a protective layer for the bottom solder structure.

[0046] In some embodiments, a solder ball 170 is further provided on a side of the substrate 110 facing away from the packaged chip 120. The solder ball 170 is electrically connected to the packaged chip 120 through the substrate 110. Specifically, the solder ball 170 can be formed by a ball planting process and electrically connected to the packaged chip 120 through a wiring structure inside the substrate 110.

[0047] The present invention also provides a method for preparing a heat dissipation packaging structure:

[0048] First, see Figure 3 , take a substrate, use the flip-chip mounting method to mount the package chip 120, use the reflow soldering method to solder the flip-chip bumps to the pads, and then use the dispensing process to form an underfill protection at the bottom of the flip-chip soldering structure to form a filling glue layer 180. Figure 4 The adhesive layer is fixed by baking, and the first heat-conducting layer 130 and the second heat-conducting layer 140 are printed again using 3D printing technology. The first heat-conducting layer 130 is a nano-silver heat-conducting layer with a thermal conductivity of 429W / (mk), and the second heat-conducting layer 140 is a nano-copper heat-conducting layer with a thermal conductivity of 401W / (mk). The thermal conductivity of the first heat-conducting layer 130 is greater than that of the second heat-conducting layer 140. Different blocks are designed to achieve heat conduction in different areas of the chip. Figure 5 , and then use 3D printing technology to print the adhesive layer 160 again, adhere the heat dissipation cover 150, and finally mount the heat dissipation cover 150. Figure 6 Then, the solder balls are formed on the back of the substrate using the ball planting process. Finally, the product is cut into individual products using the cutting process to complete the process.

[0049] The present invention also provides a semiconductor module including a circuit board and a package heat dissipation structure 100. The package heat dissipation structure 100 includes a substrate 110, a package chip 120, a first heat-conducting layer 130, a second heat-conducting layer 140, and a heat dissipation cover 150. The package chip 120 is attached to a side surface of the substrate 110; the first heat-conducting layer 130 is disposed on a side surface of the package chip 120 facing away from the substrate 110; the second heat-conducting layer 140 is disposed on a side surface of the package chip 120 facing away from the substrate 110 and is spaced apart from the first heat-conducting layer 130; the heat dissipation cover 150 is attached to the substrate and covers the package chip 120; the heat dissipation cover 150 is in contact with both the first heat-conducting layer 130 and the second heat-conducting layer 140, and the first heat-conducting layer 130 and the second heat-conducting layer 140 have different thermal conductivities. The substrate 110 is attached to a surface of the circuit board. Specifically, the circuit board can be a PCB board, and the substrate 110 is attached to a solder pad on the circuit board via solder balls 170.

[0050] In summary, the packaged heat dissipation structure 100 and semiconductor module of the present invention has a packaged chip 120 attached to one side surface of a substrate 110, and a first heat-conducting layer 130 and a second heat-conducting layer 140 disposed on the back side of the packaged chip 120. The first heat-conducting layer 130 and the second heat-conducting layer 140 are spaced apart, and a heat dissipation cover 150 is attached to the substrate and covers the packaged chip 120. The heat dissipation cover 150 is in contact with both the first heat-conducting layer 130 and the second heat-conducting layer 140, and the first heat-conducting layer 130 and the second heat-conducting layer 140 have different thermal conductivities. Compared to the prior art, the present invention achieves heat conduction between the heat dissipation cover 150 and the packaged chip 120 through the first heat-conducting layer 130 and the second heat-conducting layer 140, resulting in better thermal conductivity, faster heat dissipation, and improved overall heat dissipation. It also achieves heat conduction in different chip partitions, resulting in more accurate and reliable heat dissipation.

[0051] It should be noted that, in the absence of conflict, the features in the embodiments of the present invention can be combined with each other.

[0052] The above is only a specific implementation method of the present invention, but the protection scope of the present invention is not limited to this. Any changes or replacements that can be easily thought of by any technician familiar with this technical field within the technical scope disclosed in the present invention should be included in the protection scope of the present invention.

Claims

1. A package heat dissipation structure, characterized in that: include: substrate; A packaged chip, wherein the packaged chip is attached to a surface of one side of the substrate; a first heat-conducting layer, the first heat-conducting layer being arranged on a surface of the packaged chip facing away from the substrate; a second heat-conducting layer, the second heat-conducting layer being arranged on a surface of the packaged chip facing away from the substrate and spaced apart from the first heat-conducting layer; a heat dissipation cover, the heat dissipation cover being attached to the substrate and covering the outside of the packaged chip; The heat dissipation cover is in contact with both the first heat conducting layer and the second heat conducting layer, and the first heat conducting layer and the second heat conducting layer have different thermal conductivities.

2. The package heat dissipation structure according to claim 1, characterized in that: The first heat-conducting layer is arranged at the middle portion of a surface of the packaged chip facing away from the substrate, and the second heat-conducting layers are respectively arranged on both sides of the first heat-conducting layer.

3. The package heat dissipation structure according to claim 2, characterized in that: There are two second heat-conducting layers, which are respectively arranged on both sides of the first heat-conducting layer, and the heat-conducting area of ​​each second heat-conducting layer is smaller than the heat-conducting area of ​​the first heat-conducting layer.

4. The package heat dissipation structure according to claim 3, characterized in that: The first heat-conducting layer and the second heat-conducting layer are both rectangular, and the thermal conductivity of the first heat-conducting layer is greater than the thermal conductivity of the second heat-conducting layer.

5. The package heat dissipation structure according to claim 1, characterized in that: An adhesive layer is further provided between the inner surface of the heat dissipation cover and a surface of the packaged chip facing away from the substrate.

6. The package heat dissipation structure according to claim 5, characterized in that: The adhesive layer covers a surface of the packaged chip facing away from the substrate, and wraps around the first heat-conducting layer and the second heat-conducting layer.

7. The package heat dissipation structure according to claim 5, characterized in that: The adhesive layer, the first heat-conducting layer and the second heat-conducting layer have the same thickness.

8. The package heat dissipation structure according to claim 1, characterized in that: A filling glue layer is further provided between the packaged chip and the substrate. The filling glue layer is provided in the heat dissipation cover and covers the bottom area of ​​the packaged chip.

9. The package heat dissipation structure according to claim 1, characterized in that: A solder ball is further provided on a side of the substrate facing away from the packaged chip, and the solder ball is electrically connected to the packaged chip through the substrate.

10. A semiconductor module, characterized in that: It comprises a circuit board and the package heat dissipation structure according to any one of claims 1 to 9, wherein the substrate is attached to the surface of the circuit board.

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