Photonic device

Abstract

Embodiments of the present disclosure relate to photonic devices. A method of manufacturing a photonic device includes, in order: forming at least one metallization stage and a first bonding layer on a first substrate; forming a second bonding layer on the second high-resistivity substrate; bonding the first bonding layer to the second bonding layer; removing the first substrate; and forming a first optical component on the at least one metallization stage. A sum of a thickness of the first bonding layer and a thickness of the second bonding layer and a thickness of the at least one metallization stage is greater than 3 [mu] m.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to French Patent Application No. 2312182, filed on November 9, 2023, entitled “Procédé de fabrication d'une dispositive photonique”, which is hereby incorporated by reference herein to the maximum extent legally permissible. TECHNICAL FIELD

[0003] The present description relates generally to the field of photonics, and more specifically to photonic assemblies. The present disclosure more specifically relates to photonic assemblies and methods of manufacturing thereof. BACKGROUND

[0004] A photonic assembly is an assembly that enables the generation, transmission, processing or conversion of optical signals. A photonic assembly can further be adapted to process electrical signals, such as for example for converting optical signals into electrical signals, or for converting electrical signals into optical signals.

[0005] Certain photonic assembly manufacturing methods can use techniques known and used for manufacturing electronic assemblies, such as for example microelectronics techniques.

[0006] It is desirable to be able to at least partially improve certain aspects of known photonic devices and / or assemblies, and in particular to improve certain aspects of known photonic assembly manufacturing methods. SUMMARY

[0007] There is a need for higher performance photonic devices and / or assemblies.

[0008] There is a need for higher performance methods of manufacturing photonic assemblies.

[0009] One embodiment overcomes all or part of the drawbacks of known photonic assemblies.

[0010] One embodiment overcomes all or part of the drawbacks of known methods of manufacturing photonic assemblies.

[0011] One embodiment provides a method of manufacturing a photonic device, the method comprising the successive steps of: forming at least one metallization level, and a first bonding layer, on a first substrate; forming a second bonding layer on a second high resistivity substrate, the second bonding layer being adapted to cooperate with the first bonding layer; bonding the first bonding layer to the second bonding layer; removing the first substrate; and forming a first optical assembly on a first surface of the at least one metallization level, the first surface of the at least one metallization level being opposite to a second surface of the at least one metallization level, the second surface of the at least one metallization level being in contact with the first bonding layer.

[0012] The sum of the thickness of the first bonding layer and the thickness of the second bonding layer is greater than 3 pm.

[0013] According to one embodiment, the sum is greater than 4 pm.

[0014] According to one embodiment, the first bonding layer is made of silicon oxide and the second bonding layer is made of silicon oxide.

[0015] According to one embodiment, the second high resistivity substrate is a semiconductor substrate.

[0016] According to one embodiment, the second high resistivity substrate has a resistivity greater than 500 ohm-cm.

[0017] According to one embodiment, the second high resistivity substrate has a resistivity greater than 700 ohm-cm.

[0018] According to one embodiment, the first optical component is a waveguide, or a waveguide adapted to be coupled with an optical fiber, or a waveguide adapted to be coupled with a broadband optical fiber.

[0019] According to one embodiment, the at least one metallization level comprises at least one first electronic component, optical component or opto-electronic component.

[0020] According to one embodiment, the at least one metallization level is adapted to be electrically coupled through a via having the first optical component formed therein.

[0021] According to one embodiment, the method comprises a step of forming a third layer on the first surface of the at least one metallization level during the step of forming the first component.

[0022] According to one embodiment, the third layer is made of a material selected from the group consisting of: indium phosphide (InP), a material comprising indium phosphide (InP), indium gallium arsenide (InGaAs), a material comprising indium gallium arsenide (InGaAs), aluminum gallium arsenide (AlGaAs), a material comprising aluminum gallium arsenide (AlGaAs), indium gallium arsenide phosphide (InGaAsP), a material comprising indium gallium arsenide phosphide (InGaAsP), lithium niobate (LiNbO3), a material comprising lithium niobate (LiNbO3), barium titanate (BaTiO3), a material comprising barium titanate (BaTiO3), or the third layer is a multiple quantum well stack comprising layers made of materials from the group of: indium phosphide (InP), doped indium phosphide (InP), such as N-type or P-type doped indium phosphide (InP), indium gallium arsenide (InGaAs), doped indium gallium arsenide (InGaAs), such as N-type doped or P-type doped indium gallium arsenide (InGaAs), aluminum indium gallium arsenide (AlInGaAs), indium gallium arsenide (InGaAs), and indium gallium arsenide phosphide (InGaAsP). In this case, the photonic assembly 300 can be a laser.

[0023] According to one embodiment, the first assembly is selected from the group consisting of: a semiconductor-insulator-semiconductor capacitor modulator, a photodiode, a phototransistor, a laser, and a Pockels effect modulator.

[0024] According to one embodiment, at least one metallization level is formed on the front surface of the first substrate.

[0025] According to one embodiment, at least one second optical assembly is formed on the back surface of the second substrate.

[0026] According to one embodiment, the at least one second optical assembly is a waveguide.

[0027] Another embodiment provides a photonic device comprising a first optical assembly arranged on a stack, the stack comprising in order: a first surface of at least one metallization level, a first bonding layer, a second bonding layer, and a second high resistivity substrate, wherein the sum of the thickness of the first bonding layer and the thickness of the second bonding layer is greater than 3 pm.

[0028] According to one embodiment, the sum is about 4 pm.

[0029] According to one embodiment, the second high resistivity substrate has a resistivity greater than 500 Ohm-cm.

[0030] According to one embodiment, the first optical assembly is a waveguide.

[0031] According to one embodiment, the previously described photonic device is obtained by the previously described method.

[0032] According to one embodiment, at least one metallization level is formed on the front surface of the first substrate.

[0033] According to one embodiment, at least one second optical component is formed on the rear surface of the second substrate.

[0034] According to one embodiment, the at least one second optical component is a waveguide.

[0035] According to one or more embodiments of the present disclosure, a higher performance photonic device can be realized. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] The above features and advantages and other features and advantages will be described in detail in the remainder of the disclosure of specific embodiments given by way of illustration and non-limitingly with reference to the accompanying drawings, in which:

[0037] Figure 1 shows a cross-sectional view of an embodiment of a photonic assembly;

[0038] Figure 2 Shows the manufacturing Figure 1 A cross-sectional view of a step of implementing a method of a photonic assembly;

[0039] Figure 3 Shows the manufacturing Figure 1 A cross-sectional view of another step of the method for implementing a photonic assembly;

[0040] Figure 4 Shows the manufacturing Figure 1 A cross-sectional view of another step of the method for implementing a photonic assembly;

[0041] Figure 5 Shows the manufacturing Figure 1 A cross-sectional view of another step of the method for implementing a photonic assembly;

[0042] Figure 6 Shows the manufacturing Figure 1 A cross-sectional view of another step of the method for implementing a photonic assembly;

[0043] Figure 7 Shows the manufacturing Figure 1 A cross-sectional view of another step of the method for implementing a photonic assembly;

[0044] Figure 8 Shows the manufacturing Figure 1 A cross-sectional view of another step of the method for implementing a photonic assembly;

[0045] Figure 9a cross-sectional view showing another step of the implementation mode of the method of manufacturing a photonic assembly; Figure 1 a cross-sectional view showing another step of the implementation mode of the method of manufacturing a photonic assembly;

[0046] Figure 10 a cross-sectional view showing another step of the implementation mode of the method of manufacturing a photonic assembly; Figure 1 a cross-sectional view showing another step of the implementation mode of the method of manufacturing a photonic assembly;

[0047] Figure 11 a cross-sectional view showing another step of the implementation mode of the method of manufacturing a photonic assembly; and Figure 1 a cross-sectional view showing another step of the implementation mode of the method of manufacturing a photonic assembly; and

[0048] Figure 12 a cross-sectional view showing another embodiment of a photonic assembly. DETAILED DESCRIPTION

[0049] In the various figures, the same elements have been designated by the same reference numerals. In particular, structural and / or functional features that are common between various embodiments can have the same reference numerals and can address the same structural, dimensional and material properties.

[0050] For the sake of clarity, only those steps and elements that are needed to understand the described embodiments have been shown and described.

[0051] Unless otherwise indicated, when reference is made to two elements being connected together, this means a direct connection between the two elements without any intermediate elements other than a conductor, and when reference is made to two elements being coupled together, this means that the two elements can be connected or they can be coupled via one or more other elements.

[0052] In the following description, when reference is made to absolute position qualifiers such as "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers such as "top", "bottom", "upper", "lower", etc., or orientation qualifiers such as "horizontal", "vertical", etc., reference is made to the orientation of the figures, unless otherwise specified.

[0053] Unless otherwise specified, the expressions "about", "approximately", "substantially" and "around" mean plus or minus 10%, preferably plus or minus 5%.

[0054] The embodiments and implementations described hereinafter relate to photonic devices and methods of manufacturing thereof.

[0055] According to one embodiment, the photonic device is a coupling device enabling reception of one or more optical signals transmitted by an optical fiber. The device is furthermore more particularly adapted to receive one or more optical signals transmitted by a wideband optical fiber, the wideband optical fiber having a minimum bandwidth of, for example, 100 nm, for example a minimum bandwidth in the range of 1310 nm to 1550 nm.

[0056] Known photonic devices have drawbacks in terms of wideband optical fibers and in particular in terms of material index matching between the material of the optical fiber and the material of the photonic device. Such a matching problem can lead to a degradation of the signal received from the optical fiber.

[0057] The photonic device according to the embodiments provides an overcoming of this problem and further improves the transmission rate of the data received from the optical fiber. To achieve this, the electronic device comprises one or more high performance electronic circuits, or even microelectronic circuits, formed on the inside and on the top of a semiconductor substrate. The device then comprises a waveguide receiving the signal(s) from the wideband optical fiber and a high resistivity semiconductor substrate allowing the implementation of such electronic circuits. The semiconductor substrate, referred to herein as "high resistivity substrate", has a resistivity greater than 500 Ohm-cm, preferably greater than 700 Ohm-cm, or sometimes greater than 1 kilo Ohm-cm. To optically isolate the waveguide from the substrate, according to the embodiments, the photonic device comprises a very thick optical insulation device, i.e. an optical insulation device having a thickness greater than 3 pm, arranged between the waveguide and the substrate. Such an embodiment of the photonic device is described with respect to Figure 1 .

[0058] The method of manufacturing such a photonic device overcomes the conventional drawbacks of electronic, microelectronic and / or photonic assembly manufacturing techniques and in particular the drawbacks that can arise using a photonic device such as previously defined. Such a mode of implementation of the photonic device manufacturing method is described with respect to Figures 2 to 11 .

[0059] Figure 1 is a cross-sectional view of an embodiment of the photonic assembly 100.

[0060] As previously mentioned, the photonic assembly 100 is formed in the inside of a high resistivity semiconductor substrate 101, on the top of the high resistivity semiconductor substrate 101 and / or from the high resistivity semiconductor substrate 101, the high resistivity semiconductor substrate 101 being a substrate having a resistivity greater than 500 Ohm-cm, for example a substrate having a resistivity preferably greater than 700 Ohm-cm, or a substrate having a resistivity sometimes greater than 1 kilo Ohm-cm. According to one example, the resistivity of the substrate 101 is about 780 Ohm-cm. According to one example, the substrate 101 is a silicon substrate.

[0061] On the surface 102 of the substrate 101, rests an optical and electrical insulation layer 103. The layer 103 is also used as a bonding layer in the method of manufacturing the device 100. According to one example, the layer 103 is a silicon oxide layer. When reference is made to a bonding layer, it is understood that it can be a bonding layer, a fixing layer or a layer allowing the adhesion of one material to another material.

[0062] On the back surface of the substrate 101, opposite the surface 102, one or more optical components, such as waveguides, can be formed. These components are not shown in Figure 1

[0063] On the layer 103, another optically and electrically insulating layer 104 is also deposited. The layer 104 is also used as a bonding layer in the method of manufacturing the device 100. According to one embodiment, the layer 104 is a bonding layer adapted to cooperate with the layer 103. According to one example, the layer 104 is a silicon oxide layer.

[0064] According to one embodiment, the sum of the thickness of the layer 103 and the thickness of the layer 104 is greater than 2 pm, for example about 4 pm.

[0065] On the layer 104, one or more metallization levels 105 are deposited, the one or more metallization levels 105 being adapted to comprise one or more electronic, optical or optoelectronic devices 106 of the photonic device 100. According to one example, the device(s) 106 can comprise passive photonic components, such as waveguides, and / or active photonic components, such as modulators, photodiodes. The active photonic components can be assimilated into optoelectronic components. According to another example, the devices 106 can be modulators, emitters, etc. The device(s) 106 can be formed on the inside and / or on the top of a semiconductor substrate, such as a silicon (Si) or germanium (Ge) substrate. Each device 106 can also be laterally surrounded by a layer 114 of electrically and / or optically insulating material, such as silicon oxide, to electrically and optically insulate it from other devices.

[0066] The device(s) 106 are formed, for example, from a substrate of the SOI (Silicon On Insulator) type, or as shown in Figure 1 Parts of the layer can remain on the top of the device(s) 106. Similarly, an insulating layer 106B of the substrate, also called a buried oxide (BOx) layer, is deposited on the semiconductor layer 106A.

[0067] The first metallization level is symbolized in Figure 1 According to one example, the device 100 comprises three metallization levels. According to one embodiment, the metallization level(s) 105 are considered to be optically insulating. Indeed, the metallization level 105 comprises metal tracks manufactured in a layer of dielectric material, obtained for example via a photolithography / growth method of metal, preferably copper, followed by a planarization method. From an optical point of view, only the dielectric part is an “insulator”, whereas the metal tracks absorb the optical signal.

[0068] According to one embodiment, the sum of the thickness of the layer 103 and the thickness of the layer 104 and the thickness of the metallization level(s) is greater than 3 pm, for example greater than 4 pm.​

[0069] On the metallization level(s) 105, a layer 107 is deposited, the layer 107 having optical components 108 formed therein, the optical components 108 forming waveguides. According to one example, the layer 107 is a silicon oxide layer, and the optical components 108 are made of silicon nitride (SiN). According to one example, the thickness of the layer 107 is greater than 1 pm, for example about 1.5 pm. Thus, the optical components 108 are separated from the electrically resistive substrate 101 by a stack comprising the optical insulation layer 103, the optical insulation layer 104, the metallization level(s) 105 considered as optically insulating, and the insulation layer 114 surrounding the device(s) 106.

[0070] As previously mentioned, the thickness of the stack is greater than 3 pm, for example greater than 4 pm.

[0071] According to one embodiment, the optical components are adapted to be coupled to a wideband optical fiber, for example having a minimum bandwidth of 100 nm, for example a minimum bandwidth in the range of 1310 to 1550 nm.

[0072] On the layer 107, a layer is formed enabling the formation of electrical contacts of the device 100. In particular, an electrically insulating layer 109 is covered by a passivation layer 110. According to one example, the layer 109 is a silicon oxide layer, having a thickness greater than 4 pm, for example about 5.3 pm. According to one example, the passivation layer 110 is formed by a stack of a silicon oxide layer and a silicon nitride layer, and has a thickness in the range of 1 to 3 pm.

[0073] Contacts can be formed in the photonic device 100. For this purpose, a first electrically conductive via 111 is formed through the layer 107 and down to one of the metallization levels 105. An electrically conductive track 112 can be formed in the layer 109 and in contact with the first electrically conductive via 111. According to one example, the conductors 111 and 112 are made of a metal or a metal alloy. According to one example, the material of the conductors 111 and 112 comprises copper and / or a copper alloy. A contact 113 is then formed through the layer 109 and the passivation layer 110, to engage the conductor 112. The formation of the conductors 111, 112 and 113 is described in detail with respect to Figures 8 to 11 According to one example, the contacts are made of a metal or a metal alloy. According to one example, the material of the contact 113 comprises aluminum and / or an alloy comprising aluminum.

[0074] Figures 2 to 11 is a cross-sectional view of the device after the steps of the implementation mode of the method of manufacturing a photonic component 100 of the type of photonic components described with respect to Figure 1 is a cross-sectional view of the device after the steps of the implementation mode of the method of manufacturing a photonic component 100 of the type of photonic components described with respect to

[0075] In Figure 2In the step of forming a semiconductor substrate 201, for example a substrate of the silicon-on-insulator (SOI) type, one or more metallization levels 202 are formed from its upper surface 203. The substrate 201 is formed of a semiconductor substrate 201A having a stack of an electrically insulating layer 201B and a semiconductor layer 201C resting thereon. The insulating layer 201B is also called a buried oxide (BOX) layer. The metallization level(s) 202 are about Figure 1 The type of metallization level(s) 105 described and including information on Figure 1 At least one electronic component 204 of the type described in the component(s) 106. Figure 1 As shown, the first metallization level of the metallization level(s) 202 is symbolized by the placement of the component 204. In other words, Figure 2 In FIG. 2 , the first metallization level is located on the side of a surface 203 of the metallization level 202, the surface 203 being opposite to another surface 205 of the metallization level 202. Figure 1 As shown, the component 204 is surrounded by an insulating layer, which is not Figures 2 to 11 Shown.

[0076] The metallization level 202 and the component 204 are thus formed on the front surface of the substrate 201 .

[0077] exist Figure 2 After the steps Figure 3 In the steps of Figure 1 A first bonding layer 206 of the type described for the insulating layer 104 is deposited on the surface 205 of the metallization level(s) 202. According to one example, the layer 206 is a silicon oxide layer.

[0078] exist Figure 3 After the steps Figure 4 At the step of bonding, the second bonding layer 208 is used to bond the high resistivity substrate 209 to the substrate 208. Figure 3 More specifically, the substrate 209 is about Figure 1 The substrate 101 is of the type described, i.e., a semiconductor substrate having a resistivity greater than 500 ohm-cm, for example, preferably greater than 700 ohm-cm, or sometimes greater than 1 kilo-ohm-cm. According to one example, the resistivity of the substrate 209 is about 780 ohm-cm. According to one example, the substrate 209 is a silicon substrate. In addition, the bonding layer 208 is about Figure 1 The type of insulating layer 103 is described. According to one embodiment, the layer 208 is a bonding layer adapted to cooperate with the bonding layer 206. According to one example, the bonding layer is a silicon oxide layer.

[0079] In order to achieve Figure 4In a step of bonding, a bonding layer 208 is formed on the surface of the substrate 209. The free surface of the bonding layer 208 opposite to the substrate 209 is then bonded to the bonding layer 206, for example by using a molecular bonding method.

[0080] Furthermore, as previously mentioned, the sum of the thickness of layer 206 and the thickness of layer 208 is greater than 2 μm, for example about 4 μm. Furthermore, according to one embodiment, the sum of the thickness of layer 206 and the thickness of 208 and the thickness of the metallization level(s) 202 is greater than 4 μm, for example greater than 5 μm.

[0081] At this step, an optical component may be formed on the back surface of the substrate 209 (ie, the surface not covered by the bonding layer 208 ).

[0082] exist Figure 4 After the steps Figure 5 At step 4, the structure obtained at step 4 is turned upside down. Thus, the first metallization level of the metallization level(s) 202 is at Figure 5 Furthermore, the entire structure rests on a high resistivity substrate 209.

[0083] exist Figure 5 After the steps Figure 6 At the step of Figure 5 According to one example, the substrate 201A is removed by using a method combining a grinding step and a chemical removal step.

[0084] exist Figure 6 After the steps Figure 7 In the steps, Figure 1 An optical component of the type of optical component 108 is formed on the buried oxide layer 201B. For this purpose, a first layer 212 can be formed by a photolithography process and then etched to obtain the desired shape. A first portion of an insulating layer 210, for example made of silicon oxide, is then formed on the layer 212, for example by deposition and then chemical planarization. A second layer 211 can be formed on the first portion of the layer 210, for example by using a photolithography process and then an etching process. A second portion of the insulating layer 210 can then be formed to cover the layer 211. The assembly of the layers 210 to 212 can make it possible, for example, to form an optical fiber or other waveguide-type passive component that allows coupling to an external optical fiber (not shown).

[0085] exist Figure 7 After the steps Figure 8At step 210, a first portion of the contact area is formed. Thus, a conductive via 213 is formed that passes completely through layer 210, insulating layer 201B, layer 201C, and a portion of metallization level(s) 202. Conductive via 213 thus extends between the upper surface of layer 210 and to the metallization level(s) 202. Conductive via 213 is about Figure 1 The conductive via 213 is of the type described above. In other words, the conductive via 213 is made of metal or a material including metal, for example copper or an alloy including copper. For this purpose, deposition, photolithography, etching and planarization methods can be implemented here.

[0086] exist Figure 8 After the steps Figure 9 At step 210, an electrically insulating layer 214 is formed on layer 210. According to one example, insulating layer 214 is a silicon oxide layer having a thickness greater than 2 μm (eg, about 2.8 μm).

[0087] In addition, Figure 9 At step 214, a second portion of the contact area is formed. Thus, a conductive track 215 is formed that passes completely through layer 214. Conductive track 215 thus extends between the upper surface of layer 210 and contacts via 213. Conductive track 215 is about Figure 1 The conductive track 112 is of the type described. In other words, the conductive via 215 is made of metal or a material including metal, such as copper or an alloy including copper. For this purpose, deposition, lithography, etching and planarization methods can be implemented here.

[0088] exist Figure 9 After the steps Figure 10 At the step of , the thickness of the electrically insulating layer 214 is increased to completely cover the conductive vias 215. At this step, the layer 214 is Figure 1 The same type as described for layer 109 is described. Thus, according to one example, layer 109 is a silicon oxide layer having a thickness greater than 4 μm, for example approximately 5.3 μm.

[0089] exist Figure 10 After the steps Figure 11 At step 215, once the contacts 215 have been formed, Figure 1A contact 217 of the type of the described contact 113 is formed. To this end, an insulating layer, for example made of silicon oxide, is deposited. According to one example, the insulating layer has a thickness of about 0.6 μιη. Lithography and etching steps are then carried out to form a cavity in the layer 214 and the layer 216, above the via 215. This cavity is then filled with a layer made of a material forming the contact 217, for example a metal or a metal alloy, for example aluminum or an alloy comprising aluminum. According to one example, this layer has a thickness of about 1.5 μιη.

[0090] Moreover, at the step of Figure 11 passivation of the layer 214 is carried out. To this end, a passivation layer 216 is formed on the accessible surface of the layer 214. According to one example, the passivation layer is formed of a silicon oxide layer having a thickness of about 2 μιη and of a nitride oxide layer having a thickness of 0.6 μιη. Lithography and etching steps are then carried out to make the contact accessible or to facilitate the assembly of the device.

[0091] Figure 12 is a cross-sectional view of an embodiment of a photonic assembly 300.

[0092] The photonic assembly 300 is similar to the assembly 100 described with respect to Figure 1 The same elements as the assembly are not described in more detail here. The following only highlights the differences between them.

[0093] The photonic assembly 300 thus comprises all the elements of the assembly 100, and comprises a layer 301 made of a material M, the layer 301 being arranged in the layer 107, preferably on the upper surface of the metallization level 105. According to one variant, the layer 301 can be a layer stack.

[0094] According to one preferred embodiment, the layer 301 is arranged in alignment with the electronic device(s) 106 to enable, for example, optical coupling. Similarly, the optical assembly 108 and the device(s) 106 can also be at least partially aligned to enable optical coupling.

[0095] According to a first example, the material M is indium phosphide (InP), or comprises indium phosphide (InP). In this case, the photonic assembly 300 can be a semiconductor-insulator-semiconductor capacitor modulator, or SISCAP modulator.

[0096] According to a second example, the material M is indium gallium arsenide (InGaAs), or comprises indium gallium arsenide (InGaAs). In this case, the photonic assembly 300 can be a photodiode and / or a phototransistor.

[0097] According to a third example, the material M is or comprises aluminum gallium arsenide (AlGaAs). In this case, the photonic assembly 300 can be a photonic assembly that allows for the generation of electron pairs and / or for the generation of light, such as a laser.

[0098] According to a fourth example, the material M is or comprises indium gallium arsenide phosphide (InGaAsP). In this case, the photonic assembly 300 can be a semiconductor-insulator-semiconductor capacitor modulator, or a photodiode.

[0099] According to a fifth example, the material M is or comprises lithium niobate (LiNbO3). In this case, the photonic assembly 300 can be a Pockels effect modulator.

[0100] According to a sixth example, the material M is or comprises barium titanate (BaTiO3). In this case, the photonic assembly 300 can be a Pockels effect modulator.

[0101] According to a seventh example, the layer 301 is a multiple quantum well (MQW) stack. According to one example, such a stack can comprise layers made of materials from the group of indium phosphide (InP), doped indium phosphide (InP), such as N-type or P-type doped indium phosphide (InP), indium gallium arsenide (InGaAs), doped indium gallium arsenide (InGaAs), such as N-type or P-type doped indium gallium arsenide (InGaAs), aluminum indium gallium arsenide (AlInGaAs), indium gallium arsenide (InGaAs), and indium gallium arsenide phosphide (InGaAsP). In this case, the photonic assembly 300 can be a laser.

[0102] The photonic assembly 300 can further comprise one or more contact regions 302 and / or 303 that enable an electrical contact to be established with the layer 301. According to one embodiment, the contact regions 302 and / or 303 are formed in the same way as the contact regions formed by the conductors 111 and 112 and the contact 113.

[0103] The method of manufacturing the photonic assembly 300 is similar to the method of manufacturing the photonic assembly 100, but further comprises the steps of forming the layer 301, and, if necessary, etching the layer 301 or structuring the layer 301 between the steps described with respect to the photonic assembly 100 and the steps described with respect to the photonic assembly 200. Figure 6 The method of manufacturing the photonic assembly 300 is similar to the method of manufacturing the photonic assembly 100, but further comprises the steps of forming the layer 301, and, if necessary, etching the layer 301 or structuring the layer 301 between the steps described with respect to the photonic assembly 100 and the steps described with respect to the photonic assembly 200. Figure 7

[0104] Various embodiments and variants have been described. The person skilled in the art will understand that certain features of these different embodiments and variants can be combined, and will think of other variants. ​

[0105] Finally, the practice of the described embodiments and variations is within the ability of one skilled in the art based on the functional indications given above.

Claims

1. A photonic device, characterized by, comprising: a first optical component disposed on a stack; and the stack comprising in order: a first surface of at least one metallized level; a first bonding layer; a second bonding layer; and a second high resistivity substrate; wherein a sum of a thickness of the first bonding layer, a thickness of the second bonding layer, and a thickness of the at least one metallized level is greater than 3 pm.

2. The photonic device of claim 1, wherein, the sum is about 4 pm.

3. The photonic device of claim 1, wherein, the second high resistivity substrate has a resistivity greater than 500 ohm-cm.

4. The photonic device of claim 1, wherein, the first optical component is a waveguide.

5. The photonic device of claim 1, wherein, the first optical component is disposed on the first surface of the at least one metallized level, the first surface of the at least one metallized level being opposite a second surface of the at least one metallized level, the second surface of the at least one metallized level being in contact with the first bonding layer.

6. The photonic device of claim 5, wherein, the first optical component is disposed in an insulating layer disposed on the first surface of the at least one metallized level.

7. The photonic device of claim 1, wherein, at least one second optical component is disposed on a back surface of the second high resistivity substrate.

8. The photonic device of claim 7, wherein the at least one second optical component is a waveguide.

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