Circuit board with solder mask layer

Abstract

The utility model discloses a circuit board with a solder mask layer. The circuit board comprises a substrate and the solder mask layer. The solder mask layer comprises at least one hole, and the solder mask layer is pressed on one surface of the substrate. Wherein the solder mask layer defines a maximum thickness and a minimum thickness, a height difference between the maximum thickness and the minimum thickness is less than 8 microns, and a surface roughness (Ra) of the solder mask layer is less than 0.2 microns. Therefore, the thickness difference between the maximum thickness and the minimum thickness of the solder mask layer can be reduced so as to avoid poor contact between the chip and the substrate caused by overlarge thickness difference during subsequent processing. In addition, the surface roughness can be reduced through the arrangement, so that the reflectivity of the solder mask layer is improved.

Description

Technical Field

[0001] This utility model relates to a circuit board, and more particularly to a circuit board with a solder resist layer. Background Technology

[0002] In the existing technology, the traditional technique of coating circuit boards with solder resist ink cannot achieve high uniformity of ink thickness and high reflectivity, and therefore cannot meet the high resolution requirements of current electronic product displays.

[0003] Therefore, the inventor of this utility model believed that the above-mentioned defects could be improved. So he devoted himself to research and combined with the application of scientific principles, and finally proposed a utility model with a reasonable design that effectively improves the above-mentioned defects. Utility Model Content

[0004] The present invention provides a circuit board with a solder resist layer, which can effectively improve the defects that may occur with existing solder resist inks.

[0005] This utility model discloses a circuit board with a solder resist layer, comprising: a substrate; and a solder resist layer including at least one opening, wherein the solder resist layer is pressed onto a surface of the substrate; wherein the solder resist layer is defined with a maximum thickness and a minimum thickness, a height difference between the maximum thickness and the minimum thickness is less than 8 micrometers, and a surface roughness (Ra) of the solder resist layer is less than 0.2 micrometers.

[0006] Optionally, the surface of the substrate includes a solder resist area and at least one solder area; wherein the solder resist layer is laminated to the solder resist area of ​​the surface.

[0007] Optionally, the height difference between the maximum thickness and the minimum thickness is less than 6 micrometers.

[0008] Optionally, the surface roughness of the solder resist layer is less than 0.1 micrometers.

[0009] Optionally, the solder resist layer does not contain any air bubbles.

[0010] Optionally, the solder resist layer and the substrate are free of any air bubbles.

[0011] Optionally, at least one of the openings includes an opening length and an opening width; wherein the opening length is greater than 190 micrometers and less than 1000 micrometers, and the opening width is greater than 140 micrometers and less than 950 micrometers.

[0012] In summary, the circuit board with a solder resist layer disclosed in this embodiment of the invention can reduce the thickness difference between the maximum and minimum thicknesses of the solder resist layer by setting "a substrate and a solder resist layer" and "the solder resist layer is defined with a maximum thickness and a minimum thickness, the height difference between the maximum thickness and the minimum thickness is less than 8 micrometers, and the surface roughness (Ra) of the solder resist layer is less than 0.2 micrometers". This avoids poor contact between the chip and the substrate during subsequent processing due to excessive thickness difference. Furthermore, the surface roughness can be reduced by the above settings to improve the reflectivity of the solder resist layer.

[0013] To further understand the features and technical content of this utility model, please refer to the following detailed description and drawings of this utility model. However, these descriptions and drawings are only used to illustrate this utility model and are not intended to limit the scope of protection of this utility model in any way. Attached Figure Description

[0014] Figure 1 This invention relates to a dry film lamination method for a circuit board according to an embodiment of the present invention.

[0015] Figure 2 This is a schematic diagram of a solder resist dry film and a substrate according to an embodiment of the present invention.

[0016] Figure 3 This is a schematic diagram of the solder resist dry film being pressed onto the substrate according to an embodiment of the present invention.

[0017] Figure 4 This is a schematic diagram of a solder resist layer and the substrate according to an embodiment of the present invention.

[0018] Figure 5 This is a three-dimensional schematic diagram of a circuit board with a solder resist layer according to an embodiment of the present invention.

[0019] Figure 6 for Figure 5 A cross-sectional view along section line VI-VI. Detailed Implementation

[0020] The following specific embodiments illustrate the implementation of the "circuit board with solder resist layer" disclosed in this utility model. Those skilled in the art can understand the advantages and effects of this utility model from the content disclosed in this specification. This utility model can be implemented or applied through other different specific embodiments, and various details in this specification can also be modified and changed based on different viewpoints and applications without departing from the concept of this utility model. Furthermore, the accompanying drawings of this utility model are for simple illustrative purposes only and are not depictions of actual dimensions, as stated in advance. The following embodiments will further describe the relevant technical content of this utility model in detail, but the disclosed content is not intended to limit the scope of protection of this utility model.

[0021] It should be understood that while terms such as "first," "second," and "third" may be used in this document to describe various components or signals, these components or signals should not be limited by these terms. These terms are primarily used to distinguish one component from another, or one signal from another. Furthermore, the term "or" as used herein should, as appropriate, include any combination of one or more of the related listed items.

[0022] [Dry film lamination method for circuit boards]

[0023] Please see Figures 1 to 6 As shown, this embodiment discloses a dry film lamination method for a circuit board. The dry film lamination method enables a solder resist dry film 1 to form a solder resist layer 3 on one surface 21 of a substrate 2, and the solder resist layer 3 prevents the substrate 2 from being soldered by conductive solder between various electronic components.

[0024] Specifically, the method for laminating the solder mask dry film onto the circuit board includes steps S101, S102, S103, S104, S105, and S106. It must be noted that the order of the steps and the actual operation method described in this embodiment can be adjusted as needed and are not limited to those described in this embodiment.

[0025] Step S101 is a preliminary step, which includes: providing the solder resist dry film 1 and the substrate 2 (e.g., as shown in the image). Figure 2 (As shown).

[0026] In detail, the solder resist dry film 1 is produced by coating an ink onto a carrier and then baking it at a high temperature. Furthermore, the solder resist dry film 1 can replace traditional solder resist wet film, and compared to traditional solder resist wet film, the solder resist dry film 1 simplifies the processing steps. For example, in the processing of traditional solder resist layers, the viscosity of the solder resist wet film must first be adjusted before it is coated onto the substrate, followed by baking; however, since the solder resist dry film 1 is already in a semi-cured state, when using the solder resist dry film 1, the coating and baking processes that are present in the traditional solder resist layer processing can be directly omitted.

[0027] Step S102 is a pretreatment step, which includes cleaning the surface 21 of the substrate 2.

[0028] Furthermore, the pretreatment step involves cleaning the surface 21 of the substrate 2 with a solution to remove impurities (e.g., oxides, other metals) from the surface 21. The solution can be at least one of water, an acidic solvent, or an alkaline solvent.

[0029] Step S103 is a molding step, which includes: pressing a bonding surface 11 of the solder resist dry film 1 onto the surface 21 of the substrate 2 using a molding machine, and pressing out air bubbles in the solder resist dry film 1 in a vacuum environment using the molding machine.

[0030] Specifically, such as Figure 3 As shown, the bonding surface 11 of the solder resist dry film 1 is pressed tightly onto the surface 21 of the substrate 2 using the molding machine (not shown) with an appropriate molding pressure, and air bubbles between the solder resist dry film 1 and the substrate 2 can be expelled at the same time.

[0031] It is worth mentioning that the molding step is performed in the vacuum environment; in the molding step, an appropriate molding temperature and molding time can be set by the molding machine.

[0032] In this embodiment, the molding pressure is optionally between 0.4 MPa and 0.8 MPa; the molding temperature is optionally between 50°C and 70°C; and the molding time is optionally between 20 seconds and 40 seconds, but this invention is not limited thereto. For example, when the thickness, material, and type of the solder resist dry film 1 are different, the required molding conditions are also different; therefore, the molding pressure, the molding temperature, and the molding time can be adjusted according to actual needs.

[0033] As described above, by using a vacuum environment and appropriate molding conditions (e.g., time, temperature, pressure), it can be ensured that the bonding surface 11 of the solder resist dry film 1 and the surface 21 of the substrate 2 are tightly pressed together without any residual air bubbles.

[0034] Furthermore, when there are no residual air bubbles between the solder resist dry film 1 and the substrate 2, the influence of air bubbles on the final product can be avoided, and the adhesion of the solder resist dry film 1 to the substrate 2 can be improved, and the thickness uniformity of the solder resist dry film 1 can be ensured.

[0035] Step S104 is an exposure step, which includes: photocuring the solder resist dry film 1 pressed onto the substrate 2 with a light to generate the solder resist layer 3.

[0036] In detail, when the solder resist dry film 1 is pressed onto the substrate 2, it is in a semi-cured state; then, the solder resist dry film 1 is irradiated by the light to photocur the solder resist dry film 1 and generate the solder resist layer 3, and the solder resist layer 3 does not contain any air bubbles.

[0037] Furthermore, at least one intended opening position A is defined on the solder resist dry film 1. The light will irradiate the solder resist dry film 1 through a photomask and can pass through the photomask to avoid the intended opening position A. At this time, the intended opening position A will not be irradiated by the light. Therefore, the solder resist layer 3 will not be generated in the part of the solder resist dry film 1 that is not irradiated by the light.

[0038] In this embodiment, the light is ultraviolet light, but the present invention is not limited thereto; for example, any light that can enable the solder resist dry film 1 to perform photocuring can be used to irradiate the solder resist dry film 1 to generate the solder resist layer 3.

[0039] Step S105 is a windowing step, which includes: opening the solder resist layer 3 on the substrate 2 with a developer so that at least one opening H is formed on the solder resist layer 3, and at least one opening H can expose a portion of the surface 21 of the substrate 2.

[0040] The developer is at least one of sodium carbonate (Na2CO3) or potassium carbonate (K2CO3).

[0041] It is worth mentioning that, such as Figure 2 As shown, the surface 21 of the substrate 2 includes a solder resist area R1 and at least one solder area R2; wherein, as Figure 5As shown, the solder resist layer 3 is the solder resist area R1 pressed onto the surface 21, and the portion exposed by the opening H is the solder area R2.

[0042] Furthermore, such as Figure 4 and Figure 5 As shown, in the windowing step, when the substrate 2 is immersed in the developer, the developer can dissolve the uncured solder resist 1 on the substrate 2, thereby generating the opening H, and the position of the opening H is approximately at the expected opening position A. The offset between the expected opening position A and the corresponding opening H is no greater than 15 micrometers. That is, the positional deviation between the opening H and the expected opening position A does not exceed 15 micrometers.

[0043] In this embodiment, as Figure 5 As shown, the opening H includes an opening length L and an opening width W. The opening length L is optionally greater than 190 micrometers and less than 1000 micrometers, and more preferably greater than 190 micrometers and less than 500 micrometers; the opening width W is optionally greater than 140 micrometers and less than 950 micrometers, and more preferably greater than 140 micrometers and less than 450 micrometers, but this invention is not limited thereto. For example, the substrate 2 is typically mass-produced, and different customers have different requirements for the opening H. Therefore, the opening length L and the opening width W of the opening H can be adjusted or compensated according to actual needs.

[0044] like Figure 6 As shown, the solder resist layer 3 is defined with a maximum thickness Tmax and a minimum thickness Tmin, and the thickness difference between the maximum thickness Tmax and the minimum thickness Tmin is less than 8 micrometers. Optionally, the thickness difference is less than 6 micrometers, but this utility model is not limited thereto.

[0045] Specifically, when the thickness difference between the maximum thickness Tmax and the minimum thickness Tmin of the solder resist layer 3 is less than 8 micrometers, the thickness uniformity of the solder resist layer 3 is greater than 92%; when the thickness difference of the solder resist layer 3 is less than 6 micrometers, the thickness uniformity of the solder resist layer 3 is greater than 93%.

[0046] For example, the greater the thickness uniformity value, the higher the flatness of the solder resist layer 3, thereby improving the accuracy of the opening H in the windowing step; that is, based on the good flatness of the solder resist layer 3, the offset value between the expected opening position A and the opening H can be reduced, and the burrs generated by the opening H due to the windowing step can be reduced.

[0047] Furthermore, the solder resist layer 3 can fix the spacing between the substrate 2 and the chip during subsequent processes, so that the substrate 2 and the chip are less likely to be poorly installed due to the uneven structure of the traditional solder resist layer, and can improve the product yield of subsequent processes.

[0048] Furthermore, the surface roughness (Ra) of the solder resist surface 31 of the solder resist layer 3 is optionally less than 0.2 micrometers, more preferably less than 0.1 micrometers. That is, the solder resist layer 3 formed by the solder resist dry film 1 can effectively reduce the surface roughness of the solder resist surface 31. Therefore, when the surface roughness of the solder resist surface 31 decreases, the reflectivity of the solder resist surface 31 can be improved.

[0049] Circuit board with solder resist layer

[0050] Please see Figures 5 to 6 As shown, this embodiment of the present invention provides a circuit board 100 with a solder resist layer, which includes a substrate 2 and a solder resist layer 3 pressed onto a surface 21 of the substrate 2, and the solder resist layer 3 has at least one opening H.

[0051] Specifically, such as Figure 2 As shown, the substrate 2 includes a solder resist area R1 and at least one solder area R2; wherein, as Figure 5 As shown, the solder resist layer 3 is the solder resist area R1 pressed onto the surface 21, and the portion exposed by the opening H is the welding area R2. That is, the welding area R2 is not covered by the solder resist layer 3.

[0052] It is worth mentioning that, such as Figure 6 As shown, the solder resist layer 3 is defined with a maximum thickness Tmax and a minimum thickness Tmin, and the thickness difference between the maximum thickness Tmax and the minimum thickness Tmin is less than 8 mm. Optionally, the thickness difference is less than 6 micrometers, but this utility model is not limited thereto.

[0053] Specifically, when the thickness difference between the maximum thickness Tmax and the minimum thickness Tmin of the solder resist layer 3 is less than 8 micrometers, the thickness uniformity of the solder resist layer 3 is greater than 92%; when the thickness difference of the solder resist layer 3 is less than 6 micrometers, the thickness uniformity of the solder resist layer 3 is greater than 93%.

[0054] For example, the greater the thickness uniformity value, the higher the bonding flatness of the solder resist layer 3. As a result, the solder resist layer 3 can fix the distance between the substrate 2 and the chip in subsequent processes, so that the substrate 2 and the chip are less likely to be poorly installed due to the uneven structure of the traditional solder resist layer, and the product yield of subsequent processes can be improved.

[0055] Furthermore, the surface roughness (Ra) of the solder resist surface 31 of the solder resist layer 3 is optionally less than 0.2 micrometers, more preferably less than 0.1 micrometers. That is, the solder resist layer 3 formed by the solder resist dry film 1 can effectively reduce the surface roughness of the solder resist surface 31. Therefore, when the surface roughness of the solder resist surface 31 decreases, the reflectivity of the solder resist surface 31 can be improved.

[0056] [Table 1. Slicing Results Test of the Example]

[0057]

[0058] [Results and Discussion of Examples]

[0059] As shown in Table 1, Examples 1 to 5 are circuit boards 100 with a solder resist layer 3 prepared by the dry film lamination method of the circuit board of the present invention. The circuit board 100 is sliced ​​according to the position of the nine-square grid, and the slice thickness of the solder resist layer 3 at each position is measured.

[0060] As can be seen from Table 1 above, the thickness difference between the maximum and minimum thickness in Example 1 is 5.642; the thickness difference between the maximum and minimum thickness in Example 2 is 5.642; the thickness difference between the maximum and minimum thickness in Example 3 is 2.821; the thickness difference between the maximum and minimum thickness in Example 4 is 7.052; and the thickness difference between the maximum and minimum thickness in Example 5 is 5.862.

[0061] Based on the test results above, it can be seen that the circuit board 100 manufactured using the dry film lamination method of the circuit board of this utility model embodiment can reduce the height difference between the maximum thickness and the minimum thickness of the solder resist layer 3; that is, it can improve the thickness uniformity of the solder resist layer 3.

[0062] [Technical Effects of the Embodiments of this Utility Model]

[0063] In summary, the circuit board with a solder resist layer disclosed in this embodiment of the invention can reduce the thickness difference between the maximum and minimum thicknesses of the solder resist layer by setting "a substrate and a solder resist layer" and "the solder resist layer is defined with a maximum thickness and a minimum thickness, the height difference between the maximum thickness and the minimum thickness is less than 8 micrometers, and the surface roughness (Ra) of the solder resist layer is less than 0.2 micrometers". This avoids poor contact between the chip and the substrate during subsequent processing due to excessive thickness difference. Furthermore, the surface roughness can be reduced by the above settings to improve the reflectivity of the solder resist layer.

[0064] The above-disclosed content is only an optional and feasible embodiment of this utility model, and is not intended to limit the patent scope of this utility model. Therefore, all equivalent technical changes made based on the contents of this utility model specification and drawings are included in the patent scope of this utility model.

Claims

1. A circuit board with a solder resist layer, characterized in that, The circuit board with a solder resist layer includes: A substrate; and A solder resist layer, including at least one opening, and said solder resist layer is laminated to a surface of the substrate; The solder resist layer is defined with a maximum thickness and a minimum thickness, the height difference between the maximum thickness and the minimum thickness is less than 8 micrometers, and the surface roughness Ra of the solder resist layer is less than 0.2 micrometers.

2. The circuit board with a solder resist layer according to claim 1, characterized in that, The surface of the substrate includes a solder resist area and at least one solder area; wherein the solder resist layer is laminated to the solder resist area of ​​the surface.

3. The circuit board with a solder resist layer according to claim 1, characterized in that, The height difference between the maximum thickness and the minimum thickness is less than 6 micrometers.

4. The circuit board with a solder resist layer according to claim 1, characterized in that, The surface roughness of the solder resist layer is less than 0.1 micrometers.

5. The circuit board with a solder resist layer according to claim 1, characterized in that, The solder resist layer does not contain any air bubbles.

6. The circuit board with a solder resist layer according to claim 1, characterized in that, There are no air bubbles between the solder resist layer and the substrate.

7. The circuit board with a solder resist layer according to claim 1, characterized in that, At least one of the openings includes an opening length and an opening width; wherein the opening length is greater than 190 micrometers and less than 1000 micrometers, and the opening width is greater than 140 micrometers and less than 950 micrometers.

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