Wafer memory
By incorporating inner and outer windows and power supply devices into the wafer memory, the issues of dust-free operation and safety during wafer fabrication are solved, achieving proper enclosure and normal power supply operation, and improving the integration and security of the wafer memory.
Patent Information
- Application Number
- CN202423045713.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-10
- Publication Date
- 2025-11-04
- Estimated Expiration
- 2034-12-10
AI Technical Summary
During wafer processing, how can we ensure a dust-free environment and prevent workers' limbs from entering the wafer storage compartments to avoid damaging the dust-free environment and causing potential mechanical injury?
Design a wafer memory that isolates the wafer memory from the outside world by configuring two windows, one inside and one outside, in the area of the wafer exchange box, and places the power supply device in the space shielded by the windows to ensure the power supply device works normally.
This achieves internal enclosure within the wafer memory, preventing personnel from entering while maintaining normal power supply to the power unit, thus improving the integration and security of the wafer memory.
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Figure CN223513926U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor processing, and specifically to a wafer memory. Background Technology
[0002] Wafers are the fundamental raw material in semiconductor manufacturing. They are circular thin films made from extremely high-purity semiconductor materials (such as silicon or gallium arsenide) through processes such as crystal pulling and slicing. In semiconductor technology, wafers can be processed to produce corresponding integrated circuit devices (such as chips, driver circuits, etc.).
[0003] Given the requirements of wafer fabrication processes, these processes often need to be completed in highly cleanroom environments. Therefore, ensuring a clean environment and preventing external interference during wafer fabrication is a critical technical problem that needs to be solved by those skilled in the art. Utility Model Content
[0004] In view of this, embodiments of this application provide a wafer memory that can be sealed off from the outside world when swapping wafer cassettes by setting two window plates in the wafer cassette exchange area.
[0005] This application provides a wafer memory, which includes a support sidewall, a housing structure, a first support plate, a second support plate, an outer window plate, an inner window plate, and a power supply device. The support sidewall is disposed along a first vertical direction and has a first window on its surface. The housing structure cooperates with the support sidewall to form a wafer storage compartment. The first support plate is disposed horizontally inside the support sidewall and below the first window. The second support plate is disposed horizontally inside the support sidewall and above the first window. The outer window plate is disposed along the first vertical direction at a first end of the first support plate near the support sidewall and is driven to move between a storage position and a cover position. The storage position is below the first support plate, and the cover position corresponds to the first window. The inner window plate is disposed along the first vertical direction at a second end of the first support plate away from the support sidewall and is driven to move between the storage position and the cover position. At least one of the outer and inner window plates is located at the cover position, and the outer or inner window plate at the cover position can block the first window. The power supply device is located below the first carrier plate and between the storage positions of the outer window plate and the inner window plate, and is used to supply power to the electronic devices in the wafer memory.
[0006] Optionally, the load-bearing sidewall is detachably connected to the hopper structure, and the load-bearing sidewall can be driven to separate from the hopper structure. The power supply unit is fixedly connected to the load-bearing sidewall and can be exposed to the external environment when the load-bearing sidewall is separated from the hopper structure.
[0007] Optionally, the wafer memory includes a first cable chain disposed along the direction of mating between the support sidewall and the housing structure. One end of the first cable chain is connected to a power supply device, and the other end is disposed on the housing structure. At least a portion of the cable between the power supply device and the electronic equipment within the wafer memory housing is disposed in the first cable chain, which is used to protect the cables disposed in the first cable chain when the support sidewall is separated from the housing structure.
[0008] Optionally, the wafer memory also includes a moving platform and a second cable chain. The moving platform is disposed within the wafer memory cascade and is driven to move vertically within the cascade. The second cable chain is disposed along the moving direction of the moving platform, with one end connected to the moving platform and the other end disposed on the cascade structure. The moving platform and the electronic equipment and power supply disposed on the moving platform are connected via cables disposed within the first and second cable chains, the second cable chain serving to protect the cables disposed within the second cable chain during the movement of the moving platform.
[0009] Optionally, the wafer memory also includes a drive unit fixedly disposed within the wafer memory module. The drive unit is used to provide drive signals to electronic devices based on power supply signals from a power supply device. The cable between the drive unit and the power supply device is disposed within a first cable chain, and the cable between the moving platform and the electronic devices disposed on the moving platform and the drive unit is disposed within a second cable chain.
[0010] Optionally, the cable between the electronic equipment and the power supply unit located on the bearing sidewall is located on the bearing sidewall.
[0011] Optionally, the wafer memory further includes a first side plate and a second side plate disposed along the inner side of the support sidewall in a second vertical direction, with the first side plate and the second side plate respectively disposed on both sides of the first support plate. The upper edge of the first window extends to the lower surface of the second support plate, the lower edge extends to the upper surface of the first support plate, and the left and right sides extend to the first side plate and the second side plate respectively. The first side plate, the second side plate, the first support plate, and the second support plate form an internal window corresponding to the first window at the end away from the support sidewall. An external window plate is disposed between the first support plate and the support sidewall. When the external window plate is in the covered position, it abuts against the first side plate, the second side plate, the first support plate, and the second support plate to block the first window. When the internal window plate is in the covered position, it covers the second end of the first support plate to block the internal window.
[0012] Optionally, the wafer memory also includes a human presence sensor disposed at the first window.
[0013] Optionally, a power supply maintenance cover is provided below the first window on the load-bearing sidewall, and the power supply maintenance cover is detachably connected to the load-bearing sidewall. The power supply maintenance cover is positioned vertically to match the power supply device, so that the power supply device can be exposed to the outside when separated from the load-bearing sidewall.
[0014] Optionally, the housing structure has a second window on one side corresponding to the supporting sidewall, and the wafer memory includes a movable window plate for covering the second window.
[0015] Based on the wafer memory provided in this application embodiment, a region for exchanging wafer cassettes is formed, and two windows, inner and outer, are configured for this region. When the wafer memory stores wafer cassettes, the two windows isolate the wafer memory from the outside world during wafer cassette exchange, ensuring the internal sealing of the wafer memory. This also prevents workers from accidentally entering the wafer memory during manual operations, avoiding injury to workers. Furthermore, considering the vertical movement of the windows, a space is created below the support plate at the window, which is then obscured by the windows. This application creatively places the wafer memory's power supply device in this space. The power supply device can be connected to the outside via cables, and the vertical movement of the windows does not affect its normal operation. Thus, suitable functional mechanisms are provided in an area where interaction with the outside world is difficult, improving the integration within the wafer memory. Attached Figure Description
[0016] To more clearly illustrate the technical solutions of the embodiments of this utility model, the drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this utility model and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.
[0017] Figure 1 This is a schematic diagram of a wafer processing system provided in some embodiments of this application.
[0018] Figure 2 This is a schematic diagram of the structure of a wafer memory provided in some embodiments of this application.
[0019] Figure 3A , 3B This is a schematic diagram of the structure of a wafer memory provided in some embodiments of this application.
[0020] Figure 4 This is a schematic diagram of the structure of the load-bearing sidewall provided in some embodiments of this application.
[0021] Figure 5 This is a schematic diagram of the structure of the storage compartment provided in some embodiments of this application.
[0022] Among them, 100 is a wafer processing system; 110 is a processing unit; 120 is a wafer handling system; 200 is a wafer memory; 210 is a support sidewall; 211 is a first window; 220 is a storage structure; 231 is a first support plate; 232 is a second support plate; 233 is a first side plate; 234 is a second side plate; 241 is an external window plate; 242 is an internal window plate; 250 is a power supply device; 251 is a first cable chain; 252 is a second cable chain; 253 is a power supply maintenance cover plate; 260 is a moving platform; and 270 is a second window. Detailed Implementation
[0023] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0024] Application Overview:
[0025] With the development of wafer fabrication technology, Automatic Material Handling Systems (AMHS) are generally used for wafer transfer in wafer fabrication. Based on AMHS, wafer fabrication equipment can be integrated into multiple processing units during the wafer fabrication process, thereby enabling the transfer of wafers between different units and within processing units through AMHS.
[0026] To further illustrate the AMHS-based wafer fabrication process, this application provides a schematic diagram of a wafer fabrication system 100. Figure 1 The wafer processing system 100 can be understood as a collection of process equipment used in wafer processing.
[0027] like Figure 1 As shown, the wafer processing system 100 may include multiple processing units 110. A processing unit 110 may refer to a cluster of related equipment for one or more processes in the wafer processing technology; that is, a wafer can complete a corresponding processing technology after passing through a corresponding processing unit 110.
[0028] After wafers are assembled, they generally undergo processes such as surface polishing, cleaning, oxidation, photolithography, etching, ion implantation, chemical vapor deposition, physical vapor deposition, chemical mechanical polishing, interconnection, testing, dicing, packaging, and final testing to form semiconductor devices.
[0029] In practical applications, the overall wafer processing can be divided into multiple continuous processing steps according to the actual semiconductor manufacturing requirements. The process equipment of each processing step can form the aforementioned processing unit 110, so that after the wafer enters the processing unit 110, it is automatically / semi-automatically processed by each process equipment to complete the corresponding processing task.
[0030] To enable automatic / semi-automatic material handling in the aforementioned processing unit 110, a wafer handling system 120 can also be integrated into the aforementioned wafer processing system 100. The wafer handling system 120 is an AMHS (Ambidextrous Metal Handling System) applied to wafer processing. In the aforementioned wafer processing system 100, it is mainly used to transfer wafers between processing units 110 and to load and unload wafers for each processing unit 110.
[0031] In practical applications, one or more wafers are typically directly transferred within processing unit 110 for processing using corresponding equipment. Wafers can also be transferred between processing units 110 via wafer cassettes.
[0032] A wafer cassette is a container used in semiconductor manufacturing to hold and transport wafers. Wafer cassettes are primarily used for handling and storing wafers to simplify transportation and reduce the risk of contamination. The interior of a wafer cassette has symmetrical grooves of strictly uniform size to support the two sides of the wafer; typically, one wafer cassette can hold 25 wafers.
[0033] In the wafer processing system 100, the wafer pod can be configured as a front-opening unified pod (FOUP). That is, the wafer pod is open at the front to allow for the retrieval or storage of wafers. Furthermore, in the wafer processing system 100, the wafer pods of different processing units 110 are presented in different styles (mainly distinguished by pod color) to differentiate the different processing stages of the wafers.
[0034] Based on the aforementioned wafer cassette, in the wafer handling system 120, the wafer cassette can be transferred between processing units 110 and wafers can be extracted from the wafer cassette within the processing unit 110. Therefore, the aforementioned wafer handling system 120 may include a wafer cassette carrier and a wafer carrier.
[0035] Wafer cassette transport equipment refers to equipment that transports wafer cassettes between processing units 110. Specifically, wafer cassette transport equipment typically achieves automated or semi-automated wafer cassette transport between processing units 110 through devices capable of handling wafer cassettes. For example, wafer cassette transport equipment can be implemented using overhead hoist transport (OHT), automated material robot (AMR), conveyor, or other transport equipment.
[0036] Similar to the aforementioned wafer carrier equipment, the wafer carrier equipment can refer to equipment that transports wafers within the processing unit 110, or it can be implemented using the aforementioned handling equipment. Furthermore, it should be noted that the specific form of the wafer carrier equipment can be matched to the requirements of the corresponding processing unit 110, so that the process equipment within the processing unit 110 can process the wafers carried on it. Generally, the wafer carrier equipment can also be called a wafer boat.
[0037] Considering the different processing rates at different stages, a buffer structure can also be set up within the wafer handling system 120 to coordinate the processing of each stage. The buffer structure in the wafer handling system 120 is generally presented as a wafer stocker.
[0038] A wafer cassette rack is a device used in semiconductor manufacturing to store and automate the management of wafer cassettes. Each processing unit 110 can be equipped with one or more wafer cassette racks to buffer wafer cassettes awaiting or completed processing. Typically, a wafer cassette rack contains multiple wafer cassette bays to facilitate the storage and dispatch of wafer cassettes, thus balancing the capacity differences between various production process equipment.
[0039] Based on the aforementioned wafer handling system 120, wafer cassettes between processing units 110 can be transferred between wafer cassette storage units in each processing unit 110 via wafer cassette carrying equipment. The wafer cassette storage unit can distribute wafer cassettes as needed, thereby transferring the wafers in the wafer cassettes between various process equipment in the processing unit 110 via wafer carrying equipment to complete the corresponding processing of the wafers.
[0040] Therefore, based on the aforementioned wafer processing system 100, the material handling and processing of wafers can be realized throughout the entire processing process, thereby effectively organizing the relevant process equipment and transportation equipment for wafers, and realizing a high degree of system integration and automation.
[0041] In practical applications, considering the complexity of wafer cassette handling, the interaction between the wafer cassette storage unit and the wafer cassette carrier equipment can generally be achieved through semi-automation. That is, the wafer cassette carrier equipment can be moved to the wafer cassette storage unit, and the exchange of wafer cassettes between the two units can be accomplished manually by staff.
[0042] During this handling process, wafer rack storage units often require open windows to expose the wafer racks to workers for handling or exchange. However, with the windows open, the wafer rack storage unit is exposed to the external environment, potentially compromising its cleanroom environment. Furthermore, workers' limbs may enter the wafer rack storage unit during handling, and given the nature of the unit and the presence of high-speed robotic arms inside, this could cause injury to any limbs entering the unit.
[0043] To address the aforementioned technical problems, this application improves the area for exchanging wafer cassettes in a wafer storage storage unit, thereby forming a wafer memory. Specifically, the wafer memory provided in this application includes an area for exchanging wafer cassettes, equipped with both inner and outer windows. These windows isolate the wafer memory from the outside environment during wafer cassette exchange, ensuring internal sealing and preventing workers from accidentally entering the wafer memory during manual operations, thus avoiding injury to workers.
[0044] Furthermore, considering the vertical movement of the window panel, a space is created below the support plate at the window that will be obscured by the window panel. This application innovatively places the power supply unit for the wafer memory within this space. The power supply unit can be connected to the outside via cables, and the vertical movement of the window panel will not affect its normal operation. Thus, suitable functional mechanisms are placed in an area where interaction with the outside world is difficult, improving the integration density within the wafer memory.
[0045] It should be noted that the wafer memory provided in this application can be understood as a wafer storage library or an improved version thereof. For example, the wafer memory provided in this application can also directly exchange wafers with external systems without wafer exchange through a wafer transport system.
[0046] Various non-limiting embodiments of this application will now be described in detail with reference to the accompanying drawings.
[0047] Exemplary wafer memory:
[0048] As mentioned above, this application provides a wafer memory. The wafer memory can be a device for storing wafer cassettes in an automated material handling system. It typically takes the form of a vertical storage unit, where one side of the wafer memory has a shelf for caching wafer cassettes, and the other side has a mobile robot for moving the wafer cassettes, thereby enabling the relocation of wafer cassettes within the wafer memory.
[0049] To further illustrate the wafer memory provided in this application, this application also provides a schematic diagram of the wafer memory structure. Wherein, Figure 2 This is a schematic diagram of the structure of a wafer memory 200 provided in some embodiments of this application. Figure 2 It can display the overall structure of the wafer memory 200 in the XYZ space.
[0050] exist Figure 2 It can include three reference directions: X-axis, Y-axis, and Z-axis. XOY forms a horizontal plane, Z-axis is the vertical direction of the horizontal plane, and X-axis and Y-axis are two mutually perpendicular directions in the horizontal plane.
[0051] The wafer memory 200 is generally arranged based on the aforementioned horizontal plane and vertical direction. The vertical direction is generally the extension direction of the wafer memory 200, that is, wafer cells can be stacked in the wafer memory along the vertical direction (i.e., the Z-axis direction) to accommodate multiple wafer cells.
[0052] It should be noted that this application does not limit the configuration of the wafer memory. The above reference direction is only for the convenience of describing the selection of wafer memory and can be adjusted according to actual needs during design and assembly.
[0053] like Figure 2 As shown, the wafer memory 200 may include a support sidewall 210, a housing structure 220, a first support plate 231, and a second support plate (not shown in the figure).
[0054] The supporting sidewall 210 and the housing structure 220 cooperate to form the main structure of the wafer memory 200 (i.e., to form a wafer memory cell). The supporting sidewall 210 can be one sidewall of the wafer memory cell, and the housing structure 220 can be other sidewalls of the wafer memory cell.
[0055] The carrier sidewall 210 can be a sidewall in the wafer memory 200 used for caching wafer cassettes. That is, multiple carrier plates can be horizontally arranged within the carrier sidewall 210, and each carrier plate can hold multiple wafer cassettes. For example, a base (also referred to as a carrier stage) for the wafer cassettes can be provided on the carrier plate, so that the wafer cassettes are placed on the base.
[0056] Furthermore, the wafer cassette exchange space of the wafer memory 200 can also be disposed on the carrier sidewall 210. That is, as... Figure 2As shown, a first window 211 for exchanging wafer cassettes is provided on the support sidewall 210. A first support plate 231 is horizontally disposed inside the support sidewall 210 and below the first window 211. A second support plate is horizontally disposed inside the support sidewall 210 and above the first window 211.
[0057] Thus, a wafer cassette exchange space for the wafer memory 200 is formed based on the aforementioned first carrier plate 231, second carrier plate, and first window 211. That is, wafer cassettes removed from the wafer memory 200 can be stored in this space (e.g., on the first carrier plate 231), allowing external personnel to retrieve the wafer cassettes from this area and place them in the wafer cassette carrier equipment. Furthermore, personnel can also move wafer cassettes to be stored from the wafer cassette carrier equipment into this space, thereby using a wafer cassette moving mechanism within the wafer memory 200 to move the wafer cassettes from this space to a suitable position in the storage area.
[0058] To ensure the internal airtightness of the aforementioned wafer memory 200 during wafer cassette swapping, the aforementioned wafer memory 200 may further include an external window panel and an internal window panel (not shown in the original text). Figure 2 (View from the center). The outer and inner window panels can respectively cover both ends of the aforementioned first support plate 231, thereby sealing the wafer cassette exchange space from the outside and inside respectively.
[0059] To further describe the occlusion of the window by the aforementioned internal and external window panels, this application also provides a side view of the wafer memory 200 in different closed states. Figure 3A and Figure 3B ).in, Figure 3A A side view of the internal structure of the wafer memory 200 when the first window 211 is covered by the internal window plate 242. Figure 3B A side view of the internal structure of the wafer memory 200 when the first window 211 is covered by the external window panel 241.
[0060] like Figure 3A , Figure 3B As shown, the aforementioned outer window panel 241 is disposed along the first vertical direction at the first end of the first supporting plate 231 near the supporting side wall 210, and the inner window panel 242 is disposed along the first vertical direction at the second end of the first supporting plate 231 away from the supporting side wall 210. The first vertical direction can be the direction of the plane containing the aforementioned supporting side wall 210, i.e. Figure 2 The direction of the XZ plane. Correspondingly, Figure 2 The direction of the YZ plane is denoted as the second vertical direction.
[0061] To enable wafer cell swapping, the outer window panel 241 and the inner window panel 242 can be driven to move between a storage position and a cover position. The storage position is located below the first support plate 231, and the window panel in the storage position does not obstruct the aforementioned first window 211. The cover position corresponds to the first window 211, and the window panel in the cover position will obstruct the aforementioned first window 211.
[0062] In combination with the above Figure 3A and Figure 3B The storage location can be the internal window panel 242. Figure 3A The position in the middle and the external window panel 241 in Figure 3B The location within the middle. The cover location can be the external window panel 241. Figure 3A The position in the middle and the internal window panel 242 in Figure 3B The position in the middle.
[0063] In some embodiments, to isolate the wafer memory 200 from the external environment, at least one of the external window panel 241 and the internal window panel 242 is located in a covered position, and the external window panel 241 or the internal window panel 242 located in the covered position can block the first window 211. That is, the wafer memory 200 can be in operation... Figure 3A and Figure 3B The state transitions shown are to ensure the isolation of the wafer memory 200 from the external environment.
[0064] Specifically, when storing wafer cassettes into the wafer memory 200, the wafer memory 200 can be in a state of... Figure 3B The state shown. For Figure 3B In the state of the wafer memory 200, a worker or robotic arm can place the wafer cassette onto the first carrier plate 231. Then, the wafer memory 200 can be adjusted to... Figure 3A In the state shown, the wafer cassette mounted on the first carrier plate 231 is exposed inside the wafer memory 200. Similarly, when the wafer memory 200 delivers the wafer cassette externally, it can first be in the state shown. Figure 3A As shown, the wafer cassette to be shipped is placed on the first carrier plate 231, and then adjusted to... Figure 3B The state shown indicates that the wafer housing is exposed to the outside.
[0065] In combination with the above Figure 3A , Figure 3B It is understood that, in order to block the aforementioned first window 211, the area below the first support plate 231 will also be blocked by the window plate, forming an area that cannot directly interact with the outside, and thus cannot support the wafer cassette. For this area, this application creatively places the power supply device 250 of the wafer memory 200 in this space, thereby electrically connecting it to various electronic devices (i.e., power-consuming devices) in this space to supply power to the electronic devices in the wafer memory 200.
[0066] The power supply unit 250 may be a collection of power supply devices (or primary power distribution devices) within the wafer memory 200. The power supply unit 250 can be used to convert the external power supply (such as industrial power) of the wafer memory 200 into the driving voltage required by various electronic devices, thereby enabling power supply to the various devices.
[0067] Based on the aforementioned wafer cassette memory, a region for exchanging wafer cassettes is formed within the wafer memory, and two windows, one inner and one outer, are configured for this region. When wafer cassettes are stored in the wafer memory, the two windows isolate the wafer memory from the outside environment during wafer cassette exchange, ensuring the internal sealing of the wafer memory. This also prevents workers from accidentally entering the wafer memory during manual operations, thus avoiding injury. Furthermore, considering the vertical movement of the windows, a space is created below the support plate at the window, which is then obscured by the windows. This application innovatively places the wafer memory's power supply within this space. The power supply can be connected to the outside via cables, and the vertical movement of the windows does not affect its normal operation. Therefore, suitable functional mechanisms are provided in an area where interaction with the outside world is difficult, improving the integration within the wafer memory.
[0068] In some embodiments, for ease of maintenance, the aforementioned load-bearing sidewall 210 and the hopper structure 220 are detachably coupled, meaning the load-bearing sidewall 210 can be driven to separate from the hopper structure 220. This separation can be achieved under external force. For example, workers can manually release the limiting structure (such as a snap-fit or locking structure) between the load-bearing sidewall 210 and the hopper structure 220, and then separate them by pulling or other separation operations. In some embodiments, a drive motor can also be provided between the load-bearing sidewall 210 and the hopper structure 220 to achieve automatic separation or connection.
[0069] It should be noted that this application does not limit the disassembly and assembly methods of the load-bearing sidewall and the silo structure, as long as it ensures that the load-bearing sidewall and the silo structure can be separated by rotation, translation, or translation followed by rotation.
[0070] Considering that wafer cassettes are typically stored inside the support sidewall 210, separating the support sidewall 210 from the housing structure 220 exposes most of the internal structure of the wafer memory 200 directly to the outside for maintenance. Further details regarding the separation of the support sidewall 210 from the housing structure 220 can be found in [link to relevant documentation]. Figures 4-5 The relevant descriptions will not be repeated here.
[0071] Considering that the aforementioned power supply device 250 is located in the space below the first support plate 231, in order to avoid the impact on the power supply device 250 caused by the separation of the support side wall 210 from the hopper structure 220, the power supply device 250 can be fixedly connected to the support side wall 210, so that it can be exposed to the external environment as the support side wall 210 is separated from the hopper structure 220.
[0072] In some embodiments, a support plate for a power supply device 250 may be provided on the support sidewall 210, thereby mounting the power supply device 250 on the corresponding support plate and achieving a fixed connection with the support sidewall 210.
[0073] In some embodiments, a maintenance access port for the power supply device 250 can be provided on the supporting side wall 210 to facilitate maintenance of the power supply device 250. Specifically, a power supply maintenance cover 253 (e.g., ...) can be provided below the first window 211 on the supporting side wall 210. Figure 2 As shown, the power supply maintenance cover 253 is detachably connected to the load-bearing side wall 210. The power supply maintenance cover 253 is positioned vertically (i.e., along the Z-axis) to match the power supply unit 250. When the power supply maintenance cover 253 is separated from the load-bearing side wall 210 (e.g., when pulled open by personnel), the power supply unit 250 is exposed to the outside.
[0074] Considering the separation of the support sidewall 210 and the housing structure 220, in order to avoid the separation affecting the coordination of the wafer cassette interaction space, the aforementioned wafer cassette interaction space can be realized by relying on the structure of the support sidewall 210. That is, the sidewall of the interaction space in the second vertical direction (i.e., the YZ plane direction) can also be set in the support sidewall 210 without relying on the housing structure 220.
[0075] Therefore, the aforementioned wafer memory 200 also includes a first side plate 233 disposed inside the support sidewall 210 along the second vertical direction. Figure 2 The first side plate 233 and the second side plate (not shown in the figure) are respectively disposed on both sides of the first support plate 231 to serve as the side walls of the aforementioned wafer cassette exchange space.
[0076] To further expand the interaction space of the wafer cassette, the size of the aforementioned window can be set based on the surrounding substrate. That is, the upper edge of the first window 211 can extend to the lower surface of the second support plate 232, the lower edge can extend to the upper surface of the first support plate 231, and the left and right sides can extend to the first side plate 233 and the second side plate, respectively.
[0077] Thus, the first side plate 233, the second side plate, the first support plate 231, and the second support plate 232 form an internal window corresponding to the first window 211 at the end of the wafer memory 200 away from the support sidewall 210. The size of this window is the same as that of the first window 211 and is achieved through the edge of the aforementioned plates.
[0078] To achieve the sealing of the inner window and the outer window (i.e., the first window 211), the aforementioned outer window panel 241 is disposed between the first support plate 231 and the support side wall 210, thereby enabling movement between the sealing position and the storage position. When the outer window panel 241 is in the sealed position, it abuts against the first side plate 233, the second side plate 234, the first support plate 231, and the second support plate 232 to cover the first window 211. When the inner window panel 242 is in the sealed position, it covers the second end of the first support plate 231 to cover the inner window.
[0079] Furthermore, to prevent abnormal operation by staff from causing staff members' limbs to enter the wafer memory 200, the aforementioned wafer memory 200 may also include a human presence sensor disposed at the first window 211. The human presence sensor can be used to detect the presence of staff members' limbs within the wafer cassette exchange space (e.g., using a camera, infrared sensor, etc.), thereby ensuring that the internal window panel 242 is at least in a closed position when the limbs are present within the wafer cassette exchange space.
[0080] In some embodiments, the housing structure 220 has a second window on the side corresponding to the support sidewall 210 (i.e., the side not shown in the figure). Through this window, the wafer memory 200 can interact with the process unit. For example, a suitable wafer cassette / wafer can be provided. Considering that on the process unit side, the second window generally interacts with the support equipment of the overhead crane system, it does not need to form a space of a certain width; simply providing the window is sufficient. This window can be directly closed by a window plate; that is, the wafer memory 200 includes a movable window plate for covering the second window. Furthermore, in other cases, the movable window plate for the second window can also be provided by related equipment of the process unit.
[0081] Exemplary internal structure of wafer memory:
[0082] As mentioned above, considering the separation of the load-bearing sidewall from the silo structure, to further illustrate this separation, this application also provides a schematic diagram of the internal structure of the load-bearing sidewall and silo structure in the separated state. Among them, Figure 4 This can be a schematic diagram of the internal structure of the load-bearing sidewall 210. Figure 5 This can be a schematic diagram of the internal structure of the silo structure 220.
[0083] like Figure 4As shown, the power supply unit 250 can be directly exposed on the bearing side wall 210. Wherein, in Figure 4 In theory, the power supply device 250 also has an internal window panel on its exterior. However, considering that the power supply device 250 can be exposed when the internal window panel is moved to the cover position, that is, in Figure 4 The window panel was hidden inside.
[0084] In addition, such as Figure 4 As shown, multiple bases are also provided on the aforementioned second support plate 232, and multiple support plates with bases are also provided above the second support plate 232. The second side plate 234 is also shown. Figure 4 middle.
[0085] Considering that some of the equipment on the aforementioned load-bearing sidewall is electronic (such as sensors on the aforementioned base, motors on the window panel, etc.), the electronic equipment can be directly wired from the load-bearing sidewall when making circuit connections. That is, the cable between the electronic equipment and the power supply device located on the load-bearing sidewall is set on the load-bearing sidewall.
[0086] Furthermore, considering the large number of electronic devices housed within the wafer storage module, the power supply unit needs to power the electronic devices within the wafer storage module (i.e., module 220). Considering the aforementioned separation, a cable chain can be used for cable protection to protect the cables between the power supply unit and the electronic devices within the wafer storage module. Specifically, the wafer memory module may further include a first cable chain positioned along the direction of mating with the module's support sidewall. One end of the first cable chain is connected to the power supply unit, and the other end is positioned on the module structure. At least a portion of the cables between the power supply unit and the electronic devices within the wafer storage module are housed in the first cable chain, which protects the cables within it when the support sidewall is separated from the module structure.
[0087] A cable chain is a device used for the protection and traction of power lines. Resembling a tank track, it consists of multiple unit links, each capable of free rotation, facilitating installation and maintenance. The primary function of a cable chain is to house, pull, and protect internal cables, preventing them from becoming entangled, twisted, or damaged during operation.
[0088] See above Figure 5 The diagram shows the internal structure of the storage compartment 220. Figure 5 In the middle, the first cable chain 251 is fixedly installed on the bottom surface of the hopper structure 220 (the top surface and the ground are hidden for realistic effect). The other end of the first cable chain 251 is fixed to the power supply device on the aforementioned load-bearing side wall.
[0089] Figure 5The first cable chain 251 shown can reflect the shape of the cable chain when it is not separated. When separated, the chain of the cable chain will move along the separation direction, but the curvature between the two approximately parallel parts at the compartment structure 220 will not change with the separation, so as to avoid the internal cables from being tangled, twisted and damaged due to the change in shape.
[0090] It should be noted that, considering the distribution of electronic devices in the wafer storage container, the aforementioned first drag chain 251 only connects a portion of the circuits, and more lines need to be arranged within the aforementioned container structure 220. Therefore, at least a portion of the cables between the aforementioned power supply device 250 and the electronic devices in the wafer storage container are located in the first drag chain 251, which can refer to the cables between the electronic devices and the power supply device 250, while the remaining portion needs to be arranged within the aforementioned container structure 220.
[0091] Considering the operational requirements of the automated storage and retrieval system (AS / RS) itself, the aforementioned wafer memory 200 may further include a vertically movable platform 260. For similar reasons, a second cable chain 252 is also provided within the wafer memory 200 to ensure continuous power supply when the movable platform 260 moves vertically. That is, the movable platform 260 is located within the wafer storage compartment and is driven to move vertically within the compartment. The second cable chain 252 is positioned along the direction of movement of the movable platform 260, with one end connected to the movable platform 260 and the other end mounted on the compartment structure 220, so that the second cable chain 252 can protect the cables housed within it when the movable platform 260 moves.
[0092] Considering that the aforementioned mobile platform 260 also needs to be powered by the aforementioned power supply device 250, the mobile platform 260 and the electronic devices installed on the mobile platform 260 are connected to the power supply device 250 through cables installed in the first drag chain 251 and the second drag chain 252.
[0093] Therefore, based on the aforementioned first cable chain 251 and second cable chain 252, when the power supply unit 250 is connected to electronic devices in the hopper structure 220 that are not on the moving platform 260 (such as sensors on the top wafer cassette base, monitoring equipment inside the hopper structure 220, etc.), the cable can be connected to the hopper structure 220 via the first cable chain 251 and then laid on the hopper structure 220. When the power supply unit 250 is connected to electronic devices on the moving platform 260 (such as moving mechanisms, lifting mechanisms, etc.), the cable is first connected to the hopper structure 220 via the first cable chain 251 and then connected to the second cable chain 252 to establish the connection.
[0094] In some embodiments, considering the large number of electronic devices on the mobile platform 260, a secondary power supply device can be configured for it. The wafer memory 200 also includes a drive device (not shown) fixedly disposed in the wafer memory compartment. The drive device can be powered by the power supply device 250 to provide appropriate drive current / drive voltage / drive signal to the electronic devices on the mobile platform 260 to achieve secondary power distribution.
[0095] Considering the aforementioned first cable chain 251 and second cable chain 252, the cable between the drive device and the power supply device 250 can be installed in the first cable chain 251, and the cable between the mobile platform 260 and the electronic equipment installed on the mobile platform 260 and the drive device can be installed in the second cable chain 252.
[0096] Furthermore, in the aforementioned Figure 5 The second window 270 is also shown, which can be used to exchange wafer cassettes / wafers as needed.
[0097] It should be noted that the elements described in the above specific embodiments can be combined in any suitable manner without contradiction. To avoid unnecessary repetition, this application will not describe the various possible combinations separately.
[0098] It should be understood that multiple components and / or parts can be provided by a single integrated component or part. Alternatively, a single integrated component or part can be divided into multiple separate components and / or parts. The use of the public designation "a" or "an" to describe a component or part is not intended to exclude other components or parts.
[0099] It should be understood that although terms such as "first" or "second" may be used in this application to describe various elements, these elements are not defined by these terms, which are only used to distinguish one element from another.
[0100] The basic principles of this application have been described above with reference to specific embodiments. However, it should be noted that the advantages, benefits, and effects mentioned in this application are merely examples and not limitations, and should not be considered as essential features of each embodiment of this application. Furthermore, the specific details disclosed above are for illustrative and facilitative purposes only, and are not limitations. These details do not limit the application to the necessity of employing the aforementioned specific details for implementation.
[0101] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.
Claims
1. A wafer memory, characterized in that, include: The supporting sidewall is arranged along the first vertical direction, and a first window is opened on its surface; The housing structure, in conjunction with the supporting sidewall, forms a wafer storage compartment; The first bearing plate is disposed horizontally inside the bearing side wall and located below the first window; The second support plate is arranged horizontally inside the support side wall and above the first window; An external window panel is disposed along a first vertical direction at the first end of the first support plate near the support sidewall, and is driven to move between a storage position and a cover position, wherein the storage position is located below the first support plate, and the cover position corresponds to the first window. An inner window panel is disposed at the second end of the first support plate away from the support sidewall along a first vertical direction and is driven to move between a storage position and a cover position. At least one of the outer window panel and the inner window panel is located in the cover position and the outer window panel or the inner window panel located in the cover position can block the first window. as well as A power supply device is disposed below the first carrier plate and between the storage positions of the outer window plate and the inner window plate, for supplying power to the electronic devices within the wafer memory.
2. The wafer memory according to claim 1, characterized in that, The load-bearing sidewall is detachably connected to the compartment structure, and the load-bearing sidewall can be driven to separate from the compartment structure. The power supply device is fixedly connected to the load-bearing sidewall and can be exposed to the external environment when the load-bearing sidewall is separated from the silo structure.
3. The wafer memory according to claim 2, characterized in that, The wafer memory includes a first drag chain arranged along the direction of the bearing sidewall and the housing structure, one end of the first drag chain being connected to the power supply device, and the other end being disposed on the housing structure; At least a portion of the cable between the power supply and the electronic equipment within the wafer storage cascade is disposed in the first cable chain, which is used to protect the cable disposed in the first cable chain when the load-bearing sidewall is separated from the cascade structure.
4. The wafer memory according to claim 3, characterized in that, The wafer memory also includes a mobile platform and a second drag chain; The mobile platform is disposed within the wafer storage bin and is driven to move vertically within the wafer storage bin; the second drag chain is disposed along the moving direction of the mobile platform, with one end connected to the mobile platform and the other end disposed on the bin structure. The mobile platform and the electronic devices disposed on the mobile platform are connected to the power supply device via cables disposed in the first cable chain and the second cable chain, wherein the second cable chain is used to protect the cables disposed in the second cable chain when the mobile platform moves.
5. The wafer memory according to claim 4, characterized in that, The wafer memory also includes a drive device fixedly disposed within the wafer memory module, the drive device being used to provide drive signals for electronic devices based on the power supply signal of the power supply device; The cable between the drive device and the power supply device is disposed in the first cable chain, and the cable between the mobile platform and the electronic equipment disposed on the mobile platform and the drive device is disposed in the second cable chain.
6. The wafer memory according to claim 2, characterized in that, The cable between the electronic device and the power supply device, which is located on the bearing sidewall, is disposed on the bearing sidewall.
7. The wafer memory according to claim 1, characterized in that, The wafer memory further includes a first side plate and a second side plate disposed along the inner side of the support sidewall in a second vertical direction, wherein the first side plate and the second side plate are respectively disposed on both sides of the first support plate; The upper edge of the first window extends to the lower surface of the second support plate, the lower edge extends to the upper surface of the first support plate, and the left and right sides extend to the first side plate and the second side plate, respectively. The first side plate, the second side plate, the first support plate, and the second support plate form an internal window corresponding to the first window at the end away from the support sidewall; The external window panel is disposed between the first support plate and the support side wall. When the external window panel is in the covered position, it abuts against the first side plate, the second side plate, the first support plate, and the second support plate to block the first window. When the internal window panel is in the covered position, it covers the second end of the first support plate to block the internal window.
8. The wafer memory according to claim 7, characterized in that, The wafer memory also includes a human presence sensor disposed at the first window.
9. The wafer memory according to claim 1, characterized in that, The load-bearing sidewall is provided with a power maintenance cover plate below the first window, and the power maintenance cover plate is detachably connected to the load-bearing sidewall. The power supply maintenance cover is positioned vertically to match the power supply device, allowing the power supply device to be exposed to the outside when separated from the supporting side wall.
10. The wafer memory according to claim 1, characterized in that, The hopper structure has a second window on one side corresponding to the supporting sidewall, and the wafer memory includes a movable window plate for covering the second window.