Electrode slice interconnection module
By using a gridless electrode design and conductive adhesive layer connection, the problems of current conduction complexity and paste consumption in photovoltaic solar cells are solved, thereby improving cell performance and reducing costs.
Patent Information
- Application Number
- CN202422643429.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-31
- Publication Date
- 2025-11-11
- Estimated Expiration
- 2034-10-31
AI Technical Summary
In existing photovoltaic solar cell designs, the removal of the main grid line leads to complex current conduction paths, uneven current distribution, increased manufacturing complexity and cost, and limited effects on reducing paste consumption and shading area, making it difficult to improve cell performance and reduce costs.
It adopts a main gridless electrode sheet design, directly connects to the harpoon end through the sub-grid line, and uses conductive adhesive layer and welding strip to achieve electrical connection. Combined with the mounting components for fixation and protection, it simplifies the printing process and reduces the light-blocking area and paste consumption.
This has resulted in improved current collection capabilities, reduced resistance losses, simplified manufacturing processes, lower equipment and material costs, and increased component power and stability.
Smart Images

Figure CN223540875U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of battery electrode technology, and in particular to an electrode sheet interconnection module. Background Technology
[0002] The photovoltaic solar cell industry is undergoing unprecedented transformation and innovation, a process deeply influenced by rapid global technological advancements, widespread environmental awareness, and the extensive promotion of new energy applications. Solar energy, as a clean and renewable energy source, is increasingly accounting for a larger share of the global energy mix, becoming a significant force in replacing traditional fossil fuels. Against this backdrop, the efficiency and cost control of solar cells have become the core driving forces for industry development. While significant progress has been made in the photovoltaic solar cell field, it still faces numerous technical challenges, particularly the increasingly prominent shortcomings in existing production processes. In the manufacturing process of silicon-based solar cells, although screen printing technology is relatively mature and can improve cell efficiency through precise control of grid line width and layout, this technology is still limited by issues such as high paste consumption and difficulty in further reducing the shading area. While the design of fine grid lines and main grid lines is quite sophisticated, compromises are often necessary in terms of paste usage and shading area to ensure sufficient current conduction capacity, which to some extent limits further improvements in cell photoelectric conversion efficiency.
[0003] Furthermore, the design and manufacturing process of the pad points, as a critical component connecting the battery to the external circuitry, also has shortcomings. Although the width of the main grid connection lines is increased compared to the sub-grid lines to ensure stable current transmission, this design also introduces additional shading area and paste consumption. Simultaneously, the connection methods and material selection between pad points also face challenges. How to further reduce shading area and lower material costs while ensuring connection reliability has become a pressing issue for current technology. Therefore, the photovoltaic solar cell field still needs continuous exploration and innovation to overcome the shortcomings of existing technologies and drive the continuous improvement of battery efficiency and economics.
[0004] Patent document CN220543927U discloses a front electrode pattern for a solar cell, including a silicon wafer with several pad groups and sub-grid lines. The pad groups include end pads, internal pads, and sub-grid pads. The end pads are connected to a portion of the end sub-grid lines via extensions; the internal pads are connected to a portion of the middle sub-grid lines; and the sub-grid pads are connected to a single middle sub-grid line. This solar cell front electrode pattern utilizes the connection of end pads to a portion of the end sub-grid lines via extensions, while the internal pads connect to a portion of the middle sub-grid lines, and the sub-grid pads are connected to a single sub-grid line. Solder ribbons are simultaneously soldered to the end pads, internal pads, and sub-grid pads, thereby eliminating the need for main grid lines. Each sub-grid line contacts the solder ribbon via a pad group, thus reducing resistance loss, light-shielding area, and paste consumption, and lowering manufacturing costs.
[0005] As with the prior art of the aforementioned patent, although the device has made some improvements in the design of photovoltaic solar cells, it still has significant drawbacks and shortcomings. First, although the main grid connection line between the Pad points is removed to reduce the shading area and paste consumption, this approach also brings new problems: after removing the main grid, the current conduction path becomes more complex, which may lead to uneven current distribution and thus affect the photoelectric conversion efficiency of the cell. Second, although interconnecting lines are added between the sub-grids to facilitate current collection, this design increases the complexity and cost of manufacturing, and the presence of interconnecting lines may also introduce additional shading area. In addition, although the gradually thickened design at the Pad point direction perpendicular to the sub-grid is beneficial for welding and current collection, this design requires extremely high process precision, and slight carelessness may lead to poor welding or low current collection efficiency. Despite these improvements, since the Pad points are still retained and the effects of reducing paste consumption and shading are limited, overall, these improvements have not fundamentally solved the core problems of shading area and paste consumption in photovoltaic solar cells, and their impact on improving cell performance and reducing costs is relatively limited. Utility Model Content
[0006] The purpose of this invention is to provide an electrode interconnection module to address the aforementioned shortcomings in the prior art.
[0007] To achieve the above objectives, the present invention adopts the following technical solution: an electrode interconnect module, comprising two main gridless electrode sheets and multiple welding strips, wherein a conductive adhesive layer is disposed on the sub-grid line between the harpoon ends, the two electrode silicon sheets are arranged alternately, the welding strips are respectively welded to the conductive adhesive layer on the two electrode silicon sheets, and mounting components are disposed on the outside of the two electrode silicon sheets.
[0008] A gateless electrode sheet includes an electrode silicon wafer with a plurality of sub-gate lines disposed thereon. The plurality of sub-gate lines are arranged longitudinally on the surface of the electrode silicon wafer. A plurality of harpoon ends are disposed on the sub-gate lines disposed on the two sides and the middle of the electrode silicon wafer. One end of each harpoon end is provided with a connection point, and the harpoon end is electrically connected to the sub-gate line through the connection point.
[0009] As a further description of the above technical solution: the width of the sub-gate line is set in the range of 12-15 μm.
[0010] As a further description of the above technical solution: the length of the conductive adhesive layer is set in the range of 200-500μm, and the width of the conductive adhesive layer is set in the range of 20-30μm.
[0011] As a further description of the above technical solution: the mounting assembly includes a packaging frame, which covers the outside of the two electrode silicon wafers. A plurality of support pillars are fixedly installed on the inner wall of the packaging frame, and the plurality of support pillars abut against the electrode silicon wafers. A rubber pad is provided at the end of the support pillar that contacts the electrode silicon wafer.
[0012] As a further description of the above technical solution: the inner wall of the packaging frame has two grooves, and the welding strip is disposed inside the grooves.
[0013] This invention provides an electrode sheet interconnection module. The design offers the following advantages: By eliminating the traditional main grid lines and pads, the electrode silicon wafers utilize sub-grid lines directly connected to the harpoon ends. These harpoon ends then achieve electrical connection to the sub-grid lines via connection points. This gridless design reduces the light-shielding area of the electrodes and decreases paste consumption. Specifically, the electrode consists of harpoon ends and multiple sub-grid lines. These electrode patterns can be printed in a single step. The gridless design reduces the screen printing process from one step to two, further lowering the cost of screen printing materials and equipment. A conductive adhesive layer connects the solder strip to the sub-grid lines, enabling interconnection of two gridless electrode wafers. After UV or thermal curing, the conductive adhesive layer exhibits excellent conductivity and adhesion, ensuring a stable connection between the solder strip and the sub-grid lines. After UV or thermal curing, the solder strip is laid onto the conductive adhesive for infrared soldering. The solder strip directly contacts each sub-grid through the conductive adhesive, eliminating the need for a main grid busbar. This allows for more direct and effective current extraction from the grid lines, reducing resistance loss and increasing current collection capacity, thereby improving module power. Simultaneously, the mounting module is used to fix and protect the electrode wafer interconnection module.
[0014] It should be understood that the foregoing general description and the following detailed description are exemplary and illustrative only, and are not intended to limit this disclosure.
[0015] This application provides an overview of various implementations or examples of the technology described in this disclosure, and is not a full disclosure of the entire scope or all features of the disclosed technology. Attached Figure Description
[0016] Figure 1 This is a top view schematic diagram of a main grid-less electrode sheet proposed in this utility model;
[0017] Figure 2 For the present utility model Figure 1 A magnified structural diagram at point B;
[0018] Figure 3 This is a cross-sectional view of the electrode sheet interconnection module of this utility model;
[0019] Figure 4 This utility model Figure 3 A magnified structural diagram at point A;
[0020] Figure 5 This is a three-dimensional structural diagram of the electrode sheet interconnection module of this utility model with the installation component added;
[0021] Figure 6 This is a side view of the mounting components of this utility model.
[0022] Figure 7 This is a three-dimensional structural diagram of the groove formed on the packaging frame of this utility model.
[0023] Legend:
[0024] 1. Welding strip; 2. Conductive adhesive layer; 3. Sub-gate line; 4. Electrode silicon wafer; 5. Harpoon end; 6. Connection point; 7. Support post; 8. Encapsulation frame; 9. Groove; 10. Rubber pad. Detailed Implementation
[0025] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present utility model. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments.
[0026] Reference Figure 1-7An electrode interconnect module includes two gridless electrode sheets and multiple welding strips 1. A conductive adhesive layer 2 is disposed on the sub-grid lines 3 between the harpoon ends 5. The two electrode silicon wafers 4 are arranged alternately. The welding strips 1 are welded to the conductive adhesive layers 2 on the two electrode silicon wafers 4 respectively. An mounting assembly is disposed on the outside of the two electrode silicon wafers 4. The welding strips 1 are connected to the sub-grid lines 3 through the conductive adhesive layer 2, realizing the interconnection of the two gridless electrode sheets. After UV or thermal curing, the conductive adhesive layer 2 has good conductivity and adhesion, ensuring a stable connection between the welding strips 1 and the sub-grid lines 3. After UV or thermal curing, the welding strips are laid on the conductive adhesive positions for infrared welding. The welding strips directly contact each sub-grid through the conductive adhesive, eliminating the need for a main grid busbar. This makes the grid line current output more direct and effective, reducing resistance loss and increasing current collection capacity, thereby improving the module power. Simultaneously, the mounting assembly is used to fix and protect the electrode interconnect module.
[0027] A gridless electrode includes an electrode silicon wafer 4 with multiple sub-grid lines 3 arranged longitudinally on its surface. Multiple harpoon ends 5 are provided on the sub-grid lines 3 located at the edges and center of the electrode silicon wafer 4. Each harpoon end 5 has a connection point 6 at one end, and is electrically connected to the sub-grid lines 3 via the connection point 6. By eliminating the traditional main grid lines and pads, the electrode silicon wafer 4 uses sub-grid lines 3 directly connected to the harpoon ends 5, which are then electrically connected to the sub-grid lines 3 via the connection point 6. This gridless design reduces the light-shielding area of the electrode and decreases paste consumption. Specifically, the electrode consists of harpoon ends 5 and multiple sub-grid lines 3. These electrode patterns can be printed in one step. The gridless design reduces the screen printing process from four steps to two, further reducing the cost of screen printing materials and equipment.
[0028] As a preferred technical solution in this embodiment, the width of the sub-gate line 3 is set in the range of 12-15 μm; controlling the width of the sub-gate line 3 within the range of 12-15 μm can further reduce the shading area and paste consumption while ensuring current transmission efficiency.
[0029] As a preferred technical solution in this embodiment, the length of the conductive adhesive layer 2 is set in the range of 200-500μm, and the width of the conductive adhesive layer 2 is set in the range of 20-30μm. Controlling the length and width of the conductive adhesive layer 2 within a certain range can ensure sufficient contact and stable connection between the welding strip 1 and the sub-gate line 3. At the same time, a suitable size of the conductive adhesive layer 2 can also improve the power and reliability of the component.
[0030] As a preferred embodiment, the mounting assembly includes a packaging frame 8, which covers the two electrode silicon wafers 4. Multiple support pillars 7 are fixedly installed on the inner wall of the packaging frame 8, and these support pillars 7 abut against the electrode silicon wafers 4. A rubber pad 10 is provided at the end of each support pillar 7 that contacts the electrode silicon wafer 4. The packaging frame 8 is used to fix and protect the electrode interconnect module. Since the two electrode silicon wafers 4 are staggered, the support pillars 7 support the electrode silicon wafers 4 and balance their weight, preventing deformation or damage. The rubber pad 10 increases the friction between the support pillars 7 and the electrode silicon wafers 4, preventing the electrode silicon wafers 4 from slipping or moving. The rubber pad 10 also protects the electrode silicon wafers 4, preventing damage from the support pillars 7. The mounting assembly improves the stability and reliability of the electrode interconnect module.
[0031] As a preferred embodiment, the inner wall of the encapsulation frame 8 has two grooves 9, and the welding strip 1 is disposed inside the grooves 9. The grooves 9 on the inner wall of the encapsulation frame 8 are used to accommodate the welding strip 1, which can ensure that the position of the welding strip 1 is stable and not easily affected by the external environment. At the same time, the grooves 9 can also play a guiding and positioning role, which facilitates the installation and fixing of the welding strip 1.
[0032] The above description is only a preferred embodiment of the present utility model, but the protection scope of the present utility model is not limited thereto. Any equivalent substitutions or changes made by those skilled in the art within the technical scope disclosed in the present utility model, based on the technical solution and the inventive concept of the present utility model, should be included within the protection scope of the present utility model.
Claims
1. An electrode interconnect module, comprising a gateless electrode, the gateless electrode comprising an electrode silicon wafer (4), wherein a plurality of sub-gate lines (3) are disposed on the electrode silicon wafer (4), the plurality of sub-gate lines (3) being arranged longitudinally on the surface of the electrode silicon wafer (4), wherein a plurality of harpoon ends (5) are disposed on the sub-gate lines (3) disposed on the two sides and the middle of the electrode silicon wafer (4), one end of the harpoon end (5) is provided with a connection point (6), the harpoon end (5) being electrically connected to the sub-gate lines (3) through the connection point (6), the width of the sub-gate lines (3) being set in the range of 12-15 μm, characterized in that, Also includes: Multiple welding strips (1), conductive adhesive layer (2) is provided on the sub-gate line (3) between the harpoon ends (5), two electrode silicon wafers (4) are arranged alternately, the welding strips (1) are welded to the conductive adhesive layer (2) on the two electrode silicon wafers (4) respectively, and mounting components are provided on the outside of the two electrode silicon wafers (4).
2. The electrode sheet interconnection module according to claim 1, characterized in that, The length of the conductive adhesive layer (2) is set in the range of 200-500μm, and the width of the conductive adhesive layer (2) is set in the range of 20-30μm.
3. The electrode sheet interconnection module according to claim 2, characterized in that, The mounting assembly includes a packaging frame (8) which covers the outside of two electrode silicon wafers (4). Multiple support columns (7) are fixedly installed on the inner wall of the packaging frame (8). The multiple support columns (7) abut against the electrode silicon wafers (4). A rubber pad (10) is provided at the end of the support column (7) that contacts the electrode silicon wafers (4).
4. The electrode sheet interconnection module according to claim 3, characterized in that, The inner wall of the encapsulation frame (8) has two grooves (9), and the welding strip (1) is disposed inside the grooves (9).
Citation Information
Patent Citations
Front electrode pattern of solar cell
CN220543927U