Multi-gear automatic calibration constant current source circuit
By simplifying the design of the multi-level constant current source circuit, the control signal is directly output using the FPGA module. Combined with the signal isolation and calibration circuit module, a low-cost and efficient multi-level constant current output and automatic calibration are achieved, solving the problems of circuit complexity and high cost in the existing technology.
Patent Information
- Application Number
- CN202423233101.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-26
- Publication Date
- 2025-11-14
- Estimated Expiration
- 2034-12-26
AI Technical Summary
Existing multi-level constant current source circuit designs are complex and costly, leading to increased hardware and development costs for testing equipment.
By directly outputting control signals through the FPGA module, and combining the signal isolation module, constant current circuit module, calibration circuit module and clamping circuit module, the circuit structure is simplified, multi-level constant current output is achieved, and automatic calibration is achieved through the calibration circuit.
It reduces hardware and development costs, simplifies circuit design, and improves measurement accuracy and efficiency through automatic calibration.
Smart Images
Figure CN223552041U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the technical field of constant current source circuits, specifically a multi-level automatic calibration constant current source circuit. Background Technology
[0002] Most general-purpose instruments on the market, including specialized analytical instruments such as multimeters, oscilloscopes, signal generators, and spectrum analyzers, have multi-level constant current source circuits. For multi-level constant current source circuit designs, a set of serial data is typically output from an MCU or FPGA module and sequentially passes through an optocoupler isolation circuit module, a driver circuit module, and a serial-to-parallel data conversion circuit module to control multiple analog switches, thereby achieving channel switching. This design method involves multiple stages of signal conversion, making the entire circuit circuit very complex and costly. Utility Model Content
[0003] Therefore, it is necessary to provide a low-cost, multi-level automatic calibration constant current source circuit. This application directly outputs control signals through an FPGA module to adjust the current output of different channels of the constant current circuit.
[0004] A multi-level automatic calibration constant current source circuit includes a signal isolation module, a constant current circuit module, a calibration circuit module, and a clamping circuit module. The input terminal of the signal isolation module is connected to the signal output terminal of an FPGA module, the output terminal of the signal isolation module is connected to the control terminals of the constant current circuit module and the calibration circuit module, and the output terminal of the constant current circuit module is connected to the input terminal of the calibration circuit module and the input terminal of the clamping circuit module.
[0005] The constant current circuit module includes a first multi-channel analog switch unit and a constant current unit. The control terminal of the first multi-channel analog switch unit is connected to the output terminal of the signal isolation module, and the output terminal is connected to the input terminal of the constant current unit.
[0006] In one embodiment, the signal isolation module includes a digital isolation unit for effectively isolating the FPGA module and the constant current circuit module.
[0007] In one embodiment, the first multi-channel analog switch unit includes a first multi-channel analog switch subunit, an eighth resistor, a ninth resistor, a tenth resistor, and an eleventh resistor. One end of the eighth resistor, the ninth resistor, the tenth resistor, and the eleventh resistor are connected to the VCC terminal, and the other end is connected to the input terminal of the first multi-channel analog switch subunit.
[0008] In one embodiment, the constant current unit includes a first operational amplifier, a first switching unit, a seventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a second capacitor, and a second Zener diode. One end of the seventh resistor is connected to the VCC terminal, and the other end is connected to one end of the twelfth resistor. The other end of the twelfth resistor is connected to one end of the thirteenth resistor and the positive input terminal of the first operational amplifier. The negative terminal of the second Zener diode is connected to one end of the seventh resistor, and the positive terminal is connected to the positive input terminal of the first operational amplifier. One end of the fifteenth resistor is connected between the seventh and twelfth resistors. The common connection point is connected, and the other end is connected to the second end of the first switching unit. The first output terminal of the first multi-channel analog switch subunit is connected to the second end of the first switching unit. One end of the fourteenth resistor is connected to the second output terminal of the first multi-channel analog switch subunit and the inverting input terminal of the first operational amplifier, respectively. The other end is connected to the second end of the first switching unit. The output terminal of the first operational amplifier is connected to the third end of the first switching unit. The first end of the first switching unit is connected to the control terminal of the calibration circuit module and the input terminal of the clamping circuit module, respectively. The second capacitor is connected in parallel with the fourteenth resistor.
[0009] In one embodiment, the first switching unit is a P-MOS transistor.
[0010] In one embodiment, the calibration circuit module includes a second multi-channel analog switch unit, a fourth resistor, and a first capacitor. One end of the fourth resistor is connected to the first output terminal of the second multi-channel analog switch unit, and the other end is connected to ground. One end of the first capacitor is connected to the fourth output terminal of the second multi-channel analog switch unit, and the other end is connected to ground.
[0011] In one embodiment, the clamping circuit module includes a second operational amplifier, a second switching unit, a fifth resistor, and a sixth resistor. One end of the fifth resistor is connected to the VCC terminal, and the other end is connected to one end of the sixth resistor. The other end of the sixth resistor is connected to ground. The inverting input terminal of the second operational amplifier is connected to its output terminal, and the non-inverting input terminal is connected to the common connection point between the fifth and sixth resistors. The output terminal of the second operational amplifier is connected to the third terminal of the second switching unit. The first terminal of the second switching unit is connected to the first terminal of the first switching unit, and the second terminal of the second switching unit is connected to the constant current output terminal.
[0012] In one embodiment, the second switching unit is a P-MOS transistor.
[0013] In one embodiment, the multi-level automatic calibration constant current source circuit further includes a circuit protection module. The circuit protection module includes a third operational amplifier, a first control unit, a second control unit, a first Zener diode, a first resistor, a second resistor, and a third resistor. The inverting input terminal of the third operational amplifier is connected to its output terminal, and the non-inverting input terminal is connected to one end of the first resistor. The other end of the first resistor is connected to the first end of the second control unit. The second end of the second control unit is connected to one end of the second resistor and the negative terminal of the first Zener diode. The positive terminal of the first Zener diode is connected to ground. The other end of the second resistor is connected to the inverting input terminal of the third operational amplifier. The third end of the second control unit is connected to the second end of the first control unit. The first and third ends of the first control unit are connected to the negative terminal of the first Zener diode. One end of the third resistor is connected to the constant current output terminal, and the other end is connected to the second end of the second switching unit.
[0014] In one embodiment, the first control unit is a PNP transistor and the second control unit is an NPN transistor.
[0015] The beneficial effects of the above-mentioned multi-level automatic calibration constant current source circuit are as follows: through the coordinated setup of the signal isolation module, constant current circuit module, calibration circuit module, and clamping circuit module, the FPGA module directly outputs control signals, which are then controlled by the signal isolation module to control the first multi-channel analog switch unit and constant current unit in the constant current circuit module, thereby achieving constant current output at different levels. This reduces the process of converting serial data to parallel control signals and related circuit modules, effectively reducing hardware and development costs. Furthermore, the calibration circuit module enables automatic calibration of the circuit. Attached Figure Description
[0016] Figure 1 This is a schematic diagram of the multi-level automatic calibration constant current source circuit of this utility model;
[0017] Figure 2 for Figure 1 The circuit diagram of the multi-level automatic calibration constant current source circuit of this utility model. Detailed Implementation
[0018] To make the above-mentioned objects, features, and advantages of this utility model more apparent and understandable, the specific embodiments of this utility model will be described in detail below with reference to the accompanying drawings. Many specific details are set forth in the following description to provide a full understanding of this utility model. However, this utility model can be implemented in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of this utility model. Therefore, this utility model is not limited to the specific embodiments disclosed below.
[0019] It should be noted that when a component is considered to be "connected" to another component, it can be directly connected to the other component or there may be an intermediary component present. Conversely, when a component is said to be "directly" connected to another component, there is no intermediary component.
[0020] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.
[0021] like Figure 1 and Figure 2 As shown, a multi-level automatic calibration constant current source circuit includes a signal isolation module 1, a constant current circuit module 2, a calibration circuit module 3, and a clamping circuit module 4. The input terminal of the signal isolation module 1 is connected to the signal output terminal of the FPGA module 5. The output terminal of the signal isolation module 1 is connected to the control terminals of the constant current circuit module 2 and the calibration circuit module 3, respectively. The output terminal of the constant current circuit module 2 is connected to the input terminal of the calibration circuit module 3 and the input terminal of the clamping circuit module 4, respectively.
[0022] The constant current circuit module 2 includes a first multi-channel analog switch unit 21 and a constant current unit 22. The control terminal of the first multi-channel analog switch unit 21 is connected to the output terminal of the signal isolation module 2, and the output terminal is connected to the input terminal of the constant current unit 22.
[0023] In this way, the multi-level automatic calibration constant current source circuit, through the coordinated setup of signal isolation module 1, constant current circuit module 2, calibration circuit module 3, and clamping circuit module 4, allows the FPGA module 5 to directly output control signals. These signals are then controlled by signal isolation module 1 to control the first multi-channel analog switch unit 21 and constant current unit 22 in constant current circuit module 2, achieving constant current output at different levels. This reduces the process of converting serial data to parallel control signals and the associated circuit modules, effectively lowering hardware and development costs. Furthermore, the calibration circuit module 3 enables automatic calibration of the circuit.
[0024] In one embodiment, the signal isolation module 1 includes a digital isolation unit 11, which is used to effectively isolate the FPGA module 5 and the constant current circuit module 2.
[0025] The control signal is isolated using a digital isolation unit 11. The digital isolation unit 11 is a high-performance multi-channel digital isolator with accurate timing characteristics and low power loss. When isolating CMOS digital I / O, it can provide high electromagnetic immunity and low radiation. The device has high insulation capability, which helps to prevent noise and surges on the data bus or other circuits from entering the local ground terminal, thereby interfering with or damaging sensitive circuits. It plays a role in protecting FPGA module 5 and achieves effective isolation between FPGA module 5 and constant current circuit module 2.
[0026] In one embodiment, the first multi-channel analog switch unit 21 includes a first multi-channel analog switch subunit 211, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, and an eleventh resistor R11. One end of the eighth resistor R8, the ninth resistor R9, the tenth resistor R10, and the eleventh resistor R11 is connected to the VCC terminal, and the other end is connected to the input terminal of the first multi-channel analog switch subunit 211.
[0027] One end of the eighth resistor R8 is connected to the VCC terminal, and the other end is connected to the 1Y0 and 2Y0 pins of the first multi-channel analog switch subunit 211. One end of the ninth resistor R9 is connected to the VCC terminal, and the other end is connected to the 1Y1 and 2Y1 pins of the first multi-channel analog switch subunit 211. One end of the tenth resistor R10 is connected to the VCC terminal, and the other end is connected to the 1Y2 and 2Y2 pins of the first multi-channel analog switch subunit 211. One end of the eleventh resistor R11 is connected to the VCC terminal, and the other end is connected to the 1Y3 and 2Y3 pins of the first multi-channel analog switch subunit 211.
[0028] Thus, the B# pin of the first multi-channel analog switch subunit 211 is used as the chip enable pin. Here, the FPGA module 5 needs to control whether the first multi-channel analog switch subunit 211 is working. Pins S0 and S1 are channel selection pins, used to select pins 1Y0, 1Y1, 1Y2, 1Y3 and 1Z to be connected, and pins 2Y0, 2Y1, 2Y2, 2Y3 and 2Z to be connected. In this embodiment, two channels are connected simultaneously. The connection of different channels determines the different resistances in the current loop. Since the voltage at the second terminal of the first switch unit Q4 is fixed, that is, the voltage drop across the resistors of all channels (eighth resistor R8, ninth resistor R9, tenth resistor R10, eleventh resistor R11) is fixed, the current of each channel is different and fixed, thereby achieving multi-level constant current output.
[0029] In one embodiment, the constant current unit 22 includes a first operational amplifier U1B, a first switching unit Q4, a seventh resistor R7, a twelfth resistor R12, a thirteenth resistor R13, a fourteenth resistor R14, a fifteenth resistor R15, a second capacitor C2, and a second Zener diode V2. One end of the seventh resistor R7 is connected to the VCC terminal, and the other end is connected to one end of the twelfth resistor R12. The other end of the twelfth resistor R12 is connected to one end of the thirteenth resistor R13 and the positive input terminal of the first operational amplifier U1B. The negative terminal of the second Zener diode V2 is connected to one end of the seventh resistor R7, and the positive terminal is connected to the positive input terminal of the first operational amplifier U1B. One end of the fifteenth resistor R15 is connected to the seventh resistor R7 and... The common connection point of the twelfth resistor R12 is connected, and the other end is connected to the second end of the first switching unit Q4. The first output terminal of the first multi-channel analog switch subunit 211 is connected to the second end of the first switching unit Q4. One end of the fourteenth resistor R14 is connected to the second output terminal of the first multi-channel analog switch subunit 211 and the inverting input terminal of the first operational amplifier U1B, and the other end is connected to the second end of the first switching unit Q4. The output terminal of the first operational amplifier U1B is connected to the third end of the first switching unit Q4. The first end of the first switching unit Q4 is connected to the control terminal of the calibration circuit module 3 and the input terminal of the clamping circuit module 4, respectively. The second capacitor C2 is connected in parallel with the fourteenth resistor R14.
[0030] The first switching unit Q4 is a P-MOS transistor. The constant current unit 22 uses a second Zener diode V2 and a thirteenth resistor R13 connected in series between the power supply VCC and ground. This stabilizes the positive input of the first operational amplifier U1B at a fixed voltage VCCA0. Simultaneously, the first operational amplifier U1B is connected to the inverting input through the fourteenth resistor R14, forming a voltage follower. This ensures that the voltage across the fourteenth resistor R14 is stable at VCCA0. R7 and R12 are connected in series between the power supply and VCCA0. By setting the resistance value, a stable voltage VCCA1 can be obtained between the seventh resistor R7 and the twelfth resistor R12 according to the voltage divider principle. Through the above circuit settings, the voltage drop across the fifteenth resistor R15 is fixed, resulting in a fixed current output. When the subsequent test resistor increases, the voltage at the second terminal of the first switching unit Q4 also increases, leading to an increase in the negative input voltage of the first operational amplifier U1B and a decrease in the output voltage of the first operational amplifier U1B. This means that the voltage of the first switching unit Q4 decreases. According to the conduction characteristics of the P-channel MOSFET, the conductivity is enhanced, the current increases, and a constant current effect is achieved. Conversely, when the test resistor in the subsequent stage decreases, the conductivity of the first switching unit Q4 weakens, while still ensuring constant current output.
[0031] In one embodiment, the calibration circuit module 3 includes a second multi-channel analog switch unit 31, a fourth resistor R4 and a first capacitor C1. One end of the fourth resistor R4 is connected to the first output terminal of the second multi-channel analog switch unit 31 and the other end is connected to ground. One end of the first capacitor C1 is connected to the fourth output terminal of the second multi-channel analog switch unit 31 and the other end is connected to ground.
[0032] The INH pin of the second multi-channel analog switch unit 31 is used as the chip's enable pin; it is directly pulled down, meaning it operates immediately upon power-up. The S0 and S1 pins are channel selection pins, used to select pins 1Y0, 1Y1, 1Y2, 1Y3, and 1Z for connection. After power-up, the FPGA module 5 initiates calibration. By combining the S0 and S1 pins, it selects pins 1Y0 and 1Z for connection, thus connecting the fourth resistor R4 into the constant current circuit. Since the fourth resistor R4 is a fixed value and the current is also fixed, the voltage across it is also a fixed value. The second multi-channel analog switch unit 31 is connected to a sampling module. This module samples the current value entering from pin 1Z of the calibration circuit module 3, converts it into a reference voltage value, and sends it to the FPGA module 5. The FPGA module 5 compares the reference voltage value with the preset voltage value; if there is a difference, it compensates for it, thus achieving calibration for subsequent testing. Even if a specific channel's resistor outputs a current that requires compensation, subsequent measurements will be compensated according to preset rules to ensure measurement accuracy.
[0033] In one embodiment, the clamping circuit module 4 includes a second operational amplifier U2, a second switching unit Q3, a fifth resistor R5, and a sixth resistor R6. One end of the fifth resistor R5 is connected to the VCC terminal, and the other end is connected to one end of the sixth resistor R6. The other end of the sixth resistor R6 is connected to ground. The inverting input terminal of the second operational amplifier U2 is connected to the output terminal, and the non-inverting input terminal is connected to the common connection point between the fifth resistor R5 and the sixth resistor R6. The output terminal of the second operational amplifier U2 is connected to the third terminal of the second switching unit Q3. The first terminal of the second switching unit Q3 is connected to the first terminal of the first switching unit Q4, and the second terminal of the second switching unit Q3 is connected to the constant current output terminal.
[0034] The second switching unit Q3 is a P-MOS transistor. The output terminal of the second operational amplifier U2 is shorted to the inverting input terminal to achieve voltage follower function, that is, the output voltage is equal to the input voltage at the non-inverting input terminal. Through the voltage divider in series by the fifth resistor R5 and the sixth resistor R6, the holding input voltage at the non-inverting input terminal of the second operational amplifier U2 can be obtained as VCCB0, thus the output voltage of the second operational amplifier U2 is a fixed voltage VCCB0. Since the drain and source of the second switching unit Q3 are both connected to the constant current output circuit, and the gate is connected to the output terminal of the second operational amplifier U2, this connection is similar to connecting a diode in series between the second operational amplifier U2 and the constant current circuit to achieve the clamping function of the constant current circuit voltage at VCCB1 (VCCB1 = VCCB0 + PN junction voltage drop of U2).
[0035] In one embodiment, the multi-level automatic calibration constant current source circuit further includes a circuit protection module 6. The circuit protection module 6 includes a third operational amplifier U1A, a first control unit Q1, a second control unit Q2, a first Zener diode V1, a first resistor R1, a second resistor R2, and a third resistor R3. The inverting input terminal of the third operational amplifier U1A is connected to its output terminal, and the non-inverting input terminal is connected to one end of the first resistor R1. The other end of the first resistor R1 is connected to the first end of the second control unit Q2. The second end of the second control unit Q2 is connected to one end of the second resistor R2 and the negative terminal of the first Zener diode V1. The positive terminal of the first Zener diode V1 is connected to ground. The other end of the second resistor R2 is connected to the inverting input terminal of the third operational amplifier U1A. The third end of the second control unit Q2 is connected to the second end of the first control unit Q1. The first and third ends of the first control unit Q2 are connected to the negative terminal of the first Zener diode V1. One end of the third resistor R3 is connected to the constant current output terminal, and the other end is connected to the second end of the second switching unit Q2.
[0036] The first control unit Q1 is a PNP transistor, and the second control unit Q2 is an NPN transistor.
[0037] The output of the third operational amplifier U1A is shorted to its inverting input, enabling voltage following; that is, the output voltage of the third operational amplifier U1A equals the input voltage at its non-inverting input. The first Zener diode V1 is a Zener diode. When static electricity or overvoltage occurs in the constant current circuit, because the output of the third operational amplifier U1A is equal to the input voltage at its inverting input and is much greater than the Zener diode V1's regulated voltage, the first Zener diode V1 is reverse-biased and conducts. Its voltage to ground is equal to the Zener diode V1's regulated voltage. The cathode of the first Zener diode V1 is connected to the emitter of the second control unit Q2. At this time, the emitter voltage of the second control unit Q2 is also equal to the Zener diode V1's regulated voltage. Since the base-collector voltage of the second control unit Q2 is much greater than the Zener diode V1's regulated voltage, the transistor conduction condition is met, causing the second control unit Q2 to conduct. Current flows directly to ground through the second control unit Q2 and the first Zener diode V1, effectively shorting other circuits and protecting the preceding circuit, thus protecting the entire circuit. When the test equipment is mistakenly reversed, the first control unit Q1 is turned on, and the current will directly pass through the first Zener diode V1 and the first control unit Q1 to the ground, forming a complete circuit. This is equivalent to short-circuiting other circuits in the circuit, thus protecting the entire circuit.
[0038] The working principle of this application is as follows: the FPGA module directly outputs control signals to adjust the different channels of the first multi-channel analog switch subunit 211 of the constant current circuit module 2 to be turned on, and then the constant current unit 22 outputs different current values for the test resistor. The output current value is fed back to the calibration circuit module 3, and the module samples the current value and converts it into a reference voltage value and sends it to the FPGA module 5. The FPGA module 5 compares the reference voltage value with the preset voltage value. If there is a difference, compensation is performed, thereby achieving the calibration function so that it can be used in subsequent resistor testing.
[0039] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0040] The embodiments described above are merely illustrative of several implementations of this utility model, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the utility model patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this utility model, and these all fall within the protection scope of this utility model. Therefore, the protection scope of this utility model patent should be determined by the appended claims.
Claims
1. A multi-level automatic calibration constant current source circuit, characterized in that: It includes a signal isolation module, a constant current circuit module, a calibration circuit module, and a clamping circuit module. The input terminal of the signal isolation module is connected to the signal output terminal of the FPGA module, and the output terminal of the signal isolation module is connected to the control terminals of the constant current circuit module and the calibration circuit module, respectively. The output terminal of the constant current circuit module is connected to the input terminal of the calibration circuit module and the input terminal of the clamping circuit module, respectively. The constant current circuit module includes a first multi-channel analog switch unit and a constant current unit. The control terminal of the first multi-channel analog switch unit is connected to the output terminal of the signal isolation module, and the output terminal is connected to the input terminal of the constant current unit.
2. The multi-level automatic calibration constant current source circuit according to claim 1, characterized in that: The signal isolation module includes a digital isolation unit, which is used to effectively isolate the FPGA module and the constant current circuit module.
3. The multi-level automatic calibration constant current source circuit according to claim 1, characterized in that: The first multi-channel analog switch unit includes a first multi-channel analog switch subunit, an eighth resistor, a ninth resistor, a tenth resistor, and an eleventh resistor. One end of the eighth resistor, the ninth resistor, the tenth resistor, and the eleventh resistor are connected to the VCC terminal, and the other end is connected to the input terminal of the first multi-channel analog switch subunit.
4. The multi-level automatic calibration constant current source circuit according to claim 3, characterized in that: The constant current unit includes a first operational amplifier, a first switching unit, a seventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a second capacitor, and a second Zener diode. One end of the seventh resistor is connected to the VCC terminal, and the other end is connected to one end of the twelfth resistor. The other end of the twelfth resistor is connected to one end of the thirteenth resistor and the positive input terminal of the first operational amplifier. The negative terminal of the second Zener diode is connected to one end of the seventh resistor, and the positive terminal is connected to the positive input terminal of the first operational amplifier. One end of the fifteenth resistor is connected to the common connection point between the seventh and twelfth resistors. One end of the first capacitor is connected to the second end of the first switch unit, and the first output terminal of the first multi-channel analog switch subunit is connected to the second end of the first switch unit. One end of the fourteenth resistor is connected to the second output terminal of the first multi-channel analog switch subunit and the inverting input terminal of the first operational amplifier, and the other end is connected to the second end of the first switch unit. The output terminal of the first operational amplifier is connected to the third end of the first switch unit. The first end of the first switch unit is connected to the control terminal of the calibration circuit module and the input terminal of the clamping circuit module, and the second capacitor is connected in parallel with the fourteenth resistor.
5. The multi-level automatic calibration constant current source circuit according to claim 4, characterized in that: The first switching unit is a P-MOS transistor.
6. The multi-level automatic calibration constant current source circuit according to claim 1, characterized in that: The calibration circuit module includes a second multi-channel analog switch unit, a fourth resistor, and a first capacitor. One end of the fourth resistor is connected to the first output terminal of the second multi-channel analog switch unit, and the other end is connected to ground. One end of the first capacitor is connected to the fourth output terminal of the second multi-channel analog switch unit, and the other end is connected to ground.
7. The multi-level automatic calibration constant current source circuit according to claim 4, characterized in that: The clamping circuit module includes a second operational amplifier, a second switching unit, a fifth resistor, and a sixth resistor. One end of the fifth resistor is connected to the VCC terminal, and the other end is connected to one end of the sixth resistor. The other end of the sixth resistor is connected to ground. The inverting input terminal of the second operational amplifier is connected to its output terminal, and the non-inverting input terminal is connected to the common connection point between the fifth and sixth resistors. The output terminal of the second operational amplifier is connected to the third terminal of the second switching unit. The first terminal of the second switching unit is connected to the first terminal of the first switching unit, and the second terminal of the second switching unit is connected to the constant current output terminal.
8. The multi-level automatic calibration constant current source circuit according to claim 7, characterized in that: The second switching unit is a P-MOS transistor.
9. The multi-level automatic calibration constant current source circuit according to claim 7, characterized in that: The multi-level automatic calibration constant current source circuit also includes a circuit protection module. The circuit protection module includes a third operational amplifier, a first control unit, a second control unit, a first Zener diode, a first resistor, a second resistor, and a third resistor. The inverting input terminal of the third operational amplifier is connected to its output terminal, and the non-inverting input terminal is connected to one end of the first resistor. The other end of the first resistor is connected to the first end of the second control unit. The second end of the second control unit is connected to one end of the second resistor and the negative terminal of the first Zener diode. The positive terminal of the first Zener diode is connected to ground. The other end of the second resistor is connected to the inverting input terminal of the third operational amplifier. The third end of the second control unit is connected to the second end of the first control unit. The first and third ends of the first control unit are connected to the negative terminal of the first Zener diode. One end of the third resistor is connected to the constant current output terminal, and the other end is connected to the second end of the second switching unit.
10. The multi-level automatic calibration constant current source circuit according to claim 9, characterized in that: The first control unit is a PNP transistor, and the second control unit is an NPN transistor.