Fault arc signal detection circuit
By using zero-sequence current transformers and parallel resonant circuits combined with high-frequency filtering and phase-locked loop circuits to process fault arc signals, the problems of large microcontroller resource consumption and high cost in existing technologies are solved, and accurate detection of fault arc signals and low power consumption design are achieved.
Patent Information
- Application Number
- CN202423034277.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-10
- Publication Date
- 2025-11-18
- Estimated Expiration
- 2034-12-10
AI Technical Summary
Existing fault arc signal detection circuits consume a large amount of microcontroller resources, resulting in high product costs and increased power consumption, and making it difficult to accurately determine fault arc signals.
A zero-sequence current transformer and a parallel resonant circuit are used to collect fault arc signals. High-frequency filtering and phase-locked loop circuits are used for signal processing, which simplifies the signal transmission path, reduces interference, and reduces the burden on the microcontroller.
It effectively avoids line crosstalk, reduces microcontroller power consumption, simplifies peripheral circuits, reduces costs, and facilitates large-scale production and application.
Smart Images
Figure CN223565819U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to the technical field of fault arc detection, especially to a fault arc signal detection circuit. BACKGROUND
[0002] At present, the fault arc signal is taken by a current transformer on the L line on the domestic market.
[0003] The signal is processed by an amplifier and then transmitted to the ADC port of a single-chip microcomputer, and the MCU performs data processing to read and judge the accuracy of fault arc information. Figure 2
[0004] The signal is directly transmitted to an active frequency selection circuit and then to a single-chip microcomputer for data operation and processing to read and judge the accuracy of fault arc information. Figure 3
[0005] The above two fault arc signal processing circuits have the following defects:
[0006] Since they all take signals from the L line, there are many types of electrical equipment on the main circuit, and the current signals generated by the L line are also diverse, especially for switching power supply equipment.
[0007] In order to distinguish signals similar to fault arc signals, a large amount of database needs to be built in the single-chip microcomputer for operation and comparison. The use of single-chip microcomputer resources is occupied, and the oscillation frequency of the single-chip microcomputer needs to be increased to improve the operation speed, which increases the power consumption of the single-chip microcomputer, the power consumption of the machine body, and the temperature rise, causing the service life of the single-chip microcomputer to be affected and even causing the product to be affected by the performance of the product.Due to the variety of electrical equipment used in the circuit, the complexity of the load current signal frequency of the circuit, and the unpredictable problems of the software engineer building a fault arc data model, the product cost is high and cannot be widely promoted in the market.In summary, the above problems are caused by the sampling of the fault arc signal and the fault arc signal circuit, which needs to be corrected.
[0008] Therefore, the utility model aims to provide a fault arc signal detection circuit to solve the problem of large single-chip microcomputer resource occupation and high product cost.
[0009] Based on the above purpose, the utility model provides a kind of fault arc signal detection circuit, including phase-locked loop circuit, still including:
[0010] Fault arc signal acquisition circuit, including the parallel resonance circuit of zero sequence mutual inductor and capacitor, for selecting and outputting the fault arc signal of protected line;
[0011] High-frequency filter signal amplification circuit, including high pass filter, signal amplification circuit and high pass filter circuit, the high pass filter is used to filter the fault arc signal output by the fault arc acquisition circuit, the signal amplification circuit is used to amplify the signal after the high pass filter filtering, the high pass filter circuit is used to eliminate the useless interference signal after amplification, and output the signal of specific stable waveform;
[0012] The signal output by the high-frequency filter signal amplification circuit is output to the single-chip microcomputer ADC sampling pin in one way, and is input to the phase-locked loop circuit in one way, the phase-locked loop circuit is further connected with two groups of low pass filters to form a bandwidth frequency band, for purifying the stable signal again;
[0013] The fault arc signal detection circuit further includes a resistance voltage divider, which is used to monitor the waveform generated by the alternating voltage when the fault arc occurs, and input the single-chip microcomputer ADC sampling pin.
[0014] Preferably, the phase-locked loop circuit is further connected with a source signal follower, and the source signal follower includes an N-channel field effect transistor Q1, resistors R18, R19 and R20, the control electrode of the field effect transistor Q1 is connected to the PWM port of the single-chip microcomputer through the resistors R19 and R20, the source electrode of the field effect transistor Q1 is connected to the signal input pin (6 pin) of the phase-locked loop through the common end of the resistor R18, and the drain electrode of the field effect transistor Q1 is connected to the voltage output pin (5 pin) of the phase-locked loop through the other end of the resistor R11.
[0015] Preferably, the high pass filter includes a capacitor C2, a resistor R1 and a resistor R2.
[0016] Preferably, the signal amplification circuit includes an amplifier chip U1.
[0017] Preferably, the high pass filter circuit includes a capacitor C3 and a resistor R5.
[0018] Preferably, the signal output by the high-frequency filter signal amplification circuit is first output to a voltage divider including a resistor R6, a resistor R7 and a resistor R8, and then input to the single-chip microcomputer ADC sampling pin.
[0019] Preferably, the two groups of low-pass filters include a first group of low-pass filters composed of resistor R10 and capacitor C5 connected to the output filter pin of the phase-locked loop circuit, and a second group of low-pass filters composed of resistor R9 and capacitor C4 connected to the loop filter pin of the phase-locked loop circuit, and the two groups of low-pass filters are connected in parallel to form a bandwidth range communicated by the phase-locked loop circuit.
[0020] Preferably, the resistance voltage divider includes resistor R12, resistor R13, resistor R14, resistor R15 and resistor R16.
[0021] The beneficial effects of the utility model are as follows:
[0022] 1. The zero sequence transformer sampling of the fault arc signal can well avoid the line crosstalk problem.
[0023] 2. The utility model adopts sensing self-resonance frequency selection, high-frequency filter signal amplification, phase loop fixed frequency band and fault arc frequency screening and re-transmission into the MCU chip for operation and processing, which simplifies the chip workload and reduces the power consumption of the chip.
[0024] 3. The peripheral circuit is simplified, the cost is reduced, and the utility model is convenient for popularization and use by the general public. BRIEF DESCRIPTION OF DRAWINGS
[0025] In order to more clearly illustrate the technical scheme in the utility model or the prior art, the following will briefly introduce the drawings needed to be used in the embodiment or the prior art description, and obviously, the drawings in the following description are only the utility model, and for those skilled in the art, other drawings can also be obtained according to these drawings without creative labor.
[0026] Figure 1 It is a fault arc signal detection circuit structure schematic diagram of the utility model embodiment.
[0027] Figure 2 It is a passive signal processing mode schematic diagram in the prior art.
[0028] Figure 3 It is an active signal processing mode schematic diagram in the prior art. DETAILED DESCRIPTION
[0029] In order to make the purpose, technical scheme and advantages of the utility model more clearly, the following will be further described in detail by combining with specific embodiments.
[0030] It should be noted that, unless otherwise defined, technical or scientific terms used in the present application should be understood as their common meanings to those skilled in the art to which the present application belongs. The terms "first", "second" and similar words used in the present application do not represent any order, quantity or importance, but are only used to distinguish different components. The terms "include" or "contain" and similar words mean that the elements or objects before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. The terms "connect" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to represent relative positional relationships, which may change accordingly when the absolute position of the described object changes.
[0031] As shown in Figure 1 The present application provides a fault arc signal detection circuit, which comprises a parallel resonant circuit composed of a zero sequence transformer and a capacitor, is used for selecting and outputting a fault arc signal of a protected line;
[0032] The high-frequency filtering signal amplification circuit comprises a high-pass filter, a signal amplification circuit and a high-pass filter circuit, the high-pass filter is used for filtering the fault arc signal output by the fault arc collection circuit, the signal amplification circuit is used for amplifying the signal filtered by the high-pass filter, and the high-pass filter circuit is used for eliminating useless interference signals of the amplified signal and outputting a signal with a specific stable waveform.
[0033] The signal output by the high-frequency filtering signal amplification circuit is output to an ADC sampling pin of a single-chip microcomputer in one way and is input to the phase-locked loop circuit in the other way, and the phase-locked loop circuit is further connected with a bandwidth band composed of two groups of low-pass filters, and is used for purifying the stable signal again.
[0034] The fault arc signal detection circuit further comprises a resistance voltage divider, and the resistance voltage divider is used for monitoring a waveform generated by an alternating voltage when a fault arc occurs and inputting an ADC sampling pin of a single-chip microcomputer.
[0035] Specifically, the technical implementation process of the present application comprises three parts: 1. voltage detection when a fault arc occurs; 2. intensity detection of a fault arc signal; and 3. signal processing of the fault arc itself.
[0036] Firstly, the zero sequence transformer Z0 and the capacitor C1 form a parallel resonant circuit, and a fault arc signal of a protected line when a fault arc occurs is selected by the resonant circuit and then flows to the next processing circuit.
[0037] Capacitor C2 and resistor R1 and resistor R2 constitute a high-pass filter, filter out the useless line low-frequency useless signal, so the signal is weak, and then flows into the next processing circuit.
[0038] The signal gain is amplified by the amplifier chip U1 and the surrounding resistance, and the flow direction is to the next processing circuit.
[0039] A high-pass filter circuit is formed by capacitor C3 and resistor R5 to filter out unwanted interference signals for the next stable waveform.
[0040] The signal flows in two directions: a. One way through the voltage divider composed of resistors R6, R7, and R8 to transmit the signal to the single-chip ADC sampling pin, which calculates the voltage amplitude proportional to the arc intensity to determine the fault arc strength and provide the criterion for the single-chip control switch to control the delay size.
[0041] b. Let one way into the phase-locked loop circuit, which is composed of two sets of low-pass filters by resistor R10 and capacitor C5 of the phase-locked loop chip and resistor R9 and capacitor C4, to further purify the stable signal.
[0042] The resistor divider composed of resistors R12, R13, R14, R15, and R16 is used to monitor the waveform generated by the faulty arc when the AC voltage occurs. The single-chip ADC collects data to assist in judging the faulty arc.
[0043] The source signal follower is composed of the 5th pin (output voltage pin) and the 6th pin (timing input pin) of the phase-locked loop U2, resistor R11, and field effect transistor Q1, resistors R18, R19, and R20. When the single-chip fault arc model data waveform is input to the phase-locked loop through the source signal follower, it is compared with the fault arc waveform. When the input waveform is consistent, the 8th pin of the phase-locked loop will output the same waveform as the 6th pin input. The single-chip can easily perform arithmetic processing, improving the accuracy of fault arc protection judgment.
[0044] Three different loads are collected in the single-chip, namely: resistive load (resistor type), inductive load (inductor type), and capacitive load (capacitor type), whose fault arc waveform corresponds to the frequency. From this, the PWM data model is established. When the line has a fault arc, the single-chip ADC port 2 judges the signal to start the single-chip work, and the single-chip ADC3 port ADC1 starts sampling work at the same time to further confirm the characteristics of the fault arc. When the single-chip is in fault arc, the single-chip implements other control.
[0045] The utility model discloses circuit's component can adopt integrated mode, that is, the amplifier core chip and the phase-locked loop integration simplification peripheral circuit arc module DSP mode, can also be integrated processing of three, that is, the amplifier, the phase-locked loop and the single-chip microcomputer MCU integration, make into the arc chip of fault arc signal monitoring and output control whole body, there is under the condition of arc chip MCU, can cancel the 6 feet and the 5 feet of the phase-locked loop peripheral electronic component (resistor R11, capacitor C7, thyristor Q1), and the phase-locked loop internal frequency comparison reference is directly provided by single-chip microcomputer MCU.
[0046] The scheme collects three different loads of the line in the single-chip microcomputer, namely: resistive load (resistor type), inductive load (inductor type) and capacitive load (capacitor type), and the frequency corresponding to the fault arc waveform of the three different loads. A data model of PWM is established. When the line has a fault arc, the ADC port 2 of the single-chip microcomputer judges the signal to start the work of the single-chip microcomputer, and the ADC port 3 and ADC1 of the single-chip microcomputer start sampling work at the same time to further confirm the characteristics of the fault arc. When the fault arc occurs, the single-chip microcomputer implements other control.
[0047] The circuit is simple and clear, and saves many electronic components compared with the previous scheme. The phase-locked loop is used to obtain the fault arc signal, and the detection stability and convenience of the fault arc are improved compared with the previous scheme. The zero sequence is used to obtain the fault arc signal, which can well avoid the main line interference signal and reduce the workload of the single-chip microcomputer for establishing a data model to avoid the signal. Since the utility model technology is stable and low in cost, it is convenient for mass production. The use benefits thousands of families and provides protection for the personal safety of the people, and meets the requirements of safety and low energy consumption proposed by the national power grid.
[0048] The utility model aims at the design of the circuit structure, and the single-chip microcomputer belongs to external components, and the detection and data processing process can be implemented by combining the prior art known by those skilled in the art, and the processing part of the single-chip microcomputer does not affect the implementation of the circuit scheme of the application.
[0049] Those skilled in the art should understand that the discussion of the above any embodiment is only exemplary, and is not intended to indicate that the scope (including claims) of the utility model is limited to these examples; under the idea of the utility model, the above embodiments or technical features in different embodiments can also be combined, the steps can be implemented in any order, and there are many other changes of different aspects of the utility model as described above, and they are not provided in details for the sake of brevity.
[0050] The present application is intended to cover all such alternatives, modifications, and variations that fall within the broad scope of the appended claims. Accordingly, any and all such alternations, modifications, equivalents, improvements and the like are intended to be encompassed by the present application.
Claims
1. A fault arc signal detection circuit, characterized in that, Including phase-locked loop circuits, and also: The fault arc signal acquisition circuit includes a parallel resonant circuit composed of a zero-sequence current transformer and a capacitor, which is used to select and output the fault arc signal of the protected line. A high-frequency filtered signal amplification circuit includes a high-pass filter, a signal amplification circuit, and a high-pass filter circuit. The high-pass filter is used to filter the fault arc signal output by the fault arc acquisition circuit. The signal amplification circuit is used to amplify the signal filtered by the high-pass filter. The high-pass filter circuit is used to eliminate useless interference signals from the amplified signal and output a signal with a specific stable waveform. The signal output from the high-frequency filtering signal amplification circuit is output to the ADC sampling pin of the microcontroller on one side and input to the phase-locked loop circuit on the other side. The phase-locked loop circuit is also connected to a bandwidth band composed of two sets of low-pass filters for further purification and stabilization of the signal. The fault arc signal detection circuit also includes a resistor voltage divider, which is used to monitor the waveform of AC voltage generated when a fault arc occurs and input it to the ADC sampling pin of the microcontroller.
2. The fault arc signal detection circuit according to claim 1, characterized in that, The phase-locked loop circuit is also connected to a source signal follower, which includes an N-channel MOSFET Q1, resistors R18, R19, and R20. The control terminal of the MOSFET Q1 and resistors R19 and R20 are connected to the PWM port of the microcontroller. The source terminal of the MOSFET Q1 and the common terminal of resistor R18 are connected to the signal input pin of the phase-locked loop circuit. The drain terminal of the MOSFET Q1 and the other end of resistor R11 are connected to the voltage output pin of the phase-locked loop circuit.
3. The fault arc signal detection circuit according to claim 1, characterized in that, The high-pass filter includes capacitor C2 and resistors R1 and R2.
4. The fault arc signal detection circuit according to claim 1, characterized in that, The signal amplification circuit includes an amplifier chip U1.
5. The fault arc signal detection circuit according to claim 1, characterized in that, The high-pass filter circuit includes capacitor C3 and resistor R5.
6. The fault arc signal detection circuit according to claim 1, characterized in that, The signal output from the high-frequency filtered signal amplification circuit is first output to a voltage divider consisting of resistors R6, R7, and R8, and then input to the ADC sampling pin of the microcontroller.
7. The fault arc signal detection circuit according to claim 1, characterized in that, The two sets of low-pass filters include a first set of low-pass filters consisting of a resistor R10 and a capacitor C5 connected to the output filter pin of the phase-locked loop circuit, and a second set of low-pass filters consisting of a resistor R9 and a capacitor C4 connected to the loop filter pin of the phase-locked loop circuit. The two sets of low-pass filters are connected in parallel and connected by the phase-locked loop circuit to form a bandwidth frequency band.
8. The fault arc signal detection circuit according to claim 1, characterized in that, The resistor voltage divider includes resistors R12, R13, R14, R15, and R16.