Band gap circuit

Abstract

A bandgap circuit includes: a first resistor receiving a voltage proportional to a temperature; a second resistor receiving a voltage complementary to the absolute temperature; and a third resistor, wherein the sum of the currents in the first resistor and the second resistor flows through the third resistor. Each of the second resistor and the third resistor includes a fixed resistance portion and N controllable resistance portions, where N is greater than or equal to 2. Each controllable resistance portion of the second resistor is associated with a corresponding controllable resistance portion of the third resistor. For each controllable resistance portion, the control circuit supplies the same control signal to that controllable resistance portion and its associated controllable resistance portion.

Description

[0001] CLAIM OF PRIORITY

[0002] This application claims the priority benefit of French Patent Application No. 2312506, filed November 15, 2023, the contents of which are hereby incorporated by reference in their entirety to the maximum extent permitted by law. TECHNICAL FIELD

[0003] The present disclosure relates generally to electronic circuits, and more particularly to bandgap circuits configured to deliver a temperature stable voltage. BACKGROUND

[0004] Many known electronic devices include bandgap circuits configured to generate a temperature stable voltage.

[0005] Known bandgap circuits are configured to generate a first voltage equal to or proportional to the difference between the base-emitter voltage of a first bipolar transistor and the base-emitter voltage of a second bipolar transistor n times larger than the first bipolar transistor. This first voltage is then proportional to absolute temperature (PTAT). These known circuits are also configured to generate a second voltage equal to or proportional to the base-emitter voltage of a bipolar transistor, which can or can not be one of the first and second bipolar transistors. This second voltage is then complementary to absolute temperature (CTAT) type. A third voltage is then generated from the first and second voltages, and the size of these known circuits is determined so that the third voltage has a value independent of temperature.

[0006] However, known bandgap circuits have various drawbacks.

[0007] There is a need to overcome all or part of the drawbacks of known bandgap circuits of the type described above. SUMMARY

[0008] Embodiments provide a bandgap circuit comprising: a first resistor configured to receive a voltage proportional to absolute temperature across its terminals; a second resistor configured to receive a voltage complementary to absolute temperature across its terminals; a third resistor, a current through the third resistor being equal to a sum of a current through the first resistor and a current through the second resistor; and a control circuit. Each of the second and third resistors comprises a fixed part and N controllable parts, where N is an integer greater than or equal to 2. Each controllable part is equal to a set value of said controllable part multiplied by an integer determined by a control signal of said controllable part. Each of the N controllable parts of the second resistor is associated with a corresponding controllable part of the third resistor. The control circuit is configured to supply, for each controllable part, the same control signal to that controllable part and to the controllable part associated therewith. The set value of at least one controllable part is different from the set value of the controllable part associated therewith.

[0009] According to an embodiment: the pair of the controllable portion of the third resistor and the associated controllable portion of the second resistor verifies one of the following relationships: the set value of the controllable portion of the third resistor is equal to the set value of the associated controllable portion of the second resistor multiplied by Gain; the set value of the controllable portion of the second resistor is null; and the set value of the controllable portion of the third resistor is equal to the set value of the associated controllable portion of the second resistor multiplied by Gain*Vbe(Tr) / EG, where Gain is equal to the ratio of the resistance value of the fixed portion of the third resistor to the resistance value of the fixed portion of the second resistor, Vbe(Tr) is the value of the voltage complementary to the absolute temperature taken at a temperature Tr, Tr being for example a reference temperature equal to 300°K, and EG is a constant equal to 1.181 V.

[0010] According to an embodiment: another pair of the controllable portion of the third resistor and the associated controllable portion of the second resistor verifies another one of the relationships.

[0011] According to an embodiment: N is greater than or equal to 3; and still another pair of the controllable portion of the third resistor and the associated controllable portion of the second resistor verifies still another one of the relationships.

[0012] According to an embodiment, the fixed portions of the second and third resistors have the same resistance value.

[0013] According to an embodiment, the resistance value of the fixed portion of the second resistor is equal to the resistance value of the first resistor multiplied by (EG-Vbe(Tr)) / (Utr*ln(n)), where: EG is a constant equal to 1.181 V; Vbe(Tr) is the value of the voltage complementary to the absolute temperature taken at a reference temperature Tr, for example equal to 300°K; Utr is equal to (k*Tr) / q, where k is the Boltzmann constant and q is the elementary charge; and n is a size ratio between two bipolar transistors configured so that the difference between the base-emitter voltages of these two transistors determines and is equal to a voltage proportional to the absolute temperature.

[0014] According to an embodiment: the bandgap circuit comprises two bipolar transistors of a first type, NPN and PNP, whose bases are connected to each other; an emitter of a first one of the two bipolar transistors is connected to a node for applying a reference potential, and its base and collector are coupled to each other, preferably connected to each other; a second one of the two bipolar transistors is n times larger than the first one of the two bipolar transistors, and its emitter is coupled to the node for applying the reference potential via a first resistor; the bandgap circuit comprises a third bipolar transistor of the first type, whose base and collector are coupled to each other through a buffer circuit; an emitter of the third bipolar transistor is connected to the node for applying the reference potential; and a base of the third bipolar transistor is coupled to the node for applying the reference potential via a second resistor.

[0015] According to an embodiment: the circuit comprises a first current mirror configured to supply a copy of the current flowing through the first resistor to a current summing node, and to bias the first one of the two bipolar transistors; the bandgap circuit comprises a second current mirror configured to provide a copy of the current flowing through the second resistor at the current summing node; and a third resistor couples the current summing node to the node for applying the reference potential.

[0016] According to an embodiment, an additional buffer circuit is connected to the current summing node, and is configured to provide an output voltage equal to the voltage across the third resistor.

[0017] According to an embodiment: the collectors of the two bipolar transistors are coupled to a node for applying a supply potential via the first current mirror; and the buffer circuit coupling the base and the collector of the third bipolar transistor couples the base of the third transistor to the second current mirror, which couples the buffer circuit to the node for applying the supply potential.

[0018] An embodiment provides a bandgap circuit, comprising: a first resistor configured to receive a voltage proportional to absolute temperature across its terminals; a second resistor configured to receive a voltage complementary to absolute temperature across its terminals; a third resistor, wherein a current flowing through the third resistor is equal to a sum of a current flowing through the first resistor and a current flowing through the second resistor; wherein the second resistor comprises a first fixed resistance portion, a first controllable resistance portion, and a second controllable resistance portion connected in series; wherein the third resistor comprises a second fixed resistance portion, a third controllable resistance portion, and a fourth controllable resistance portion connected in series; and a control circuit configured to generate: a first trimming signal applied to the first controllable resistance portion and the third controllable resistance portion; and a second trimming signal applied to the second controllable resistance portion and the fourth controllable resistance portion.

[0019] According to an embodiment, wherein each controllable resistance portion is equal to a product of a set value of said controllable resistance portion and an integer set by the trimming signal.

[0020] According to an embodiment, wherein the set value of the first controllable resistance portion is different from the set value of the third controllable resistance portion.

[0021] According to an embodiment, wherein the set value of the second controllable resistance portion is different from the set value of the fourth controllable resistance portion.

[0022] According to an embodiment, wherein the set value of the third controllable portion of the third resistor or the fourth controllable portion is equal to a Gain value times the set value of the associated first controllable portion or second controllable portion of the second resistor, respectively.

[0023] According to an embodiment, wherein the set value of the first controllable portion or second controllable portion of the second resistor is null.

[0024] According to an embodiment, wherein the first fixed resistance portion and the second fixed resistance portion of the second resistor and the third resistor have the same resistance value.

[0025] According to an embodiment, wherein the resistance value of the second fixed resistance portion of the second resistor is equal to a multiple of the resistance value of the first resistor.

[0026] According to an embodiment, the bandgap circuit further comprises: a first bipolar transistor; a second bipolar transistor; and a third bipolar transistor; wherein the bases of the first bipolar transistor and the second bipolar transistor are connected to each other and to the collector of the first bipolar transistor; wherein the first resistor is coupled in series between the emitter of the second bipolar transistor and a node for applying a reference potential; wherein the second resistor is connected between the base of the third bipolar transistor and the node for applying a reference potential.

[0027] According to an embodiment, the bandgap circuit further comprises: current mirror circuitry coupled to the first bipolar transistor, the second bipolar transistor and the third bipolar transistor and configured to mirror the current flowing through the first resistor and the second resistor to a current summing node for generating a current flowing through the third resistor. BRIEF DESCRIPTION OF DRAWINGS

[0028] The foregoing features and advantages, as well as others, will be described in more detail below with reference to the accompanying drawings, in which:

[0029] Figure 1 An example of a bandgap circuit is schematically illustrated;

[0030] Figure 2 Further details are illustrated Figure 1Examples of calibration or setting of circuits of the type of bandgap circuits shown in the middle;

[0031] Figure 3 Examples of calibration or setting of circuits of the type of bandgap circuits shown in the middle are schematically illustrated Figure 1 and Figure 2 Examples of calibration or setting of circuits of the type of bandgap circuits shown in the middle are schematically illustrated

[0032] Figure 4 Examples of calibration or setting of circuits of the type of bandgap circuits shown in the middle are schematically illustrated Figure 1 and Figure 2 Examples of calibration or setting of circuits of the type of bandgap circuits shown in the middle are schematically illustrated. DETAILED DESCRIPTION

[0033] Identical features in the various figures are denoted by identical reference numerals. In particular, structural and / or functional features common to the various embodiments can have identical reference numerals and can have identical structural, dimensional and material properties.

[0034] For the sake of clarity, only those steps and elements that are needed to understand the described embodiments are shown and described in detail.

[0035] Unless otherwise stated, when referring to two elements connected together, this means a direct connection without any intermediate elements other than a conductor, and when referring to two elements coupled together, this means that the two elements can be connected or they can be coupled via one or more other elements.

[0036] In the following description, when referring to absolute position qualifiers such as "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers such as "top", "bottom", "upper", "lower", etc., or orientation qualifiers such as "horizontal", "vertical", etc., unless otherwise stated, all refer to the orientation of the drawing.

[0037] Unless otherwise stated, the expressions "about", "approximately", "substantially" and "on the order of" mean positive or negative ten percent, preferably positive or negative five percent.

[0038] Figure 1 An example of a bandgap circuit 1 is schematically illustrated. More particularly, Figure 1 The principle of a bandgap circuit configured to deliver a temperature stable voltage Vout(T) is illustrated.

[0039] The circuit 1 comprises a resistor R1 across which a voltage Vptat(T) of the PTAT type is available. In other words, the circuit 1 is configured such that the voltage Vptat(T) is available between the terminals of the resistor R1. Thus, a current Iptat(T) flows through the resistor R1.

[0040] The circuit 1 comprises a resistor R2 across which a voltage Vbe(T) of CTAT type is obtainable. In other words, the circuit 1 is configured so that the voltage Vbe(T) is obtainable between the terminals of the resistor R2. Therefore, a current I veb(T) flows through the resistor R2.

[0041] Therefore, in the circuit 1:

[0042] and

[0043] Iptat(T) = Vptat(T) / R1 (Equation 2)

[0044] The circuit 1 further comprises a resistor R3 configured so that a current Icst(T) equal to the sum of the currents I veb(T) and Iptat(T) flows therethrough. A voltage Vout(T) is then obtainable across the resistor R3, and:

[0045]

[0046] As an example, the resistor R3 is connected between the node 100 receiving the currents I veb(T) and Iptat(T) and a node 102 configured to receive a supply potential, for example a low supply potential corresponding to a reference potential, for example ground GND.

[0047] As an example, to illustrate the operation of the circuit 1, Figure 1 In which the resistors R1 and R2 are shown connected in parallel between the node 100 and a node 104 configured to receive a supply potential, for example a high supply potential Vcc. This representation is purely functional and the resistors R1 and R2 are not necessarily connected as described above in practice.

[0048] As an example, the circuit 1 can comprise a circuit BUF, which is an analog buffer circuit. The circuit BUF is connected to the node 100 and is configured to deliver on the node 106 a voltage Voutb(T) equal to the voltage Vout(T) by isolating the nodes 100 and 106 from each other. The voltage Voutb(T) is then the output voltage of the circuit 1. As an alternative example, the circuit BUF is omitted and the voltage Vout(T) is then the output voltage of the circuit 1.

[0049] As an example, although Figure 1In this case, the circuit 1 comprises two bipolar transistors configured to deliver a voltage Vptat(T) based on the difference between the two base-emitter voltages of the two bipolar transistors or to deliver a Vptat(T) equal to the difference between the two base-emitter voltages of the two bipolar transistors. For example, the two transistors are of the same PNP or NPN type, receive the same collector current, and their bases are connected together. In addition, one of the two bipolar transistors is n times larger than the other, where n is a positive number greater than 1. In addition, the collector and the base of the smallest bipolar transistor of the two bipolar transistors are connected to each other.

[0050] In this case, the circuit 1 comprises two bipolar transistors configured to deliver a voltage Vptat(T) based on the difference between the two base-emitter voltages of the two bipolar transistors or to deliver a Vptat(T) equal to the difference between the two base-emitter voltages of the two bipolar transistors. For example, the two transistors are of the same PNP or NPN type, receive the same collector current, and their bases are connected together. In addition, one of the two bipolar transistors is n times larger than the other, where n is a positive number greater than 1. In addition, the collector and the base of the smallest bipolar transistor of the two bipolar transistors are connected to each other.

[0051] Vptat(T) = Ut * ln(n) (Equation 4)

[0052] where Ut = (k * T) / q, T is the temperature in Kelvin, k is the Boltzmann’s constant, and q is the elementary charge equal to 1.6 x 10 -19 Coulomb.

[0053] As an example, although Figure 1 In this case, the circuit 1 comprises a bipolar transistor configured to deliver a voltage Vbe(T) based on its base-emitter voltage or to deliver a voltage Vbe(T) equal to its base-emitter voltage. This bipolar transistor is, for example, one of the two bipolar transistors configured to generate the voltage Vptat(T) or the other bipolar transistor.

[0054] In this case, the circuit 1 comprises two bipolar transistors configured to deliver a voltage Vptat(T) based on the difference between the two base-emitter voltages of the two bipolar transistors or to deliver a Vptat(T) equal to the difference between the two base-emitter voltages of the two bipolar transistors. For example, the two transistors are of the same PNP or NPN type, receive the same collector current, and their bases are connected together. In addition, one of the two bipolar transistors is n times larger than the other, where n is a positive number greater than 1. In addition, the collector and the base of the smallest bipolar transistor of the two bipolar transistors are connected to each other.

[0055]

[0056] where Tr is a reference temperature equal to 300°K, EG is a constant equal to 1.181 V, and Vbe(Tr) is the base-emitter voltage value of the bipolar transistor at the temperature Tr.

[0057] Using Equation 4 and Equation 5 in Equation 3 gives the result:

[0058]

[0059] Assuming:

[0060] and

[0061]

[0062] Obtaining:

[0063]

[0064]

[0065] Thus, Vout(T) is the sum of a constant term Vout0 and a term Vslope(T) that varies with temperature, where:

[0066] And

[0067]

[0068] where this term is zero when the temperature T is equal to the reference temperature Tr.

[0069] The circuit 1 is configured so that the voltage Vout(T) is independent of the temperature T, and thus so that:

[0070]

[0071] In the case where the two resistors R2 and R3 are fixed (not adjustable) and correspond respectively to two resistance values R20 and R30, the equation 12 is valid if the following condition is met:

[0072]

[0073] The equation 13 can also be written as:

[0074] Or also as

[0075]

[0076] The resistor R2 is sized to have a fixed value R20 that satisfies the equation 13 above.

[0077] The voltage Vout(T) is then expected to be constant and independent of temperature, and:

[0078] where

[0079]

[0080] The value R30 is thus chosen so that R30 = Gain * R20, Gain being a factor determined by the target value of Vout(T).

[0081] Taking the equations 14 and 17, we obtain:

[0082]

[0083] Furthermore, using the equation 15, the equations 10 and 11 can be written as:

[0084] And

[0085]

[0086] Figure 2 An example of the bandgap circuit 1 is shown in more detail.

[0087] The circuit 1 comprises a resistor R1, a bipolar transistor T1 and a bipolar transistor T2, of the same type as the transistor T1, either NPN or PNP type, and n times larger than the transistor T1. The transistors T1 and T2 are configured to deliver a voltage Vptat(T) across the resistor R1, equal to the difference between its base-emitter voltage, and defined by equation 5. Then, a current Iptat(T) flows through the resistor R1.

[0088] For example, the transistors T1 and T2 are of the NPN type. For example, the base of the transistor T1 is coupled (e.g. connected) to its collector, and its emitter is connected to the node 102, the base of the transistor T2 is connected to the base of the transistor T1, and its emitter is coupled to the node 102 through the resistor R1. For example, the collectors of the two transistors T1 and T2 are coupled to the node 104 through MOS transistors M1 and M2, respectively, which in this example have a P channel, the transistors M1 and M2 being assembled as a current mirror. For example, the transistors M1 and M2 are identical.

[0089] The circuit 1 comprises a resistor R2 and a bipolar transistor T3, of the same type as the transistors T1 and T2, either NPN or PNP type. The transistor T3 is configured to deliver its base-emitter voltage Vbe(T), such as defined by the equation for Vbe(T), across the resistor R2. Then, a current Ivbe(T) flows through the resistor R2.

[0090] For example, the base of the transistor T3 is coupled to its collector through a buffer circuit, for example a MOS transistor M4, for example having an N channel in this example, assembled as a source follower. In addition, for example, the emitter of the transistor T3 is connected to the node 102, and its collector is coupled to this node through a MOS transistor M3, having a P channel in this example, the transistor M3 being assembled as a current mirror, for example with the transistors M1 and M2. In addition, the base of the transistor T3 is coupled to the node 104 via a MOS transistor M5, having a P channel in this example. For example, the drain of the transistor M5 is connected to the drain of the transistor M4.

[0091] The circuit 1 further comprises a node 100 and a resistor R3, connected between the node 100 and the node 102.

[0092] The circuit 1 comprises a current mirror configured to supply the node 100 with a current Iptat(T). For example, the current mirror comprises a transistor M2 and a MOS transistor M6 having a channel of the same type as the transistor M2, the transistor M6 being assembled with the transistor M2 into a current mirror. In other words, the transistors M1, M2 and M6 form a current mirror configured to bias the transistor T1 and to supply the node 100 with a copy of the current Iptat(T) flowing through the resistor R3.

[0093] The circuit 1 further comprises a current mirror configured to supply the node 100 with a current Ivbe(T), or, in other words, with a copy of the current Ie b(T) flowing through the resistor R2. For example, the current mirror comprises a transistor M5 and a MOS transistor M7 having a channel of the same type as the transistor M5, the transistor M7 being assembled with the transistor M5 into a current mirror.

[0094] Thus, the current Icst(T) flows through the resistor R3 and the voltage Vout(T) is available across the resistor R3.

[0095] In case the resistors R2 and R3 are fixed and have respective values R20 and R30, the value R20 is chosen to satisfy the equation 13 and the value R30 is chosen to satisfy the equation 17. However, in practice, manufacturing deviations can cause errors in the above equations, for example errors in the resistance values R20 and R30. Thus, for example, at the temperature Tr, the voltage Vout(T) can not be equal to the target value EG*Gain.

[0096] Thus, it is generally provided to be able to set the values of the resistors R2 and R3 to compensate at least at the temperature Tr the effects of the manufacturing deviations.

[0097] Figure 3 Examples of calibration or setting of the circuit of Figure 1 and Figure 2 are schematically illustrated.

[0098] More specifically, Figure 3 Fig. illustrates an example in which the resistors R2 and R3 are each implemented by a series of a constant resistor and a single controllable resistor. In other words, each of the resistors R2 and R3 comprises a fixed part and a single controllable part.

[0099] Thus, the resistor R2 comprises a fixed part (or fixed resistor) 300 and a controllable part (or controllable resistor) 302. The resistors 300 and 302 are in series between the terminals of the resistor R2. Similarly, the resistor R3 comprises a fixed part (or fixed resistor) 304 and a controllable part (or controllable resistor) 306. The resistors 304 and 306 are in series between the terminals of the resistor R3.

[0100] The fixed part 300 of the resistor R2 has a resistance value R20. The fixed part 304 of the resistor R3 has a resistance value R30.

[0101] The value of the controllable part 302 of the resistor R2 is equal to the product of the set value R2T1 and the integer Trim. The integer Trim is determined by the control signal sTrim. In other words, the resistance value of the part 302 of the resistor R2 is equal to R2T1 * Trim.

[0102] The value of the controllable part 306 of the resistor R3 is equal to the product of the set value R3T1 and the integer Trim. Again, the integer Trim is determined by the control signal sTrim. In other words, the resistance value of the part 306 of the resistor R3 is equal to R3T1 * Trim.

[0103] As an example, the number Trim is between -8 and +8.

[0104] Therefore, both resistors R2 and R3 are controlled by the same signal sTrim. The circuit 1 Figure 3 (not shown in detail) then comprises a control circuit CTRL configured to supply the signal sTrim to control the resistors R2 and R3.

[0105] Therefore, the values of the resistors R2 and R3 can be written as:

[0106] R2 = R20 + R2T1 * Trim (Equation 21)

[0107] R3 = R30 + R3T1 * Trim (Equation 22)

[0108] The values R20 and R30 are chosen so that R20 satisfies Equation 13 and R30 satisfies Equation 17. Therefore, in the absence of bias, if Trim is zero, then Equations 13 and 14 are valid, so it is logical that if no resistors R2 and R3 are set, this is the case.

[0109] Equation 13 can be written as:

[0110] R20 = R1 * / EG-Vbe(Tr)2 / (Utr*ln(n)) (Equation 23)

[0111] As an example, to simplify Figure 3 the description, the set values R2T1 and R3T1 are both taken equal to the value R0T1 and the factor Gain is chosen equal to 1, so that:

[0112]

[0113] Using Equation 24, Equations 19 and 20 can be written as:

[0114] and

[0115]

[0116] Therefore, if at the temperature Tr the voltage Vout(Tr) is not equal to EG, in this example where the factor Gain is equal to 1, then the voltage Vout(Tr) can be brought back to the value EG by modifying the value of the number Trim. However, the value of the number Trim causes the value of the factor R20 / R1*(1+(R0T1 / R20)*Trim)*Utr*ln(n)-(Eg-Vbe(T)) to vary, which causes the slope of the portion Vslope(T) of the voltage Vout(T) to vary.

[0117] Symmetrically, varying the number Trim to modify the slope of the portion Vslope(T) of the voltage Vout(T) necessarily causes the absolute value of the portion Vout0 of the voltage Vout(T) to vary.

[0118] This mutual dependency of the setting of the value Vout0 and of the slope of the portion Vslope(T) of the voltage Vout(T) also exists when the factor G is chosen to be different from 1, but is not detailed herein.

[0119] This mutual dependency of the setting of the constant value Vout0 of the voltage Vout(T) and of the slope of the portion Vslope(T) of the voltage Vout(T) is undesirable, for example in applications where the voltage Vout(T) must have a value that is as constant as possible over the entire temperature range.

[0120] It is further preferred for the signal sTrim that the resistors R2 and R3 are controlled simultaneously and in the same way, to avoid a complex setting procedure.

[0121] To overcome the above drawbacks, there is provided herein that each of the resistors R2 and R3 comprises a fixed portion and N controllable portions, where N is an integer greater than or equal to 2; each controllable portion is equal to the set value of that controllable portion multiplied by an integer determined by a signal used to control that controllable portion; each of the N controllable portions of the resistor R2 is associated with a corresponding controllable portion of the resistor R3; the control circuit is configured to deliver, for each controllable portion, the same control signal to that controllable portion and to the controllable portion associated therewith; and the set value of at least one controllable portion is different from the set value of the controllable portion associated therewith.

[0122] In fact, as will be detailed in the examples below, this enables, for each pair of associated controllable portions comprising a controllable portion of the resistor R2 and a portion of the resistor R3, the effect of a variation of the control signal of that pair of associated controllable portions to be independent of the effect of a variation of the control signal of another pair of associated controllable portions.

[0123] More particularly, the setting value of each controllable part of a pair of associated controllable parts can be determined so that a variation of the control signal of this pair of associated controllable parts results in: a simultaneous variation of the value Vout0 and of the slope of the voltage Vslope(T) ; or a variation of the value Vout0 without for this varying the slope of the voltage Vslope(T) ; or a variation of the slope of the voltage Vslope(T) without variation of the value Vout0.

[0124] Thus, N pairs of associated controllable parts can be controlled with N signals to perform N settings independently from each other.

[0125] Figure 4 An example of a mode of calibration or setting of the bandgap circuit 1 is schematically illustrated, in the case where the resistors R2 and R3 are as defined above, i.e. each resistor has N controllable parts, the controllable parts of the resistors R2 and R3 being associated in pairs, including a controllable part of the resistor R2 and a controllable part of the resistor R3, both controlled by the same signal.

[0126] In the example of Fig. 1, N is equal to 2. Figure 4

[0127] Figure 4 Only the resistors R2 and R3 of the circuit 1 and the circuit CTRL1 for controlling the resistors R2 and R3 are detailed in the example of Fig. 1.

[0128] The resistor R2 comprises a fixed part (or resistor) R20 and N controllable parts (or resistors) R2i, with i being an integer between 1 and N. The resistors R20 and R2i are connected in series between the terminals of the resistor R2. In the example of Fig. 1, where N is equal to 2, the resistor R2 thus comprises two controllable parts R21 and R22. Figure 4

[0129] Similarly, the resistor R3 comprises a fixed part (or resistor) R30 and N controllable parts (or resistors) R3i. The resistors R30 and R3i are connected in series between the terminals of the resistor R3. In the example of Fig. 1, where N is equal to 2, the resistor R3 thus comprises two controllable parts R31 and R32. Figure 4

[0130] Each part R2i of the resistor R2 is associated with a corresponding part R3i of the resistor R3. In the example of Fig. 1, where N is equal to 2, the part R21 of the resistor R2 is associated with the corresponding part R31 of the resistor R3, and the part R22 of the resistor R2 is associated with the corresponding part R32 of the resistor R3. Figure 4

[0131] ​​​​The resistance value of each portion R2i of the resistor R2 is equal to the product of the set value R2Ti of the portion R2i and an integer Trimi, the value of which is determined by the signal STrimi used to control the portion R2i. Thus, in the example of Figure 4 where N is equal to 2, the portion R21 is equal to R2T1 * Trim1 and the portion R22 is equal to R2T2 * Trim2. As an example, each integer Trimi can take all the integer values between the integer value -A and the integer value +A, where A is a positive integer value, for example equal to 8.

[0132] Symmetrically, the resistance value of each portion R3i of the resistor R3 is equal to the product of the set value R3Ti of the portion R3i and the corresponding integer Trimi. Thus, in the example of Figure 4 where N is equal to 2, the portion R31 is equal to R3T1 * Trim1 and the portion R32 is equal to R3T2 * Trim2.

[0133] In the resistors R2 and R3, for each pair of associated controllable portions R2i and R3i, the two controllable portions R2i and R3i of the pair are controlled by the same signal STrimi that determines the value of the integer Trimi. For example, in Figure 4 where N is equal to 4, the associated controllable portions R21 and R31 are controlled by the same signal STrim1 that determines the value of the integer Trim1 and the associated controllable portions R22 and R32 are controlled by the same signal STrim2 that determines the value of the integer Trim2.

[0134] The signals STrimi are delivered by the circuit CTRL1.

[0135] The integers Trimi are determined independently of each other, or, in other words, the signals STrimi are independent of each other.

[0136] The resistance values of the fixed portions R20 and R30 of the resistors R2 and R3 are chosen to satisfy the equations 13 and 17.

[0137] Thus, in the example of Figure 3 where N is equal to 2, the portion R21 is equal to R2T1 * Trim1 and the portion R22 is equal to R2T2 * Trim2. As an example, each integer Trimi can take all the integer values between the integer value -A and the integer value +A, where A is a positive integer value, for example equal to 8.

[0138] R2 = R20 + R2T1 * Trim1 + R2T2 * Trim2

[0139] and

[0140] R3 = R30 + R3T1 * Trim1 + R3T2 * Trim2

[0141]

[0142] In the equation 27, it is assumed that:

[0143]

[0144] Since x is small compared to 1, the following series expansion is used:

[0145]

[0146] Thus:

[0147]

[0148] And therefore:

[0149]

[0150] In equation 19: replace R3 / R2 with the expression according to equation 32, and replace R3 in the term R3 / R20 with the expression according to equation 32, thus obtaining:

[0151]

[0152] Neglect all terms in Trim1*Trim2, Trim1*Trim1 and Trim2*Trim2 in the expression of equation 34 above, then obtain:

[0153]

[0154] By expanding expression 35, obtain:

[0155]

[0156] And therefore:

[0157]

[0158] Similarly, in equation 20: by replacing R3 / R2 with the expression according to equation 32, and replacing R3 in the R3 / R20 term with the expression according to equation 28, then obtain:

[0159]

[0160] For Vout0, neglect the terms in Trim1*Trim1, Trim1*Trim2 and Trim2*Trim2, obtain:

[0161]

[0162] Thus:

[0163]

[0164] In the above equations 37 and 40, the effect of the variation of the number Trimi adds up in the expression of Vout0 and Vslope(T) without the effect of the variation of one of the numbers Trimi affecting the effect of the variation of the other number Trimi. In particular, equation 40 shows that the slope of the term Vslope(T) does not depend on the setting of R3.

[0165] Therefore, as already indicated above, it is possible to determine the setting values of each of the pair of associated controllable parts R2i and R3i such that the variation of the signal STrimi corresponding to the pair of controllable parts R2i and R3i, and therefore the variation of the number Trimi, causes: a simultaneous variation of the value Vout0 and of the slope of the voltage Vslope(T); or a variation of the value Vout0 without changing the slope of the voltage Vslope(T) for this; or a variation of the slope of the voltage Vslope(T) without a variation of the value Vout0.

[0166] Therefore, the first number Trimi can be modified (or used) to implement one of the three modifications listed above, while the second number Trimi can be modified (or used) to implement another one of the three modifications listed above.

[0167] For example, considering a factor Gain equal to 1 (R30 = R20) and a pair R2i, R3i for a given index i, by providing R2Ti = R3Ti for this index i, the variation of the number Trimi corresponding to this index causes a simultaneous variation of the voltage Vout0 and of the slope of the voltage Vslope(T). For example, by applying this to the pair R21, R31 for the index i equal to 1, i.e. by choosing R2T1 = R3T1 = R0T1, one obtains:

[0168]

[0169] Then, in the expression of Vout0 according to equation 41, one finds the right side of the equality of equation 25 with Trim = Trim1, and, in the expression of Vslope(T) according to equation 42, one finds the right side of the equality of equation 26 with Trim = Trim1.

[0170] In other words, by taking a pair R2i, R3i for a given index i with setting values R2Ti and R3Ti equal to each other, it is possible to use the number Trimi to implement a setting that modifies simultaneously the value of the voltage Vout0 and the slope of the voltage Vslope(T), as in the case of Figure 3 But, unlike Figure 4In contrast, a pair of R2i and R3i with different indices i can then be used to perform another setting, for example, to modify the value of Vout0 without modifying the slope value of Vslope(T), or to modify the slope value without modifying the value of Vout0.

[0171] As another example, considering a unit factor Gain and a pair of R2i and R3i with a given index i, the corresponding set values R2Ti and R3Ti can be determined such that a change in the number Trimi corresponding to the given index i causes a change in the slope of the voltage Vslope(T) without modifying the value Vout0 for this purpose. As an example, to achieve this, the set values R2Ti and R3Ti of the pair R2i and R3i with the given index i are selected such that R2Ti * Vbe(Tr) = R3Ti * EG. For example, by applying this to the pair R21 and R31 with an index i equal to 1, that is, by selecting R2T1 * Vbe(Tr) = R3T1 * EG in the above equations 37 and 40, we obtain:

[0172] and

[0173]

[0174] Therefore, in equations 43 and 44, a change in the number Trim1 only changes the slope value of the voltage Vslope(T), while the value of Vout0 remains unchanged.

[0175] As another example, considering a unit factor Gain and a pair of R2i and R3i with a given index i, the corresponding set values R2Ti and R3Ti can be determined such that a change in the number Trimi corresponding to the given index i causes a change in the value of Vout0 without modifying the slope of the voltage Vslope(T) for this purpose. As an example, to achieve this, the set values R2Ti and R3Ti of the pair R2i and R3i with the given index i are selected such that R2Ti is zero. For example, by applying this to the pair R21 and R31 with an index i equal to 1, that is, by selecting R2T1 = 0 in the above equations 37 and 40, we obtain:

[0176]

[0177] and

[0178]

[0179] Therefore, in equations 45 and 46, a change in the number Trim1 only changes the value of Vout0, while the slope value of the voltage Vslope(T) remains unchanged.

[0180] As described above in connection withFigure 2 An example is described where N is equal to 2. However, in other examples, N can be equal to 3. Equations 37 and 40 then become:

[0181]

[0182] and

[0183]

[0184] In the case where N = 3, as an example, a first number Trimi (e.g., Triml) is used to set both the slope of the voltage Vslope(T) and the value of the voltage Vouto, a second number Trimi (e.g., Trim2) is used to set the voltage Vouto without changing the slope of the voltage Vslope(T), and a third number Trimi (e.g., Trim3) is used to set the slope of the voltage Vslope(T) without modifying the value of the voltage Vouto. For this, for example, in the case of a unit factor Gain, the set values are chosen as follows:

[0185] - R2T1= R3T1;

[0186] - R2T2= 0; and

[0187] - R2T3*Vbe(Tr) = R3T3*EG.

[0188] By applying this to Equations 47 and 48 (where Gain = 1), one obtains:

[0189]

[0190] and

[0191]

[0192] These Equations 49 and 50 effectively show that:

[0193] - a change in the number Triml results in a change in both the voltage Vouto and the slope of the voltage Vslope(T);

[0194] - a change in the number Trim2 results in a change in the voltage Vouto only; and

[0195] - a change in the number Trim3 results in a change in the slope of the voltage Vslope(Tr) only.

[0196] More generally, Equations 37, 40, 47, and 48 can be generalized to any N greater than or equal to 2, where the voltage Vouto and the voltage Vslope(T) can then be written as:

[0197] and

[0198]

[0199] In the example described above, the factor Gain has been taken equal to 1. However, in other examples, the size of the circuit 1 can be determined so that, at the temperature Tr, the voltage Vout(T) is equal to the product of the value EG multiplied by a factor Gain, the value of which is not 1.

[0200] For example, taking the example above in which N is equal to 3 and in which Triml enables the value Vouto and the slope of the voltage Vslope(T) to be set simultaneously, Trim2 enables the voltage Vouto to be set without modifying the slope of the voltage Vslope(T), and Trim3 enables the slope of the voltage Vslope(T) to be set without modifying the value of the voltage Vouto, the set values are chosen as follows:

[0201] - R3T1 = Gain * R2T1 ;

[0202] - R2T2 = 0; and

[0203] - Gain * R2T3 * Vbe(Tr) = R3T3 * EG.

[0204] By applying this to the above equations 51 and 52 in the case N = 3, one obtains:

[0205]

[0206]

[0207] It can be effectively observed in equations 53 and 54 that a change in Triml changes both the slope of Vslope(T) and the value Vouto, a change in Trim2 changes only the value Vouto without changing the slope of Vslope(T), and a change in Trim3 changes only the slope of Vslope(T) without changing the value of Vouto.

[0208] Various embodiments and variants have been described. The person skilled in the art will understand that certain features of these various embodiments and variants can be combined, and that other variants will occur to the person skilled in the art. In particular, the person skilled in the art will be able to adapt the above description to the case where N is greater than 3, but preferably N is equal to 2 or 3, and even more preferably equal to 3.

[0209] Finally, based on the functional indications given above, the actual implementation of the described embodiments and variations is within the capabilities of those skilled in the art. In particular, those skilled in the art can replace all NPN type bipolar transistors with PNP type bipolar transistors, for example, replacing all P channel MOS transistors with N channel MOS transistors, and vice versa. ​ The example of circuit 1 (where the potential Vcc is positive relative to the reference potential GND) is adjusted to the case where the potential Vcc is negative relative to the reference potential.

Claims

1. A bandgap circuit, characterized in that, include: The first resistor is configured to receive a voltage across its terminals that is proportional to the absolute temperature; The second resistor is configured to receive a voltage across its terminals that is complementary to the absolute temperature. The third resistor, wherein the current flowing through the third resistor is equal to the sum of the current flowing through the first resistor and the current flowing through the second resistor; Each of the second and third resistors includes a fixed part and N controllable parts, where N is an integer greater than or equal to 2; Each controllable part is equal to the product of the set value of the controllable part and an integer determined by the control signal of the controllable part; Each of the N controllable parts of the second resistor is associated with a corresponding one of the N controllable parts of the third resistor; as well as The control circuit is configured to supply the same control signal to the controllable portion of one of the first resistor and the second resistor and the controllable portion of the other of the first resistor and the second resistor associated therewith for each controllable portion. and The setting value of at least one of the controllable parts is different from the setting value of the controllable part associated with it.

2. The bandgap circuit according to claim 1, characterized in that, The pairing of the controllable portion of the third resistor and the associated controllable portion of the second resistor satisfies one of the following relationships: The set value of the controllable part of the third resistor is equal to Gain times the set value of the associated controllable part of the second resistor; The controllable part of the second resistor is set to empty; or The set value of the controllable part of the third resistor is equal to Gain*Vbe(Tr) / EG times the set value of the associated controllable part of the second resistor, where Gain is equal to the ratio of the resistance value of the fixed part of the third resistor to the resistance value of the fixed part of the second resistor, Vbe(Tr) is the voltage value obtained at temperature Tr that is complementary to the absolute temperature, Tr is the reference temperature, and EG is a constant equal to 1.181 V.

3. The bandgap circuit according to claim 2, characterized in that, The controllable portion of the third resistor and the associated controllable portion of the second resistor are paired to verify another relationship in the relationship.

4. The bandgap circuit according to claim 3, characterized in that, N is greater than or equal to 3; and The controllable portion of the third resistor and the associated controllable portion of the second resistor are another pairing verification of the relationship.

5. The bandgap circuit according to claim 1, characterized in that, The fixed portions of the second and third resistors have the same resistance value.

6. The bandgap circuit according to claim 1, characterized in that, The resistance of the fixed portion of the second resistor is equal to (EG - Vbe(Tr)) / (Utr * ln(n)) times the resistance of the first resistor, where: EG is a constant equal to 1.181 V; Vbe(Tr) is the voltage value obtained at the reference temperature Tr that is complementary to the absolute temperature; Utr is equal to (k * Tr) / q, where k is the Boltzmann constant and q is the elementary charge; and n is the size ratio between the two bipolar transistors, which is configured such that the difference between the base-emitter voltages of the two bipolar transistors is determined and equal to a voltage proportional to the absolute temperature.

7. The bandgap circuit according to claim 1, characterized in that, Also includes: In both NPN and PNP type 1 bipolar transistors, their bases are connected to each other; The emitter of the first bipolar transistor of the two bipolar transistors is connected to the node used to apply the reference potential, and its base and collector are coupled to each other; The second bipolar transistor of the two bipolar transistors is n times larger than the first bipolar transistor of the two bipolar transistors, and its emitter is coupled in series to the node for applying the reference potential through the first resistor; The third bipolar transistor of the first type has its base and collector coupled to each other through a buffer circuit; The emitter of the third bipolar transistor is connected to the node used to apply the reference potential; as well as The base of the third bipolar transistor is coupled to the node used to apply the reference potential via a second resistor.

8. The bandgap circuit according to claim 7, characterized in that, Also includes: The first current mirror is configured to supply a copy of the current flowing through the first resistor to the current summing node and to bias the first bipolar transistor of the two bipolar transistors. The second current mirror is configured to provide a copy of the current flowing through the second resistor to the current summing node; as well as The third resistor couples the current summation node to the node used to apply the reference potential.

9. The bandgap circuit of claim 8, wherein the additional buffer circuit is connected to the current summing node and is configured to provide an output voltage equal to the voltage across the third resistor.

10. The circuit according to claim 8, characterized in that: The collectors of the two bipolar transistors are coupled to a node for applying the power supply potential via a first current mirror; and A buffer circuit that couples the base and collector of a third bipolar transistor to each other couples the base of the third transistor to a second current mirror, which in turn couples the buffer circuit to a node used to apply a power supply potential.

11. A bandgap circuit, characterized in that, include: The first resistor is configured to receive a voltage across its terminals that is proportional to the absolute temperature; The second resistor is configured to receive a voltage across its terminals that is complementary to the absolute temperature. The third resistor, wherein the current flowing through the third resistor is equal to the sum of the current flowing through the first resistor and the current flowing through the second resistor; The second resistor includes a first fixed resistor section, a first controllable resistor section, and a second controllable resistor section connected in series. The third resistor includes a second fixed resistor section, a third controllable resistor section, and a fourth controllable resistor section connected in series; as well as The control circuit is configured to generate: A first trimming signal is applied to the first controllable resistor section and the third controllable resistor section; as well as A second trimming signal is applied to the second controllable resistor section and the fourth controllable resistor section.

12. The bandgap circuit according to claim 11, characterized in that, Each controllable resistor section is equal to the product of the set value of the controllable resistor section and the integer set by the trimming signal.

13. The bandgap circuit according to claim 12, characterized in that, The setting values ​​for the first controllable resistor section are different from those for the third controllable resistor section.

14. The bandgap circuit according to claim 12, characterized in that, The setting values ​​for the second controllable resistor section are different from those for the fourth controllable resistor section.

15. The bandgap circuit according to claim 12, characterized in that, The setting value of the third or fourth controllable part of the third resistor is equal to the Gain value of the associated first or second controllable part of the second resistor.

16. The bandgap circuit according to claim 12, wherein the setting value of the first controllable portion or the second controllable portion of the second resistor is empty.

17. The bandgap circuit according to claim 11, characterized in that, The first and second fixed resistor portions of the second and third resistors have the same resistance value.

18. The bandgap circuit according to claim 11, characterized in that, The resistance value of the second fixed resistor section of the second resistor is equal to a multiple of the resistance value of the first resistor.

19. The bandgap circuit according to claim 11, characterized in that, Also includes: First bipolar transistor; Second bipolar transistor; as well as Third bipolar transistor; The bases of the first bipolar transistor and the second bipolar transistor are connected to each other and to the collector of the first bipolar transistor. The first resistor is coupled in series between the emitter of the second bipolar transistor and the node used to apply the reference potential; The second resistor is connected between the base of the third bipolar transistor and the node used to apply the reference potential.

20. The bandgap circuit according to claim 19, characterized in that, Also includes: A current mirror circuit system, coupled to a first bipolar transistor, a second bipolar transistor, and a third bipolar transistor, is configured to mirror the current flowing through the first and second resistors to a current summing node to generate the current flowing through the third resistor.

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