Ceramic circuit board

Abstract

The utility model discloses a ceramic circuit board which comprises a ceramic substrate, a metal substrate layer and a contact layer, the metal substrate layer is located between the ceramic substrate and the contact layer, the contact layer is sequentially provided with a nickel layer, a gold layer, a platinum layer and a tin-gold alloy layer from inside to outside, the nickel layer covers the surface of the metal substrate layer, the gold layer covers the surface of the platinum layer, and the tin-gold alloy layer covers the surface of the metal substrate layer. The gold layer is located between the nickel layer and the platinum layer, and the tin-gold alloy layer covers the outer surface of the platinum layer. According to the ceramic circuit board provided by the invention, the black nickel or black pad phenomenon generated in the circuit board is effectively reduced, the reliability and stability of the ceramic circuit board are improved, the stability of signal transmission and power supply transmission is improved and stabilized, the use amount of the gold element is reduced, so that the production cost is reduced, and the ceramic circuit board has a wide application prospect.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of circuit board, and in particular to a ceramic circuit board. BACKGROUND

[0002] Circuit board, also known as printed circuit board (PCB), is an indispensable core component in modern electronic equipment. It is composed of insulating substrate and conductive pattern, mainly used to realize electrical connection and mechanical support between electronic components. Circuit board is made by etching copper-clad plate, its surface is covered with copper foil to form wires or wiring, which are responsible for connecting electronic components to realize signal transmission and power supply. Circuit board not only reduces the space occupied by wires, but also organizes wires through clear layout to improve the integration and performance of electronic equipment. In addition, circuit board is widely used in various electronic products, including household appliances, computers, communication equipment, etc., and is the basis of electronic systems.

[0003] At present, with the progress of science and technology and the increasing demand for electronic equipment performance, and with the rapid development of microelectronic integration technology, the requirements for product quality and performance of circuit board are becoming more and more strict. Among them, ceramic circuit board is attracting more and more market attention due to its excellent thermal conductivity and low dielectric loss and other characteristics. These characteristics make ceramic circuit board have significant advantages in applications that require efficient thermal management and signal integrity, such as in 5G communication equipment, ceramic circuit board can significantly improve signal processing and transmission speed, further improve data transmission performance and efficiency.

[0004] However, because ceramic circuit board often contains nickel element metal layer and gold element metal layer, and nickel element migration often occurs during processing, resulting in "black nickel" or "black pad" phenomenon in the circuit board, and the nickel element metal layer often migrates to the surface of the gold element metal layer, further affecting the stability of signal transmission and power transmission. SUMMARY

[0005] One object of the present application is to provide a ceramic circuit board that reduces the temperature and time of chip bonding process, avoids the migration of nickel metal to the surface of the gold layer to form a nickel layer during high-temperature processing, resulting in "black nickel" or "black pad" phenomenon in the circuit board, improves the quality of the ceramic circuit board while reducing production cost.

[0006] Another object of the present application is to provide a ceramic circuit board that is beneficial to improve and stabilize the stability of signal transmission and power transmission.

[0007] Another object of the present application is to provide a ceramic circuit board that enhances the mechanical strength of the circuit board while improving the corrosion resistance of the circuit board.

[0008] To achieve the above object, the technical scheme adopted by the present application is as follows: a ceramic circuit board, characterized in that comprising:

[0009] The ceramic base material, the metal substrate layer and the contact layer, the metal substrate layer is between the ceramic base material and the contact layer, the contact layer is sequentially provided with a nickel layer, a gold layer, a platinum gold layer, a tin gold alloy layer from inside to outside, the nickel layer covers the surface of the metal substrate layer, the gold layer is between the nickel layer and the platinum gold layer, the tin gold alloy layer covers the outer surface of the platinum gold layer.

[0010] In an embodiment, the thickness of the nickel layer of the contact layer ranges from 2.0 to 6.0 microns, the thickness of the gold layer ranges from 0.05 to 0.25 microns, the thickness of the platinum gold layer ranges from 0.05 to 0.15 microns, and the thickness of the tin gold alloy layer ranges from 0.05 to 0.15 microns.

[0011] In an embodiment, the content ratio of tin element to gold element in the tin gold alloy layer ranges from 15:85 to 35:65.

[0012] In an embodiment, the content ratio of tin element to gold element in the tin gold alloy layer ranges from 20:80 to 30:70.

[0013] In an embodiment, the thickness of the nickel layer of the contact layer ranges from 3.0 to 5.0 microns, and the thickness of the gold layer ranges from 0.08 to 0.15 microns.

[0014] In an embodiment, the thickness of the platinum gold layer ranges from 0.08 to 0.12 microns, and the thickness of the tin gold alloy layer ranges from 0.08 to 0.12 microns.

[0015] In an embodiment, the metal substrate layer comprises a titanium layer and a copper layer, the titanium layer covers the upper surface of the ceramic base material, and the copper layer is between the titanium layer and the contact layer.

[0016] In an embodiment, the copper layer comprises a first copper layer and a second copper layer, the first copper layer covers the upper surface of the titanium layer, and the second copper layer is between the first copper layer and the nickel layer, the thickness of the titanium layer of the metal substrate layer ranges from 0.005 to 0.015 microns, the thickness of the first copper layer ranges from 0.01 to 0.05 microns, and the thickness of the second copper layer ranges from 60 to 85 microns.

[0017] In an embodiment, the thickness of the titanium layer of the metal substrate layer ranges from 0.008 to 0.012 microns, the thickness of the first copper layer ranges from 0.02 to 0.04 microns, and the thickness of the second copper layer ranges from 70 to 80 microns.

[0018] According to another aspect of the present application, a ceramic circuit board further comprises a chip, a bottom surface of the chip is a gold layer, and the chip is attached to the tin-gold alloy layer. BRIEF DESCRIPTION OF DRAWINGS

[0019] Figure 1 is a schematic diagram of a layered structure of a ceramic circuit board in the present application. (Chip structure is not shown)

[0020] Figure 2 is a schematic diagram of a layered structure of a ceramic circuit board in the present application.

[0021] In the figure: 100, circuit board; 10, ceramic substrate; 20, contact layer; 21, tin-gold alloy layer; 22, platinum-gold layer; 23, gold layer; 24, nickel layer; 30, metal substrate layer; 31, copper layer; 311, second copper layer; 312, first copper layer; 33, titanium layer; 200, chip; 40, second gold layer. DETAILED DESCRIPTION

[0022] Hereinafter, the present application will be further described in conjunction with specific embodiments. It should be noted that, under the premise of no conflict, each embodiment described below or each technical feature can be combined with any other embodiment or technical feature to form a new embodiment.

[0023] In the description of the present application, it should be noted that, for orientation words, such as terms "center", "transverse", "longitudinal", "length", "width", "thickness", "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc. indicate the orientation and positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and cannot be understood as limiting the specific protection scope of the present application.

[0024] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application are used to distinguish similar objects, and do not necessarily describe a specific order or sequence.

[0025] The terms "include" and "have" and any variations thereof in the specification and claims of the present application are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device that includes a series of steps or units does not have to be limited to only those steps or units clearly listed, but can include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0026] The following will be described with reference to the drawingsFigure 1 With Figure 2 Further described is a specific embodiment of a ceramic circuit board.

[0027] According to an aspect of the present application, a ceramic circuit board comprises:

[0028] The ceramic substrate 10, the metal substrate layer 30, and the contact layer 20, the metal substrate layer 30 is located between the ceramic substrate 10 and the contact layer 20, the contact layer 20 is provided with a nickel layer 24, a gold layer 23, a platinum gold layer 22, and a tin gold alloy layer 21 from inside to outside, the nickel layer 24 is covered on the surface of the metal substrate layer 30, the gold layer 23 is located between the nickel layer 24 and the platinum gold layer 22, and the tin gold alloy layer 21 is covered on the outer surface of the platinum gold layer 22.

[0029] Referring to Figure 1 As shown, by providing the platinum gold layer 22 and the tin gold alloy layer 21 on the nickel layer 24 and the gold layer 23 in the contact layer 20 above the ceramic substrate 10, the migration of nickel metal in the nickel layer 24 to the gold layer 23 and the oxidation of the generated nickel oxide film during high-temperature processing are avoided, further reducing the conductivity of the ceramic circuit board 100, and reducing the corrosion resistance of the ceramic circuit board 100, thereby reducing the stability of signal transmission and power transmission in the circuit board 100, while reducing the amount of gold element in production to reduce the consumption cost in the production process, and prolonging the service life of electronic equipment.

[0030] It can be understood that the tin gold alloy layer 21 with a predetermined composition ratio can complete eutectic reaction at a lower temperature without the need for flux, so this low-temperature characteristic is suitable for temperature-sensitive ceramic circuit board 100 application scenarios. Further, through the eutectic bonding effect between tin elements and gold elements, good eutectic reaction temperature, mechanical properties, high reliability, and optimized contact metallization structure are exhibited in the ceramic circuit board 100, which is suitable for various high-precision and high-demand electronic packaging application scenarios.

[0031] In an embodiment, the thickness of the nickel layer 24 of the contact layer 20 is in the range of 2.0 μm to 6.0 μm, and specifically can be 2.0 μm, 2.5 μm, 3.0 μm, 3.5 μm, 4.0 μm, 4.5 μm, 5.0 μm, 5.5 μm, or 6.0 μm. By setting the nickel layer 24 between the gold layer 23 and the copper layer 31 as a barrier, the diffusion effect between gold elements and copper elements is prevented, thereby improving the durability and electrical properties of the ceramic circuit board 100, further improving the soldering performance, and enhancing the connection point strength.

[0032] It can be understood that, as Figure 1As shown, the thickness of the nickel layer 24 has a significant impact on the reliability and service life of the ceramic circuit board 100. When the thickness of the nickel layer 24 is too low, copper diffusion through the nickel layer 24 can occur, which can affect the soldering performance and further increase the risk of copper diffusion. When the thickness of the nickel layer 24 is too high, it can increase the cost and cause unnecessary material waste during production.

[0033] In an embodiment, the thickness of the gold layer 23 is in the range of 0.05 μm to 0.25 μm, and specifically, the thickness of the gold layer 23 can be 0.05 μm, 0.08 μm, 0.10 μm, 0.12 μm, 0.15 μm, 0.18 μm, 0.20 μm, 0.22 μm, or 0.25 μm. The nickel layer 24 disposed between the gold layer 23 and the copper layer 31 can help to increase the mechanical strength of the gold layer 23 to a greater extent. Further, since the gold layer 23 has good electrical conductivity and oxidation resistance, it can effectively reduce the contact resistance and improve the reliability of the connection, and also help to enhance the stability and reliability of the circuit board 100 in application.

[0034] It can be understood that the importance of the thickness of the gold layer 23 in the ceramic circuit board 100 mainly lies in its impact on the electrical contact performance and corrosion resistance. Salt spray tests can be performed under a predetermined thickness of the gold layer 23, and the corrosion resistance is good. However, when the thickness of the gold layer 23 is high, the price of gold is high, and therefore increasing the thickness of the gold layer 23 can increase the consumption cost during production, and further reduce the potential for large-scale production of the ceramic circuit board 100.

[0035] In an embodiment, the thickness of the platinum gold layer 22 is in the range of 0.05 μm to 0.15 μm, and specifically, the thickness of the platinum gold layer 22 can be 0.05 μm, 0.06 μm, 0.07 μm, 0.08 μm, 0.09 μm, 0.10 μm, 0.11 μm, 0.12 μm, 0.13 μm, 0.14 μm, or 0.15 μm. Through the action of the platinum gold layer 22 and the tin gold alloy layer 21, the migration of nickel metal in the nickel layer 24 to the gold layer 23 and the formation of a nickel oxide film during high-temperature processing can be avoided, and the electrical conductivity of the ceramic circuit board 100 can be further reduced. In other words, the predetermined thickness of the platinum gold layer 22 can block the migration of nickel metal, and further, since the price of platinum gold is lower than that of gold, the thickness of the gold layer 23 can be reduced after the platinum gold layer 22 is disposed, and the use of gold can be reduced, thereby reducing the consumption cost during production.

[0036] In an embodiment, the thickness of the tin-gold alloy layer 21 is in the range of 0.05 μm to 0.15 μm. Specifically, the thickness of the tin-gold alloy layer 21 can be 0.05 μm, 0.06 μm, 0.07 μm, 0.08 μm, 0.09 μm, 0.10 μm, 0.11 μm, 0.12 μm, 0.13 μm, 0.14 μm, or 0.15 μm. The tin-gold alloy layer 21 is configured to further improve the corrosion resistance, enhance the electrical conductivity and solderability, improve the mechanical strength and oxidation resistance of the ceramic circuit board 100, and optimize the manufacturing process, thereby ensuring the reliability and quality of the ceramic circuit board 100.

[0037] In an embodiment, the content ratio of tin to gold in the tin-gold alloy layer 21 is in the range of 15:85 to 35:65. Specifically, the content ratio of tin to gold in the tin-gold alloy layer 21 can be 15:85, 20:80, 25:75, 30:70, or 35:65. By selecting a certain ratio in the tin-gold alloy layer 21, the eutectic reaction can be completed at a lower temperature without the need for flux. Further, the eutectic bonding between tin and gold can exhibit good eutectic reaction temperature, mechanical properties, high reliability, and optimized contact metallization structure in the ceramic circuit board 100, which is suitable for various high-precision and high-demand electronic packaging application scenarios.

[0038] In an embodiment, the content ratio of tin to gold in the tin-gold alloy layer 21 is in the range of 20:80 to 30:70. The eutectic bonding between tin and gold can help to enhance the stability and reliability of the circuit board 100.

[0039] In an embodiment, the thickness of the nickel layer 24 of the contact layer 20 is in the range of 3.0 μm to 5.0 μm, the thickness of the gold layer 23 is in the range of 0.08 μm to 0.15 μm, the thickness of the platinum-gold layer 22 is in the range of 0.08 μm to 0.12 μm, and the thickness of the tin-gold alloy layer 21 is in the range of 0.08 μm to 0.12 μm. By configuring the nickel layer 24, the gold layer 23, and the platinum-gold layer 22 in the contact layer 20 with certain thicknesses, the phenomenon of nickel migration to the gold layer 23 for oxidation reaction to form a nickel-containing oxide film during high-temperature processing can be effectively avoided, further enhancing the stability and reliability of the circuit board 100.

[0040] In an embodiment, the metal substrate layer 30 includes a titanium layer 33 and a copper layer 31. The titanium layer 33 is coated on the upper surface of the ceramic substrate 10, and the copper layer 31 is located between the titanium layer 33 and the contact layer 20.

[0041] In an embodiment, the copper layer 31 comprises a first copper layer 312 and a second copper layer 311, the first copper layer 312 is coated on the upper surface of the titanium layer 33, and the second copper layer 311 is located between the first copper layer 312 and the nickel layer 24. The thickness of the titanium layer 33 of the metal substrate layer 30 is in the range of 0.005 μm to 0.015 μm, and specifically, the thickness of the titanium layer 33 of the metal substrate layer 30 can be 0.005 μm, 0.006 μm, 0.007 μm, 0.008 μm, 0.009 μm, 0.010 μm, 0.011 μm, 0.012 μm, 0.013 μm, 0.014 μm, or 0.015 μm. As the adhesion interface between the copper layer 31 and the ceramic substrate 10, the titanium layer 33 further enhances the adhesion of the metal circuit, while ensuring that the copper layer 31 is firmly attached to the ceramic substrate, thereby improving the reliability and stability of the ceramic circuit board 100. It can be understood that when the thickness of the titanium layer 33 is too large, it will affect the electrical performance of the ceramic circuit board 100, thereby reducing the stability and performance of the circuit board 100. Under the predetermined thickness of the titanium layer 33, the hardness, corrosion resistance and high temperature oxidation resistance are also significantly improved, which indicates that appropriate increase in the thickness of the titanium layer 33 in the ceramic circuit board 100 can improve its mechanical properties and high temperature resistance.

[0042] In an embodiment, the thickness of the first copper layer 312 is in the range of 0.01 μm to 0.05 μm, and specifically, the thickness of the first copper layer 312 can be 0.01 μm, 0.015 μm, 0.02 μm, 0.025 μm, 0.03 μm, 0.035 μm, 0.04 μm, 0.045 μm, or 0.05 μm. By providing the copper layer 31 as the main conductive layer in the circuit board 100, it is used to form the connection path between electronic components, thereby realizing the transmission of current and the transmission of signals. Moreover, since copper is a good thermal conductor, the provided copper layer 31 helps to conduct heat from the electronic components to the ceramic substrate 10, and then to the surrounding environment, thereby achieving effective heat management, while increasing the mechanical strength of the ceramic circuit board 100, making it more resistant to mechanical impact and vibration, and improving the durability of the circuit board 100. It can be understood that the copper layer 31 comprises the first copper layer 312 and the second copper layer 311 with different thicknesses, wherein the thin first copper layer 312 is provided to facilitate fine processing and achieve more flexible circuit design, and the thin copper layer 31 reduces thermal resistance and improves heat conduction efficiency. In other words, the thin first copper layer 312 further reduces the amount of material used during processing, thereby reducing production costs.

[0043] In an embodiment, the second copper layer 311 has a thickness ranging from 60 μm to 85 μm, and specifically, the thickness of the second copper layer 311 can be 60 μm, 65 μm, 70 μm, 75 μm, 80 μm or 85 μm. By providing copper layers 31 with different thicknesses in the circuit board 100, different electrical loads can be processed. The thicker copper layer 31 is beneficial for processing high-current and high-power application scenarios, and enhances the mechanical strength of the ceramic circuit board 100. In the process of use, the performance and reliability of the circuit board 100 are further improved due to the increase in the thickness of the ceramic circuit board 100.

[0044] In an embodiment, the titanium layer 33 of the metal substrate layer 30 has a thickness ranging from 0.008 μm to 0.012 μm, the first copper layer 312 has a thickness ranging from 0.02 μm to 0.04 μm, and the second copper layer 311 has a thickness ranging from 70 μm to 80 μm. Since the thickness of the metal layer in the circuit board 100 directly affects its electrical conductivity and heat conduction capacity, the selection of the thickness of each metal layer in the ceramic circuit board 100 is crucial for ensuring the performance, reliability and environmental adaptability of the circuit, and is a key parameter that needs to be accurately controlled in the design and manufacture of the ceramic circuit board 100.

[0045] According to another aspect of the present application, as shown in Figure 2 The ceramic circuit board 100 further comprises a chip 200, and the bottom layer of the chip 200 is provided with a second gold layer 40 which is attached to the tin-gold alloy layer 21. The provision of the tin-gold alloy layer 21 is beneficial for reducing the temperature and time of the chip 200 attachment process, and the temperature rising rate is reduced from 2 minutes to 320°C to 1 minute to 280°C. Further, the migration of nickel to the surface of the gold layer to form a Ni layer during high-temperature processing is prevented, which affects the mutual attachment of gold in the circuit board 100 and gold in the second gold layer 40 of the chip 200. Therefore, the ceramic circuit board 100 provided by the present application has good contact performance between the bottom layer of the chip 200 and the ceramic circuit board 100, and greatly improves the stability of the performance of the ceramic circuit board 100.

[0046] In other words, by providing a ceramic circuit board 100 according to the present application, the selection of each metal layer and thickness helps to further reduce the consumption of production cost, avoid the migration of nickel metal, and thus enhance the mechanical properties, high reliability and electrical stability of the ceramic circuit board 100, which has a wide application prospect.

[0047] Embodiment 1

[0048] A ceramic circuit board 100 comprises a ceramic substrate 10, a metal substrate layer 30 and a contact layer 20, the metal substrate layer 30 is located between the ceramic substrate 10 and the contact layer 20, the contact layer 20 is sequentially provided with a nickel layer 24, a gold layer 23, a platinum gold layer 22 and a tin gold alloy layer 21 from inside to outside, the nickel layer 24 is covered on the surface of the metal substrate layer 30, the gold layer 23 is located between the nickel layer 24 and the platinum gold layer 22, and the tin gold alloy layer 21 is covered on the outer surface of the platinum gold layer 22. The tin gold alloy layer 21 is formed of tin gold alloy, and the content ratio of tin element to gold element is 25:75. The thickness of the nickel layer 24 is 4 μm, the thickness of the gold layer 23 is 0.1 μm, the thickness of the platinum gold layer 22 is 0.1 μm, and the thickness of the tin gold alloy layer 21 is 0.1 μm. The metal substrate layer 30 is sequentially provided with a titanium layer 33, a first copper layer 312 and a second copper layer 311 from inside to outside, wherein the thickness of the titanium layer 33 is 0.01 μm, the thickness of the first copper layer 312 is 0.03 μm, and the thickness of the second copper layer 311 is 75 μm.

[0049] Example 2

[0050] A ceramic circuit board 100 comprises a ceramic substrate 10, a metal substrate layer 30 and a contact layer 20, the metal substrate layer 30 is located between the ceramic substrate 10 and the contact layer 20, the contact layer 20 is sequentially provided with a nickel layer 24, a gold layer 23, a platinum gold layer 22 and a tin gold alloy layer 21 from inside to outside, the nickel layer 24 is covered on the surface of the metal substrate layer 30, the gold layer 23 is located between the nickel layer 24 and the platinum gold layer 22, and the tin gold alloy layer 21 is covered on the outer surface of the platinum gold layer 22. The tin gold alloy layer 21 is formed of tin gold alloy, and the content ratio of tin element to gold element is 25:75. The thickness of the nickel layer 24 is 4 μm, the thickness of the gold layer 23 is 0.1 μm, the thickness of the platinum gold layer 22 is 0.1 μm, and the thickness of the tin gold alloy layer 21 is 0.1 μm. The metal substrate layer 30 is sequentially provided with a titanium layer 33, a first copper layer 312 and a second copper layer 311 from inside to outside, wherein the thickness of the titanium layer 33 is 0.01 μm, the thickness of the first copper layer 312 is 0.03 μm, and the thickness of the second copper layer 311 is 75 μm.

[0051] Example 3

[0052] The ceramic circuit board 100 comprises a ceramic base material 10, a metal substrate layer 30 and a contact layer 20, the metal substrate layer 30 is located between the ceramic base material 10 and the contact layer 20, the contact layer 20 is sequentially provided with a nickel layer 24, a gold layer 23, a platinum gold layer 22 and a tin gold alloy layer 21 from inside to outside, the nickel layer 24 is covered on the surface of the metal substrate layer 30, the gold layer 23 is located between the nickel layer 24 and the platinum gold layer 22, and the tin gold alloy layer 21 is covered on the outer surface of the platinum gold layer 22, wherein the tin gold alloy layer 21 is formed by tin gold alloy, the content ratio of tin element and gold element is 25:75, the thickness of the nickel layer 24 is 4 microns, the thickness of the gold layer 23 is 0.1 microns, the thickness of the platinum gold layer 22 is 0.1 microns, and the thickness of the tin gold alloy layer 21 is 0.1 microns; the metal substrate layer 30 is sequentially provided with a titanium layer 33, a first copper layer 312 and a second copper layer 311 from inside to outside, wherein the thickness of the titanium layer 33 is 0.012 microns, the thickness of the first copper layer 312 is 0.025 microns, and the thickness of the second copper layer 311 is 78 microns.

[0053] The above describes the basic principles, main features and advantages of the present application. Those skilled in the art should understand that the present application is not limited to the above-mentioned embodiments, the above-mentioned embodiments and descriptions in the specification are only the principles of the present application, and various changes and improvements can be made without departing from the spirit and scope of the present application, and these changes and improvements all fall within the scope of the claimed present application. The scope of protection claimed by the present application is defined by the appended claims and their equivalents.

Claims

1. A ceramic wiring board, characterized by, The contact layer comprises a nickel layer, a gold layer, a platinum gold layer and a tin gold alloy layer from inside to outside, the nickel layer is covered on the surface of the metal substrate layer, the gold layer is between the nickel layer and the platinum gold layer, and the tin gold alloy layer is covered on the outer surface of the platinum gold layer.

2. A ceramic wiring board as claimed in claim 1, wherein, The thickness of the nickel layer of the contact layer is 2.0-6.0 μm, the thickness of the gold layer is 0.05-0.25 μm, the thickness of the platinum gold layer is 0.05-0.15 μm, and the thickness of the tin gold alloy layer is 0.05-0.15 μm.

3. The ceramic circuit board of claim 2 wherein, The thickness of the nickel layer of the contact layer is 3.0-5.0 μm, and the thickness of the gold layer is 0.08-0.15 μm.

4. The ceramic circuit board of claim 1 wherein, The thickness of the platinum gold layer is 0.08-0.12 μm, and the thickness of the tin gold alloy layer is 0.08-0.12 μm.

5. A ceramic circuit board as claimed in any one of claims 1 to 4, characterized in that The metal substrate layer comprises a titanium layer and a copper layer, the titanium layer is covered on the upper surface of the ceramic substrate, and the copper layer is between the titanium layer and the contact layer.

6. A ceramic circuit board as claimed in claim 5, wherein, The copper layer comprises a first copper layer and a second copper layer, the first copper layer is covered on the upper surface of the titanium layer, and the second copper layer is between the first copper layer and the nickel layer, the thickness of the titanium layer of the metal substrate layer is 0.005-0.015 μm, the thickness of the first copper layer is 0.01-0.05 μm, and the thickness of the second copper layer is 60-85 μm.

7. A ceramic circuit board as claimed in claim 6, characterized in that The thickness of the titanium layer is 0.008-0.012 μm, the thickness of the first copper layer is 0.02-0.04 μm, and the thickness of the second copper layer is 70-80 μm.

8. The ceramic wiring board as claimed in claim 7, wherein The chip further comprises a gold layer on the bottom surface of the chip, and the chip is attached to the tin gold alloy layer.

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