Circuit for improving load capacity of MOS tube switching system during power supply
By introducing resistor R2 and diode D1 into the MOSFET switching system, combined with capacitors C1, C2, C3, C4 and NMOS transistor PQ2, the loss problem of MOSFET when turning off under heavy load is solved, achieving fast turn-off and stability, and reducing circuit power consumption and cost.
Patent Information
- Application Number
- CN202520259792.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-18
- Publication Date
- 2025-11-21
- Estimated Expiration
- 2035-02-18
AI Technical Summary
Existing MOSFETs are prone to exceeding their safe operating area when turned off under heavy loads, leading to losses and failure. Current technologies require the selection of MOSFETs with larger drain current, greater power dissipation, and smaller on-resistance to ensure stability, but this increases circuit power consumption and cost.
A combination of resistor R2 and diode D1 is used to quickly charge the gate of the PMOS transistor through power supply SA, ensuring rapid turn-off and avoiding exceeding the safe operating area. At the same time, capacitors C1, C2, C3, and C4 are used to smooth voltage fluctuations and stabilize the power supply, combined with NMOS transistor PQ2 to control the switching circuit.
It achieves rapid turn-off of MOSFETs, avoids damage, increases current withstand capability, reduces circuit power consumption and cost, and has strong practicality and stability.
Smart Images
Figure CN223584157U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to power supply control technical field, especially increase MOS pipe switching system power supply's circuit of the ability of taking load. BACKGROUND
[0002] MOS pipe is composed of three electrodes of grid G, source S and drain D and the insulating layer between grid and source, and its working principle is based on electric field effect, that is, by controlling the grid voltage to change the electric field between grid and source, thereby controlling the current through the source and drain. When the grid voltage exceeds a certain threshold, a conductive channel will be formed on the semiconductor surface below the grid, allowing the source and drain to conduct; on the contrary, when the grid voltage is lower than the threshold, the channel disappears, and the source and drain are cut off; MOS pipe has the characteristics of high input resistance and fast switching speed, and is widely used as a system electric switching element.
[0003] In the prior art, due to the weak current resistance of MOS pipe, when the MOS pipe is turned off under a large load, it may exceed the safe operating area SOA of the MOS pipe; resulting in MOS pipe failure; at this time, a MOS pipe with larger continuous drain ID, larger maximum dissipation power PD, smaller on-resistance RDS and larger safe operating area SOA needs to be selected to ensure the stability of the circuit, which will increase the overall power consumption and cost of the circuit when opening or turning off the circuit; therefore, a circuit for improving the load capacity of MOS pipe is proposed to solve the above problems. UTILITY MODEL CONTENTS
[0004] The utility model discloses a kind of circuits for increasing the load capacity of MOS pipe switching system power supply, which can well solve the above problems.
[0005] To achieve the above requirements, the technical scheme adopted by the utility model to solve its technical problems is as follows:
[0006] A circuit for increasing the load capacity of MOS pipe switching system power supply is provided, which includes a power supply SA, a PMOS pipe PQ1, a resistor R1, a resistor R2, a diode D1 and a switch circuit for controlling the turn-off of the PMOS pipe PQ1. The source and drain of the PMOS pipe PQ1 are connected to two power supplies SA with the same voltage, and the gate is connected to the resistor R1. The end of the resistor R1 away from the PMOS pipe PQ1 is connected to the switch circuit. The resistor R1 is connected in parallel with the diode D1, the input end of the diode D1 is connected to the resistor R2, and the end of the resistor R2 away from the diode D1 is connected to the power supply SA. The output end of the diode D1 is connected to the gate of the PMOS pipe PQ1.
[0007] The utility model discloses a kind of circuit of the load capacity of MOS tube switching system power supply is increased, wherein, switch circuit includes NMOS;NMOS tube PQ2's source electrode is grounded, drain electrode is connected with resistance R1 far from the one end of PMOS tube PQ1;The NMOS tube PQ2 is controlled to open and break by SYS_PWR_ON signal.
[0008] The utility model discloses a kind of circuit of the load capacity of MOS tube switching system power supply is increased, wherein, the source electrode and gate electrode between PMOS tube PQ1 are also connected with capacitor C1, the one end of capacitor C1 far from PMOS tube is connected with resistance R1 far from the one end of switch circuit.
[0009] The utility model discloses a kind of circuit of the load capacity of MOS tube switching system power supply is increased, wherein, power supply SA is also connected with resistance R3, resistance R3 is parallelly connected with PMOS tube PQ1 and capacitor C1.
[0010] The utility model discloses a kind of circuit of the load capacity of MOS tube switching system power supply is increased, wherein, the drain electrode and gate electrode between PMOS tube PQ1 are connected with capacitor C2, the one end of capacitor C2 far from the drain electrode of PQ1 is connected with resistance R1 far from the one end of switch circuit.
[0011] The utility model discloses a kind of circuit of the load capacity of MOS tube switching system power supply is increased, wherein, power supply SA is also connected with capacitor C3, the one end of capacitor C3 far from power supply SA is grounded.
[0012] The utility model discloses a kind of circuit of the load capacity of MOS tube switching system power supply is increased, wherein, power supply SA is also connected with capacitor C4, the one end of capacitor C4 far from power supply SA is grounded;Capacitor C4 is parallelly connected with capacitor C3.
[0013] The utility model has the advantages that:
[0014] The utility model provides a kind of circuit of the load capacity of MOS tube switching system power supply is increased, there are two states of conduction and shut-off, when switch circuit is turned on, the gate voltage of PQ1 is lower than the source electrode voltage, PQ1 is turned on, and load operation is started.When shutting off in the case of very large load operation, because resistance R2 and diode D1 are additionally provided, when switch circuit is turned off, power supply SA is rapidly charged to the G pole of PMOS tube PQ1 through resistance R2 diode D1, so that the G pole voltage of PMOS tube PQ1 is rapidly raised, so that the cut-off state is quickly reached;While realizing fast shut-off, it is effectively avoided that SOA region of PMOS tube is exceeded and thus PMOS tube PQ1 is damaged, the current resistance of MOS tube is increased;And the connecting structure of the utility model is simple, low in cost, effectively reduce the overall power consumption and cost of circuit when opening or shutting off circuit, with strong practicability. BRIEF DESCRIPTION OF DRAWINGS
[0015] In order to more clearly illustrate the technical solutions of the embodiments of the present application or the prior art, the present application will be further described below with reference to the drawings and embodiments. The drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained without creative labor on the premise that they do not pay creative labor:
[0016] Figure 1 is a circuit diagram of a circuit for increasing the load capacity of the MOS tube switching system during power supply.
[0017] In the figure: 1, switching circuit. DETAILED DESCRIPTION
[0018] The terms "first", "second", "third", and "fourth" and the like in the description, claims, and drawings of the present application are used to distinguish different objects, and are not used to describe a particular order. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but can optionally include steps or units not listed, or can optionally include other steps or units inherent to the process, method, product, or device.
[0019] In this paper, the "embodiment" means that the specific features, structures or characteristics described in conjunction with the embodiment can be included in at least one embodiment of the application. The phrase appears in the specification at various places does not necessarily refer to the same embodiment, nor is it independent or alternative to other embodiments. Those skilled in the art explicitly and implicitly understand that the embodiments described herein can be combined with other embodiments.
[0020] "Multiple" means two or more. "And / or" describes the relationship between the associated objects, which means that there can be three relationships, for example, A and / or B, which can mean that A exists alone, A and B exist together, and B exists alone. The character " / " generally represents that the associated objects before and after are a "or" relationship.
[0021] Moreover, the terms "up, down, left, right, upper end, lower end, longitudinal" and the like indicating the orientation are all based on the attitude position of the device or equipment described in the present scheme during normal use.
[0022] In order to make the purpose, technical scheme and advantages of the embodiments of the utility model clearer, the technical scheme in the embodiments of the utility model will be described clearly and completely below, obviously, the described embodiments are part of the embodiments of the utility model, rather than all the embodiments. Based on the embodiments of the utility model, all other embodiments obtained by the person skilled in the art without creative labor belong to the protection scope of the utility model.
[0023] The circuit for increasing the load capacity of the MOS tube switching system during power supply of the preferred embodiment of the utility model, as shown in Figure 1 The source and drain of the PMOS tube PQ1 are connected with two power supplies SA with the same voltage respectively, and the gate is connected with the resistor R1;The end of the resistor R1 away from the PMOS tube PQ1 is connected with the switch circuit;The resistor R1 is connected with the diode D1 in parallel, the input end of the diode D1 is connected with the resistor R2, and the end of the resistor R2 away from the diode D1 is connected with the power supply SA;The output end of the diode D1 is connected with the gate of the PMOS tube PQ1.
[0024] The circuit for increasing the load capacity of the MOS tube switching system during power supply of the utility model has two states of conduction and shutdown, when the switch circuit is turned on, the gate voltage of PQ1 is lower than the source voltage, PQ1 is turned on, and the load operation starts.When shutting down in the case of a large load operation, because the resistor R2 and the diode D1 are added, when the switch circuit is turned off, the power supply SA charges the G pole of the PMOS tube PQ1 through the resistor R2 and the diode D1, so that the G pole voltage of the PMOS tube PQ1 rises rapidly, thereby reaching the off state quickly;While realizing the rapid shutdown, the SOA area of the PMOS tube is effectively avoided to damage the PMOS tube PQ1, the current resistance of the MOS tube is increased;And the connection structure of the utility model is simple, the cost is low, the overall power consumption and cost of the circuit are effectively reduced, and the utility model has strong practicability.
[0025] In this embodiment, the switch circuit includes NMOS tube PQ2; the source of the NMOS tube PQ2 is connected to the ground, the drain of the NMOS tube PQ2 is connected to one end of the resistor R1 away from the PMOS tube PQ1; and the opening and closing of PQ2 is controlled by the SYS_PWR_ON signal; in the shutdown state, the voltage signal received by the gate of PQ2 is a low voltage signal lower than the voltage of the power supply SA, at this time, the NMOS tube PQ1 and the PMOS tube PQ2 are both cut off; when starting, the gate of PQ2 receives the signal SYS_PWR_ON higher than the power supply SA, so that the voltage difference between the gate and the source of the NMOS tube PQ2 is greater than the threshold voltage, the NMOS tube PQ2 is turned on, the power supply SA forms a loop through R3 and R1 to the ground, so that the gate voltage of the PMOS tube PQ1 reaches below VGSth, and the PMOS tube PQ1 is turned on.
[0026] In this embodiment, the capacitor C1 is further connected between the source and the gate of the PMOS tube PQ1, one end of the capacitor C1 away from the PMOS tube is connected to one end of the resistor R1 away from the switch circuit; the capacitor C1 can store charges, and when the gate voltage of the PMOS tube appears transient change, C2 can provide or absorb charges, so as to smooth the fluctuation of the gate voltage.
[0027] In this embodiment, the power supply SA is further connected with the resistor R3, and the resistor R3 is connected in parallel with the PMOS tube PQ1 and the capacitor C1; the resistor R3 can limit the current passing through the PMOS tube PQ1, when the current in the circuit suddenly changes, R3 can limit such transient current, protect the PMOS tube PQ1, and divide voltage for the PMOS tube PQ1, reduce the voltage stress between the two ends of the PMOS tube.
[0028] In this embodiment, the capacitor C2 is connected between the drain and the gate of the PMOS tube PQ1, one end of the capacitor C2 away from the drain of PQ1 is connected to one end of the resistor R1 away from the switch circuit; the capacitance of the capacitor C2 is preferably 0.1uf, and is used for slow starting circuit; when the MOS tube switches from the on state to the off state, C2 can slow down the speed of voltage rise, and reduce the current impact when the circuit starts.
[0029] In this embodiment, the power supply SA is further connected with the capacitor C3, and one end of the capacitor C3 away from the power supply SA is connected to the ground; the capacitor C3 is a front-end bypass capacitor, and the capacitance is preferably 0.1uF; has the functions of ensuring the stability of the power supply voltage and the stability of the switching, and charging the PMOS tube PQ1 in the moment of the drop of the power supply voltage, so as to ensure that the circuit can still work normally when the load changes, and improve the performance and reliability of the whole circuit.
[0030] In the embodiment, the power supply SA is further connected with a capacitor C4, the capacitance of the capacitor C4 is preferably 1nF, and one end of the capacitor C4 away from the power supply SA is grounded; the capacitor C4 is connected in parallel with the capacitor C3; the C4 can reduce the fluctuation of the power supply voltage as a front-end bypass capacitor, and is used as energy storage to prevent the PMOS tube PQ1 from being affected by the moment of power supply voltage drop; at the same time, the parallel connection of the capacitors C3 and C4 with different capacitances can cover different frequency noises, realize decoupling and filtering effect in a wider frequency range, and quickly respond to transient current.
[0031] It should be understood that, for those skilled in the art, improvements or changes can be made according to the above description, and all these improvements and changes shall belong to the protection scope of the appended claims of the utility model.
Claims
1. A circuit for increasing the load-carrying capacity of a MOSFET switching system during power supply, characterized in that, The device includes a power supply SA, a PMOS transistor PQ1, resistors R1 and R2, a diode D1, and a switching circuit for controlling the PMOS transistor PQ1 to turn off. The source and drain of the PMOS transistor PQ1 are connected to two power supplies SA with the same voltage, and the gate is connected to the resistor R1. The end of the resistor R1 away from the PMOS transistor PQ1 is connected to the switching circuit. The resistor R1 is connected in parallel with the diode D1. The input terminal of the diode D1 is connected to the resistor R2, and the end of the resistor R2 away from the diode D1 is connected to the power supply SA. The output terminal of the diode D1 is connected to the gate of the PMOS transistor PQ1.
2. The circuit for increasing the load-carrying capacity of a MOS transistor switching system according to claim 1, characterized in that, The switching circuit includes an NMOS transistor; the source of the NMOS transistor PQ2 is grounded, and its drain is connected to the end of the resistor R1 away from the PMOS transistor PQ1; the NMOS transistor PQ2 is turned on and off by the SYS_PWR_ON signal.
3. The circuit for increasing the load-carrying capacity of a MOS transistor switching system when power supply is applied according to claim 1, characterized in that, A capacitor C1 is also connected between the source and gate of the PMOS transistor PQ1. The end of the capacitor C1 away from the PMOS transistor is connected to the end of the resistor R1 away from the switching circuit.
4. The circuit for increasing the load-carrying capacity of a MOS transistor switching system according to claim 3, characterized in that, The power supply SA is also connected to a resistor R3, which is connected in parallel with the PMOS transistor PQ1 and the capacitor C1.
5. The circuit for increasing the load-carrying capacity of a MOS transistor switching system according to claim 1, characterized in that, A capacitor C2 is connected between the drain and gate of the PMOS transistor PQ1. The end of the capacitor C2 away from the drain of PQ1 is connected to the end of the resistor R1 away from the switching circuit.
6. The circuit for increasing the load-carrying capacity of a MOS transistor switching system according to claim 1, characterized in that, The power supply SA is also connected to a capacitor C3, with the end of the capacitor C3 furthest from the power supply SA grounded.
7. The circuit for increasing the load-carrying capacity of a MOS transistor switching system according to claim 1, characterized in that, The power supply SA is also connected to a capacitor C4, with the end of the capacitor C4 furthest from the power supply SA grounded; the capacitor C4 is connected in parallel with the capacitor C3.