Chip testing system
By introducing a first signal source and a switch array into the chip testing system, the electrical connection detection between the chip socket, the chip, and the testing environment can be achieved, solving the problem that existing systems cannot detect contact conditions and improving the accuracy and efficiency of testing.
Patent Information
- Application Number
- CN202422667831.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-01
- Publication Date
- 2025-11-25
- Estimated Expiration
- 2034-11-01
AI Technical Summary
Existing chip testing systems cannot effectively detect the contact between the chip socket, the chip, and the testing environment, affecting the effectiveness and accuracy of the test.
A chip testing system is designed, comprising at least one first signal source and a switch array. The electrical connection between the chip socket and the chip and the test environment is realized by switching the switch array, and the contact condition is evaluated by detecting voltage and current.
It improves the testing experience and efficiency for testers, ensures the detection of contact between the chip socket, the chip, and the test environment, and enhances the accuracy and efficiency of testing.
Smart Images
Figure CN223597823U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to the chip test field, concretely relates to a chip test system. BACKGROUND
[0002] The final test (FT) of the chip is very important to ensure the quality and reliability of the chip. At present, the final test of the chip will install the chip to be tested on the chip socket (Test Socket) first, so as to establish the electrical connection between the chip and the test environment by the chip socket, and then the chip is tested.
[0003] In the process of testing the chip, in order to ensure the effectiveness and accuracy of the test, the tester usually needs to pay attention to the contact between the chip socket, the chip and the test environment. However, the existing chip test system only has the chip test function, and does not have the ability to detect the contact between the chip socket, the chip and the test environment. SUMMARY
[0004] Therefore, the utility model discloses a chip test system to realize chip test and contact detection between chip socket, chip and test environment simultaneously, so as to improve the test experience and test efficiency of the tester.
[0005] In the first aspect, the utility model discloses a chip test system, and the system comprises:
[0006] At least one first signal source, the first signal source includes the first drive end and the first sensing end that are independent of each other, the first drive end provides drive current, and the first sensing end detects voltage;
[0007] Chip socket, the chip socket bears the chip to be tested, and the chip to be tested includes at least one group of first pins and second pins;
[0008] At least one switch array is connected between the corresponding first signal source and the chip socket, the first drive end is electrically connected with the chip socket through the switching of the switch array, and the first sensing end is electrically connected with the chip socket through the switching of the switch array.
[0009] In some embodiments, the chip socket includes a first gold finger, a second gold finger, a third gold finger and a fourth gold finger, each gold finger is connected with the switch array to form a second endpoint, each gold finger is connected with a pin to form a first endpoint, the first endpoint of the first gold finger and the first endpoint of the second gold finger are connected with the first pin, and the first endpoint of the third gold finger and the first endpoint of the fourth gold finger are connected with the second pin.
[0010] In some embodiments, the switch array comprises: a first switch, a second switch, a third switch and a fourth switch;
[0011] The first switch controls the first driving end positive electrode to be electrically connected with the second end point of the first gold finger or the second end point of the third gold finger;
[0012] The second switch controls the first driving end negative electrode to be electrically connected with the second end point of the second gold finger or the second end point of the fourth gold finger;
[0013] The third switch controls the first sensing end positive electrode to be electrically connected with the second end point of the first gold finger, the second end point of the second gold finger or the second end point of the third gold finger;
[0014] The fourth switch controls the first sensing end negative electrode to be electrically connected with the second end point of the second gold finger, the second end point of the third gold finger or the second end point of the fourth gold finger.
[0015] In some embodiments, the first switch electrically connects the positive electrode of the first driving end with the second end point of the first gold finger,
[0016] The second switch electrically connects the negative electrode of the first driving end with the second end point of the fourth gold finger,
[0017] The third switch electrically connects the positive electrode of the first sensing end with the second end point of the second gold finger,
[0018] The fourth switch electrically connects the negative electrode of the first sensing end with the second end point of the third gold finger,
[0019] An electric current path is formed between the first driving end positive electrode, the first switch, the first gold finger, the first pin, the chip to be tested, the second pin, the fourth gold finger, the second switch and the first driving end negative electrode, and the system tests the chip to be tested.
[0020] In some embodiments, the first switch electrically connects the positive electrode of the first driving end with the second end point of the first gold finger,
[0021] The second switch electrically connects the negative electrode of the first driving end with the second end point of the second gold finger,
[0022] The third switch electrically connects the positive electrode of the first sensing end with the second end point of the first gold finger,
[0023] The fourth switch electrically connects the negative electrode of the first sensing end with the second end point of the second gold finger,
[0024] A current path is formed between the first drive end positive, the first switch, the first gold finger, the first pin, the second gold finger, the second switch and the first drive end negative, and the system detects the contact between the first and second gold fingers and the first pin and the first drive end.
[0025] In some embodiments, the first switch electrically connects the positive of the first drive end with the second endpoint of the third gold finger,
[0026] The second switch electrically connects the negative of the first drive end with the second endpoint of the fourth gold finger,
[0027] The third switch electrically connects the positive of the first sensing end with the second endpoint of the third gold finger,
[0028] The fourth switch electrically connects the negative of the first sensing end with the second endpoint of the fourth gold finger,
[0029] A current path is formed between the first drive end positive, the first switch, the third gold finger, the second pin, the fourth gold finger, the second switch and the first drive end negative, and the system detects the contact between the third and fourth gold fingers and the second pin and the first drive end.
[0030] In some embodiments, the first signal source is N, and the switch array is N, N is a positive integer greater than 1.
[0031] In some embodiments, the first and second pins are connected to the corresponding gold fingers at the first endpoints in an overlapping manner.
[0032] In some embodiments, the drive end and the sensing end are connected to the corresponding gold fingers at the second endpoints in an overlapping manner and / or a welding manner.
[0033] The chip testing system of this embodiment includes at least one first signal source, a chip socket, and at least one switch array. The first signal source includes a first driving terminal and a first sensing terminal, which are independent of each other. The chip socket carries the chip under test (DUT), and the first pin and second pin of the DUT are respectively connected to the first endpoints of their corresponding gold fingers. The switch array is disposed between the positive and negative terminals of the first driving terminal and the first sensing terminal and the second endpoints of each gold finger. The first driving terminal is electrically connected to the chip socket through switching of the switch array, and the first sensing terminal is also electrically connected to the chip socket through switching of the switch array. The chip testing system of this embodiment can perform chip testing and detect the contact between the chip socket, the chip, and the test environment, thereby improving the testing experience and efficiency for testers. Attached Figure Description
[0034] The above and other objects, features and advantages of the present invention will become clearer from the following description of embodiments of the present invention with reference to the accompanying drawings, in which:
[0035] Figure 1 This is a schematic diagram of a chip testing system according to an embodiment of the present invention;
[0036] Figure 2 This is a schematic diagram of the chip socket for mounting the chip under test according to an embodiment of the present invention;
[0037] Figure 3 This is a circuit connection diagram of the chip testing system according to an embodiment of the present invention when the switch array is in the first state;
[0038] Figure 4 and Figure 5 This is a circuit connection diagram of the chip testing system according to an embodiment of the present invention when the switch array is in the second state;
[0039] Figure 6 This is a schematic diagram of a switch array according to an embodiment of the present invention;
[0040] Figure 7 This is a circuit connection diagram of the chip testing system according to an embodiment of the present invention when the switch array is in the second state. Detailed Implementation
[0041] The present application is described below based on embodiments, but it is not limited to these embodiments. In the detailed description of the present application below, certain specific details are described in detail. Those skilled in the art can fully understand the present application without these details. To avoid obscuring the substance of the present application, well-known methods, processes, flows, elements, and circuits are not described in detail.
[0042] In addition, those of ordinary skill in the art will appreciate that the drawings provided herein are for illustrative purposes and are not necessarily drawn to scale.
[0043] Unless specifically stated otherwise, and as can be apparent from the preceding description and disclosed non-limiting embodiments, the terms "mounting", "connected", "connecting", "fixed", and the like, refer to an arrangement in which components are coupled to each other either directly or indirectly, mechanically or electrically, fixed or detachable, and can be understood in context by those of ordinary skill in the art.
[0044] For ease of description, spatially relative terms such as "inner", "outer", "beneath", "below", "lower", "above", "upper", and the like, can be used herein for the purpose of describing the example embodiment of the device as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientations depicted in the figures. For example, if the device in the figures is turned over, then the elements described as being "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the example term "below" can encompass both an orientation of above and below. The device can be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein should be interpreted accordingly.
[0045] Unless the context clearly requires otherwise, throughout the description, the words "comprise", "comprising", and the like are to be construed in an inclusive sense as opposed to an exclusive or exhaustive sense; that is to say, in the sense of "including, but not limited to".
[0046] In the description of the present application, it should be understood that the terms "first", "second" and the like are used to describe various elements, but are not used to indicate or imply relative importance. In addition, in the description of the present application, unless otherwise stated, the meaning of "a plurality of" is two or more.
[0047] Figure 1 The schematic diagram of the chip test system of the utility model embodiment is shown in the figure. Figure 1 As shown in the figure, the chip test system comprises a first signal source 11, a chip socket 12 and a switch array 13.
[0048] The first signal source 11 comprises a first driving end 111 and a first sensing end 112 which are independent of each other. The first driving end 111 provides a driving current. The first sensing end 112 detects a voltage. It should be understood that, by making the port for providing a driving current and the port for detecting a voltage independent of each other, the embodiment can ensure that, when the first driving end 111 provides a driving current, the lead resistance in a current providing loop formed by the first driving end 111 and the test circuit do not affect the measurement result of the first sensing end 112, so that the first sensing end 112 can measure more accurate voltage value data.
[0049] The chip socket 12 carries a to-be-tested chip 14. The to-be-tested chip 14 can be any type of chip, and the type of the to-be-tested chip 14 is not limited in the application. Further, in the embodiment, the to-be-tested chip 14 has a first pin 141 and a second pin 142. While carrying the to-be-tested chip 14, the chip socket 12 can also establish an electrical connection between the pins of the to-be-tested chip 14 and a test environment. The first pin and the second pin are any group of pins of the to-be-tested chip that can form a current loop. For example, the first pin can be a power supply pin, and the second pin can be a ground pin.
[0050] Optionally, the chip socket 12 can comprise a plurality of gold fingers. Each gold finger can be a sheet-shaped metal with electrical conductivity. When the to-be-tested chip 14 is carried at a corresponding position of the chip socket 12, the chip socket 12 can establish an electrical connection between each pin of the to-be-tested chip 14 and the test environment through the plurality of gold fingers. Further, the chip socket 12 can comprise a first gold finger 121, a second gold finger 122, a third gold finger 123, and a fourth gold finger 124. Each gold finger can be connected with a pin to form a first end point. Further, the first end point of the first gold finger 121 and the first end point of the second gold finger 122 are electrically connected with the first pin 141, and the first end point of the third gold finger 123 and the first end point of the fourth gold finger 124 are electrically connected with the second pin 142. It should be understood that, Figure 1Only the case that the chip under test has a set of first pins and second pins is shown, but in actual application process, the chip under test can also have multiple sets of first pins and second pins. Relatively speaking, when the chip under test has multiple sets of first pins and second pins, the chip socket 12 can also include more gold fingers to be electrically connected with the pins of the chip under test 14 respectively. Meanwhile, it is intended to be explained that in the embodiment, the first signal source 11 is combined with a test circuit (the test circuit can be composed of resistors, capacitors, inductors or other electronic elements, and the specific structure of the test circuit is not limited in the application) to form a test environment for testing the chip under test 14. Further, the test circuit can be arranged between the positive and negative poles of the first driving end and the first sensing end and the second end points of the gold fingers according to actual conditions.
[0051] The switch array 13 can be a part of the first signal source 11 or an independent structure. The switch array 13 can be arranged between the positive and negative poles of the first driving end 111 and the first sensing end 112 and the second end points of the gold fingers. It should be understood that each gold finger can also be connected with the switch array 13 to form a second end point.
[0052] In the embodiment, the first driving end 111 is electrically connected with the chip socket 12 through switching of the switch array 13, and the first sensing end 112 is electrically connected with the chip socket 12 through switching of the switch array 13, so as to test the chip under test 14 or detect the contact condition between the chip socket 12 and the chip under test 14 and the first signal source 11. Thus, the chip test system in the embodiment of the utility model realizes chip testing and detection of the contact condition between the chip socket and the chip and the test environment, thereby improving the test experience and test efficiency of the tester.
[0053] Exemplarily, the chip socket can include Figure 2 the chip carrier 22, the first pin 221, the second pin 222, the third gold finger 223 and the fourth gold finger 224 in the chip socket.
[0054] Figure 2 The structure schematic diagram for installing the chip under test for the chip socket of the embodiment of the utility model is shown in the figure. Figure 2 As shown in the figure, the chip under test 21 is fixedly installed on the chip carrier 22. The chip under test 21 has first pins 211 and second pins 212. Further, first end points 225 can be respectively formed on each gold finger. Further, when the chip under test 21 is fixed on the chip socket 22, the first pins 211 can be respectively connected with the first end points 225 of the first gold finger 221 and the second gold finger 222, and the second pins 212 can be respectively connected with the first end points 225 of the third gold finger 223 and the fourth gold finger 224.
[0055] Further, a second end point 226 can be formed on each gold finger, which is similar to the first end point 225, and can be used to establish the connection between the gold finger and a test environment (not shown in the figure) composed of a signal source and a test circuit.
[0056] Thus, the embodiment can connect the chip under test and the test environment through the gold fingers to establish the electrical connection between the chip under test and the test environment. Figure 2 The structure shown is a schematic diagram of the upper and lower lapping of the gold fingers to the chip pins when the gold fingers are sheet-shaped metal, and the application is not limited to this case.
[0057] Optionally, in the embodiment, the switch array can have a first state and a second state.
[0058] Figure 3 The circuit connection diagram of the chip test system of the embodiment of the application when the switch array is in the first state is shown. Figure 3 The circuit connection diagram shown is a simplified schematic diagram. Figure 3 The content shown is not limited to the circuit connection diagram of the chip test system when the switch array is in the first state.
[0059] As Figure 3As shown in the circuit connection diagram, the switch array in the first state can control the positive pole 311 and the negative pole 314 of the first driving end to be electrically connected with the second end point of the first gold finger 321 and the fourth gold finger 324 respectively. Thus, the switch array in the first state can connect the positive pole and the negative pole of the first driving end of the first signal source with the first pin 331 and the second pin 332, so as to form a current path between the positive pole of the first driving end, the first gold finger, the first pin, the inside of the chip under test 33, the second pin, the fourth gold finger and the negative pole of the first driving end. At the same time, the switch array in the first state can also control the positive pole 312 and the negative pole 313 of the first sensing end of the first signal source to be electrically connected with the second end point of the second gold finger 322 and the third gold finger 323 respectively, so as to connect the positive pole and the negative pole of the first sensing end of the first signal source with the first pin 331 and the second pin 332, thereby measuring the relevant electrical parameters of the chip under test 33.
[0060] It should be understood that when the relevant parameters of the chip under test 33 are tested, the first driving end of the first signal source can provide a supply current that can meet the test requirements for the chip under test 33 under the control of the tester, and the present application does not limit this.
[0061] Figure 4 and Figure 5 The circuit connection diagram of the chip test system of the embodiment of the present application when the switch array is in the second state. It is intended to facilitate understanding, Figure 4 and Figure 5 The circuit connection diagram shown is a simplified schematic diagram. In actual application, the circuit connection diagram of the chip test system when the switch array is in the second state is not limited to Figure 4 and Figure 5 the content shown.
[0062] As Figure 4 shown, the switch array in the second state can control the positive pole 411 and the negative pole 413 of the first driving end to be electrically connected with the second end point of the first gold finger 421 and the second gold finger 422 respectively. Thus, the switch array in the second state can connect the positive pole and the negative pole of the first driving end of the first signal source with the first pin 431, so as to form a current path between the positive pole of the first driving end, the first gold finger 421, the first pin 431, the second gold finger 422 and the negative pole of the first driving end. At the same time, the switch array in the second state can also control the positive pole 412 and the negative pole 414 of the first sensing end of the first signal source to be electrically connected with the second end of the first gold finger 421 and the second gold finger 422, so that the first sensing end measures the voltage value of the first gold finger 421 and the second gold finger 422 at the second end point.
[0063] It should be understood that during contact detection, the first driving terminal provides a constant current with a preset current value. Further, based on the voltage values of the first gold finger 421 and the second gold finger 422 at the second endpoint detected by the first sensing terminal, this embodiment can calculate the voltage drop (the voltage drop is the difference between the two voltage values) resulting from the contact resistance of the first gold finger 421 and the second gold finger 422 at the first and second endpoints and the internal resistance of the first gold finger 421 and the second gold finger 422. Then, based on the calculated voltage drop and the preset current value, this embodiment can calculate the sum of the resistances of the first gold finger 421 and the second gold finger 422 at the first and second endpoints and the internal resistances of the first gold finger 421 and the second gold finger 422 (the sum of resistances is the quotient of the voltage drop to the preset current value). Afterwards, the tester can compare this sum of resistances with a specific resistance threshold (e.g., 2 ohms) to determine whether the contact between the chip socket gold fingers and the first signal source and the pins of the chip under test is good.
[0064] Or, such as Figure 5 As shown, the switch array in the second state can also control the positive terminal 511 and negative terminal 513 of the first driving terminal to be electrically connected to the second terminals of the third gold finger 521 and the fourth gold finger 522, respectively. Thus, the switch array in the second state can connect the positive and negative terminals of the first driving terminal of the first signal source to the second pin 531, forming a current path between the positive terminal of the first driving terminal, the third gold finger 521, the second pin 531, the fourth gold finger 522, and the negative terminal of the first driving terminal. Simultaneously, the switch array in the second state can also control the positive terminal 512 and negative terminal 514 of the first sensing terminal of the first signal source to be electrically connected to the second terminals of the third gold finger 521 and the fourth gold finger 522, respectively, so that the first sensing terminal measures the voltage values of the third gold finger 521 and the fourth gold finger 522 at their second terminals.
[0065] It should be understood that when the contact condition is detected, the first driving end provides a constant current with a preset current value. Further, according to the voltage values of the third gold finger 521 and the fourth gold finger 522 at the second end point detected by the first sensing end, the embodiment can calculate the contact resistance of the third gold finger 521 and the fourth gold finger 522 at the first end point and the second end point and the voltage drop (the voltage drop is the difference between the two voltage values) generated by the internal resistance of the third gold finger 521 and the fourth gold finger 522. Further, according to the calculated voltage drop and the preset current value, the embodiment can calculate the resistance sum (the resistance sum is the quotient of the voltage drop and the preset current value) of the contact resistance of the third gold finger 521 and the fourth gold finger 522 at the first end point and the second end point and the internal resistance of the third gold finger 521 and the fourth gold finger 522. Then, the tester can compare the resistance sum with a specific resistance threshold (for example, 2 ohms) to determine whether the contact between the chip socket gold finger and the first signal source and the to-be-tested chip pin is good.
[0066] It should be understood that the switch array in the second state can realize the connection circuit as shown in Figure 4 , or the connection circuit as shown in Figure 5 , which can be selected and set by the tester, and the present application does not limit this.
[0067] Optionally, in order to realize the connection circuit as shown in Figure 3 , Figure 4 and Figure 5 , the switch array can include a plurality of switches arranged between the positive and negative poles of the first driving end and the second ends of the gold fingers, and between the positive and negative poles of the first sensing end and the second ends of the gold fingers.
[0068] Figure 6 is a schematic view of the switch array of the embodiment of the utility model. As shown in Figure 6 , the switch array 61 can include a first switch 611, a second switch 612, a third switch 613 and a fourth switch 614.
[0069] The first switch 611 is arranged between the positive pole 621 of the first driving end and the second end points of the first gold finger 631 and the third gold finger 633. The second switch 612 is arranged between the negative pole 622 of the first driving end and the second end points of the second gold finger 632 and the fourth gold finger 634. The third switch 613 is arranged between the positive pole 623 of the first sensing end and the second end points of the first gold finger 631, the second gold finger 632 and the third gold finger 633. The fourth switch 614 is arranged between the negative pole 624 of the first sensing end and the second end points of the second gold finger 632, the third gold finger 633 and the fourth gold finger 634.
[0070] Further, when the switch array 61 is in the first state, the first switch 611 can control the positive pole 621 of the first driving end to be electrically connected with the second end point of the first gold finger 631, the second switch 612 can control the negative pole 622 of the first driving end to be electrically connected with the second end point of the fourth gold finger 634, the third switch 613 can control the positive pole 623 of the first sensing end to be electrically connected with the second end point of the second gold finger 632, and the fourth switch 614 can control the negative pole 624 of the first sensing end to be electrically connected with the second end point of the third gold finger 633. Thus, the connection circuit shown in FIG. 6A can be obtained. Figure 3
[0071] When the switch array 61 is in the second state, the first switch 611 can control the positive pole 621 of the first driving end to be electrically connected with the second end point of the first gold finger 631, the second switch 612 can control the negative pole 622 of the first driving end to be electrically connected with the second end point of the second gold finger 632, the third switch 613 can control the positive pole 623 of the first sensing end to be electrically connected with the second end point of the first gold finger 631, and the fourth switch 614 can control the negative pole 624 of the first sensing end to be electrically connected with the second end point of the second gold finger 632. Thus, the connection circuit shown in FIG. 6B can be obtained. Figure 4
[0072] Alternatively, when the switch array 61 is in the second state, the first switch 611 can also control the positive pole 621 of the first driving end to be electrically connected with the second end point of the third gold finger 633, the second switch 612 can control the negative pole 622 of the first driving end to be electrically connected with the second end point of the fourth gold finger 634, the third switch 613 can control the positive pole 623 of the first sensing end to be electrically connected with the second end point of the third gold finger 633, and the fourth switch 614 can control the negative pole 624 of the first sensing end to be electrically connected with the second end point of the fourth gold finger 634. Thus, the connection circuit shown in FIG. 6C can be obtained. Figure 5
[0073] It should be understood that, in order to conveniently show the connection relationship between the switches and the gold fingers, in the chip test system shown in FIG. 6, the same letters are marked on the right side of the switches capable of establishing electrical connection and on the left side of the gold fingers. Meanwhile, it is intended to be explained that one switch can be connected with the second end of only one gold finger at the same time, and the specific connection object of each switch can depend on the state of the switch array and the setting of the tester. Figure 6
[0074] Optionally, in the embodiment, the switches used can be relays or single-pole multi-throw switches, and the present application does not limit this.
[0075] Optionally, in some embodiments, in order to be able to simultaneously detect the contact conditions of the first and second gold fingers at the first and second end points and the contact conditions of the third and fourth gold fingers at the first and second end points, the chip testing system can further comprise a second signal source. Similar to the first signal source, the second signal source can comprise a second driving end and a second sensing end which are independent of each other. The second driving end provides a driving current and the second sensing end detects a voltage.
[0076] Further, the switch array can also be arranged between the positive and negative poles of the second driving end and the second sensing end and the second end points of the gold fingers. The switch array in the second state can also control the positive and negative poles of the first driving end, the first sensing end, the second driving end and the second sensing end to be electrically connected with the second ends of different gold fingers respectively, so that the tester can simultaneously detect the contact conditions of the first and second gold fingers at the first and second end points and the contact conditions of the third and fourth gold fingers at the first and second end points.
[0077] Figure 7 The circuit connection diagram of the chip testing system of the embodiment of the utility model when the switch array is in the second state. It is intended to explain that the circuit connection diagram shown in the figure is a simplified schematic diagram. In actual application, the circuit connection diagram of the chip testing system when the switch array is in the second state is not limited to the content shown in the figure. Figure 7 Figure 7
[0078] As Figure 7 As shown, the switch array in the second state can control the positive terminal 711 and negative terminal 713 of the first driving terminal to be electrically connected to the second terminals of the first gold finger 721 and the second gold finger 722, respectively, and control the positive terminal 715 and negative terminal 717 of the second driving terminal to be electrically connected to the second terminals of the third gold finger 723 and the fourth gold finger 724, respectively. Thus, in this embodiment, a current path can be simultaneously formed between the first driving terminal positive terminal, the first gold finger, the first pin, the second gold finger, and the first driving terminal negative terminal, and between the second driving terminal positive terminal, the third gold finger, the second pin, the fourth gold finger, and the second driving terminal negative terminal. Simultaneously, the switch array in the second state can also control the positive terminal 712 and negative terminal 714 of the first sensing terminal to be electrically connected to the second terminals of the first gold finger 721 and the second gold finger 722, respectively, and control the positive terminal 716 and negative terminal 718 of the second sensing terminal to be electrically connected to the second terminals of the third gold finger 723 and the fourth gold finger 724, respectively. Therefore, this embodiment enables the first sensing end and the second sensing end to measure the voltage values of the first gold finger 721 and the second gold finger 722 at the second terminal, as well as the voltage values of the third gold finger 723 and the fourth gold finger 724 at the second terminal, respectively.
[0079] It should be understood that, similar to the method for determining the total resistance in the above embodiments, after acquiring the voltage value, this embodiment can calculate the sum of the contact resistance of the first gold finger 721 and the second gold finger 722 at the first and second endpoints and the sum of the internal resistances of the first gold finger 721 and the second gold finger 722, and the sum of the contact resistance of the third gold finger 723 and the fourth gold finger 724 at the first and second endpoints and the sum of the internal resistances of the third gold finger 723 and the fourth gold finger 724, based on the acquired voltage value. Furthermore, the tester can compare each total resistance with a corresponding specific resistance threshold to determine whether the contact condition of the first and second gold fingers at the first and second endpoints, and the contact condition of the third gold finger at the first and second endpoints, is good.
[0080] Optionally, in order to achieve such Figure 7 The connection circuit shown may further include a second switch array. This second switch array may include a fifth switch, a sixth switch, a seventh switch, and an eighth switch. Further, the fifth switch may be disposed between the positive terminal of the second driving terminal and the second endpoint of the third gold finger. The sixth switch may be disposed between the negative terminal of the second driving terminal and the second endpoint of the fourth gold finger. The seventh switch may be disposed between the positive terminal of the second sensing terminal and the second endpoint of the third gold finger. The eighth switch may be disposed between the negative terminal of the second sensing terminal and the second endpoint of the fourth gold finger.
[0081] Further, when the switch array is in the second state, the fifth switch can control the positive pole of the second driving end to be electrically connected with the second end point of the third gold finger, the sixth switch can control the negative pole of the second driving end to be electrically connected with the second end point of the fourth gold finger, the seventh switch can control the positive pole of the second sensing end to be electrically connected with the second end point of the third gold finger, and the eighth switch can control the negative pole of the second sensing end to be electrically connected with the second end point of the fourth gold finger. Thus, the embodiment can constitute the connection circuit as shown in Figure 6 .
[0082] It should be understood that when the switch array is in the second state, the connection circuit as shown in Figure 4 may be realized, the connection circuit as shown in Figure 5 may be realized, and the connection circuit as shown in Figure 7 may be realized, which can be selected and set by a tester, and the present application does not limit this.
[0083] Optionally, in the embodiment, the negative pole of the second driving end can be short-circuited with the negative pole of the first driving end, and the negative pole of the second sensing end can be short-circuited with the negative pole of the first sensing end.
[0084] The chip test system in the embodiment of the present application comprises at least one first signal source, a chip socket, and at least one switch array. The first signal source comprises a first driving end and a first sensing end which are independent of each other. The chip socket carries a chip to be tested, and the first pin and the second pin of the chip to be tested are connected with the first end point of the corresponding gold finger respectively. The switch array is arranged between the positive and negative poles of the first driving end and the first sensing end and the second end point of each gold finger, the first driving end is electrically connected with the chip socket through switching of the switch array, and the first sensing end is electrically connected with the chip socket through switching of the switch array. The chip test system in the embodiment of the present application can realize chip testing and detection of the contact condition between the chip socket, the chip, and the test environment, thereby improving the test experience and test efficiency of the tester.
[0085] The above merely describes the preferred embodiments of the present application and is not used to limit the present application. For those skilled in the art, the present application can have various modifications and changes. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims
1. A chip testing system, characterized in that, The system includes: At least one first signal source, the first signal source including a first driving terminal and a first sensing terminal that are independent of each other, the first driving terminal providing driving current, and the first sensing terminal performing voltage detection; A chip socket, wherein a chip under test is mounted on the chip socket, and the chip under test includes at least one set of first pins and second pins; At least one switch array is connected between the corresponding first signal source and the chip socket, the first driving terminal is electrically connected to the chip socket through switching of the switch array, and the first sensing terminal is electrically connected to the chip socket through switching of the switch array.
2. The system according to claim 1, characterized in that, The chip socket includes a first gold finger, a second gold finger, a third gold finger, and a fourth gold finger. Each gold finger is connected to the switch array to form a second endpoint, and each gold finger is connected to a pin to form a first endpoint. The first endpoints of the first gold finger and the second gold finger are both connected to the first pin, and the first endpoints of the third gold finger and the fourth gold finger are both connected to the second pin.
3. The system according to claim 2, characterized in that, The switch array includes: a first switch, a second switch, a third switch, and a fourth switch; The first switch controls the positive terminal of the first drive terminal to be electrically connected to the second terminal of the first gold finger or the second terminal of the third gold finger; The second switch controls the first driving terminal negative terminal to be electrically connected to the second terminal of the second gold finger or the second terminal of the fourth gold finger; The third switch controls the positive terminal of the first sensing terminal to be electrically connected to the second terminal of the first gold finger, the second terminal of the second gold finger, or the second terminal of the third gold finger; The fourth switch controls the electrical connection between the negative terminal of the first sensing terminal and the second terminal of the second gold finger, the second terminal of the third gold finger, or the second terminal of the fourth gold finger.
4. The system according to claim 3, characterized in that, The first switch electrically connects the positive terminal of the first drive terminal to the second terminal of the first gold finger. The second switch electrically connects the negative terminal of the first drive terminal to the second terminal of the fourth gold finger. The third switch electrically connects the positive terminal of the first sensing terminal to the second terminal of the second gold finger. The fourth switch electrically connects the negative terminal of the first sensing terminal to the second terminal of the third gold finger. A current path is formed between the positive terminal of the first driving terminal, the first switch, the first gold finger, the first pin, the chip under test, the second pin, the fourth gold finger, the second switch, and the negative terminal of the first driving terminal, and the system tests the chip under test.
5. The system according to claim 3, characterized in that, The first switch electrically connects the positive terminal of the first drive terminal to the second terminal of the first gold finger. The second switch electrically connects the negative terminal of the first drive terminal to the second terminal of the second gold finger. The third switch electrically connects the positive terminal of the first sensing terminal to the second terminal of the first gold finger. The fourth switch electrically connects the negative terminal of the first sensing terminal to the second terminal of the second gold finger. A current path is formed between the positive terminal of the first driving terminal, the first switch, the first gold finger, the first pin, the second gold finger, the second switch, and the negative terminal of the first driving terminal. The system detects the contact between the first gold finger and the second gold finger and the first pin and the first driving terminal.
6. The system according to claim 3, characterized in that, The first switch electrically connects the positive terminal of the first drive terminal to the second terminal of the third gold finger. The second switch electrically connects the negative terminal of the first drive terminal to the second terminal of the fourth gold finger. The third switch electrically connects the positive terminal of the first sensing terminal to the second terminal of the third gold finger. The fourth switch electrically connects the negative terminal of the first sensing terminal to the second terminal of the fourth gold finger. A current path is formed between the positive terminal of the first driving terminal, the first switch, the third gold finger, the second pin, the fourth gold finger, the second switch, and the negative terminal of the first driving terminal. The system detects the contact between the third gold finger and the fourth gold finger and the second pin and the first driving terminal.
7. The system according to claim 1, characterized in that, There are N signal sources and N switch arrays, where N is a positive integer greater than 1.
8. The system according to claim 2, characterized in that, The first pin and the second pin are connected to the corresponding gold fingers at the first endpoint in an overlapping manner.
9. The system according to claim 8, characterized in that, The driving end and the sensing end are connected to the corresponding gold fingers at the second endpoint in an overlapping and / or soldering manner.