Multichannel AD conversion TTL signal conversion sampling circuit

Abstract

The utility model discloses a multichannel AD conversion TTL signal conversion sampling circuit comprising a synchronous rectification driving circuit, a constant current source charging and discharging circuit, a first analog signal sampling circuit, a second analog signal sampling circuit and an isolation chip. The input end of the synchronous rectification driving circuit is connected with a first synchronous driving signal and a second synchronous driving signal, and the output end of the synchronous rectification driving circuit is connected with the constant current source charging and discharging circuit, the first analog signal sampling circuit and the second analog signal sampling circuit. The input end of the first analog signal sampling circuit and the input end of the second analog signal sampling circuit are connected with a first analog signal and a second analog signal respectively, and the output end of the first analog signal sampling circuit and the output end of the second analog signal sampling circuit are connected with the single-chip microcomputer through the isolation chip. According to the utility model, the function of a traditional isolation signal conversion chip is realized, localization is realized, the alternative options are more, the sampling channels are more, and sampling signals are easy to adjust.

Description

TECHNICAL FIELD

[0001] The utility model relates to power supply technical field, specifically relates to a kind of multi-channel AD conversion TTL signal conversion sampling circuit. BACKGROUND

[0002] With the rapid development and wide application of digital power supply technology, the demand for isolation signal conversion chips, which are key components for connecting different potential systems and ensuring safe signal transmission, is growing at an unprecedented rate. Especially under the current global supply chain restructuring and the promotion of the localization trend, achieving independent supply of isolation signal conversion chips has become a major issue that needs to be addressed in the industry. However, the challenges faced by China in the field of isolation signal conversion chips cannot be ignored, and there are mainly the following defects:

[0003] 1. Few types and specifications, difficult to meet the diversification needs of the market, and different application scenarios have their own unique requirements for chip voltage resistance, precision, range and other performance parameters.

[0004] 2. Few channel options, limiting system flexibility, unable to meet the needs of multi-channel systems. This leads to the need to use multiple chips in parallel in situations where multiple signals need to be processed simultaneously, increasing system complexity and cost.

[0005] Therefore, in order to be compatible with the localization requirements of isolation signal conversion chips in various environments, it is urgent to design a multi-channel AD conversion TTL signal conversion sampling circuit that can meet the requirements of compatibility in all aspects and has localization replaceability. SUMMARY

[0006] In order to overcome the problems of isolation signal conversion chip localization, insufficient chip types, and few channel options in the prior art, the utility model provides a kind of multi-channel AD conversion TTL signal conversion sampling circuit.

[0007] The technical solution of the utility model is as follows:

[0008] The utility model provides a kind of multi-channel AD conversion TTL signal conversion sampling circuit, including: synchronous rectification drive circuit, constant current source charging and discharging circuit, first analog signal sampling circuit, second analog signal sampling circuit and isolation chip, the first input and the second input of the synchronous rectification drive circuit are connected with first synchronous drive signal and second synchronous drive signal respectively, the output of the synchronous rectification drive circuit is connected with the output of the constant current source charging and discharging circuit, the first input of the first analog signal sampling circuit and the first input of the second analog signal sampling circuit, the second input of the first analog signal sampling circuit and the second input of the second analog signal sampling circuit are connected with first analog signal and second analog signal respectively, the output of the first analog signal sampling circuit and the output of the second analog signal sampling circuit are connected with the first input and the second input of the isolation chip respectively, the first output and the second output of the isolation chip are connected with single-chip microcontroller.

[0009] As a preferred scheme of the utility model, the synchronous rectification drive circuit includes rectifier tube Q26-A, rectifier tube Q26-B, resistance R190, resistance R191, resistance R192, resistance R193, resistance R194, capacitor C105, capacitor C109, capacitor C116, capacitor C119, one end of the resistance R192 and one end of the capacitor C119 are connected with the first synchronous drive signal, one end of the resistance R191 and one end of the capacitor C116 are connected with the second synchronous drive signal, the first end of the rectifier tube Q26-A is connected with the other end of the resistance R192, the other end of the capacitor C119, the other end of the resistance R191, the other end of the capacitor C116, one end of the resistance R193, one end of the capacitor C105 respectively, the second end of the rectifier tube Q26-A is connected with the first end of the rectifier tube Q26-B, one end of the resistance R194, one end of the resistance R190 and one end of the capacitor C109 respectively, the other end of the resistance R194 is connected with first power voltage, the second end of the rectifier tube Q26-B is connected with the output of the constant current source charging and discharging circuit, the third end of the rectifier tube Q26-A, the third end of the rectifier tube Q26-B, the other end of the resistance R193, the other end of the capacitor C105, the other end of the resistance R190 and the other end of the capacitor C109 are all grounded.

[0010] As a preferred scheme of the utility model, the constant current source charging and discharging circuit includes switch tube Q27, operational amplifier U9-A, resistance R183, resistance R184, resistance R188, resistance R189, capacitor C94, capacitor C97, capacitor C98, the first end of switch tube Q27 is connected with one end of resistance R189 and the negative input end of operational amplifier U9-A respectively, the other end of resistance R189 is connected with one end of resistance R184 and reference voltage respectively, the second end of switch tube Q27 is connected with the output end of operational amplifier U9-A after passing through resistance R188, the third end of switch tube Q27 is connected with one end of capacitor C98, the output end of synchronous rectification drive circuit, the first input end of first analog signal sampling circuit and the first input end of second analog signal sampling circuit respectively, the positive input end of operational amplifier U9-A is connected with the other end of resistance R184, one end of capacitor C97 and the other end of resistance R184 respectively, the positive power supply end of operational amplifier U9-A is connected with one end of capacitor C94 and second power voltage respectively, the negative power supply end of operational amplifier U9-A, the other end of resistance R183, the other end of capacitor C94, the other end of capacitor C97 and the other end of capacitor C98 are grounded.

[0011] As a preferred scheme of the utility model, the first analog signal sampling circuit includes: operational amplifier U21, resistance R46, resistance R174, resistance R56, capacitor C18, capacitor C21, the positive input end of operational amplifier U21 is connected with the output end of constant current source charging and discharging circuit after passing through resistance R46, the negative input end of operational amplifier U21 is connected with the first analog signal, the positive power supply end of operational amplifier U21 is connected with one end of capacitor C18 and first power voltage respectively, the output end of operational amplifier U21 is connected with one end of resistance R56, one end of capacitor C21 and the first input end of isolation chip respectively after passing through resistance R174, the negative power supply end of operational amplifier U21, the other end of resistance R56, the other end of capacitor C18 and the other end of capacitor C21 are all grounded.

[0012] As a preferred scheme of the utility model, the second analog signal sampling circuit includes: operational amplifier U10, resistance R6, resistance R18, resistance R29, capacitor C6, capacitor C10, the positive input end of operational amplifier U10 is connected with the output end of constant current source charge-discharge circuit after passing through resistance R6, the negative input end of operational amplifier U10 is connected with the second analog signal, the positive power supply end of operational amplifier U10 is connected with the one end of capacitor C6 and the first power voltage respectively, the output end of operational amplifier U10 is connected with the one end of resistance R29, the one end of capacitor C10 and the second input end of isolation chip respectively after passing through resistance R18, the negative power supply end of operational amplifier U10, the other end of resistance R29, the other end of capacitor C6 and the other end of capacitor C10 are all grounded.

[0013] As a preferred scheme of the utility model, it further includes: first analog signal first-order filter circuit, second analog signal first-order filter circuit, first analog signal second-order filter circuit and second analog signal second-order filter circuit, the input end of first analog signal first-order filter circuit and the input end of second analog signal first-order filter circuit are connected with the first analog signal and the second analog signal respectively, the output end of first analog signal first-order filter circuit and the output end of second analog signal first-order filter circuit are connected with the second input end of first analog signal sampling circuit and the second input end of second analog signal sampling circuit respectively, the input end of first analog signal second-order filter circuit and the input end of second analog signal second-order filter circuit are connected with the first output end and the second output end of isolation chip respectively, the output end of first analog signal second-order filter circuit and the output end of second analog signal second-order filter circuit are all connected with the singlechip.

[0014] As a preferred scheme of the utility model, the first analog signal first-order filter circuit includes: resistance R57, resistance R172 and capacitor C33, one end of resistance R57 is connected with the one end of resistance R172 and the first analog signal respectively, the other end of resistance R57 is connected with the one end of capacitor C33 and the second input end of first analog signal sampling circuit respectively, the other end of resistance R57 and the other end of capacitor C33 are all grounded.

[0015] As a preferred scheme of the utility model, the second analog signal first-order filter circuit includes: resistance R411, resistance R13, resistance R7, resistance R9, resistance R14, capacitor C9, one end of resistance R411 is connected with the second analog signal, the other end of resistance R411 is connected with one end of resistance R7, one end of resistance R9 and one end of resistance R14 after resistance R13, the other end of resistance R14 is connected with one end of capacitor C9 and the second input end of the second analog signal sampling circuit, the other end of resistance R7, the other end of resistance R9 and the other end of capacitor C9 are all grounded.

[0016] As a preferred scheme of the utility model, the first analog signal second-order filter circuit includes: resistance R180, resistance R222, resistance R49, capacitor C36, capacitor C37, one end of resistance R180 is connected with the first output end of the isolation chip, the other end of resistance R180 is connected with one end of resistance R222 and one end of capacitor C36, the other end of resistance R222 is connected with one end of resistance R49, one end of capacitor C37 and the single-chip microcomputer, the other end of resistance R49, the other end of capacitor C36 and the other end of capacitor C37 are all grounded.

[0017] As a preferred scheme of the utility model, the second analog signal second-order filter circuit includes: resistance R33, resistance R159, resistance R67, capacitor C34, capacitor C35, one end of resistance R33 is connected with the second output end of the isolation chip, the other end of resistance R33 is connected with one end of resistance R159 and one end of capacitor C34, the other end of resistance R159 is connected with one end of resistance R67, one end of capacitor C35 and the single-chip microcomputer, the other end of resistance R67, the other end of capacitor C34 and the other end of capacitor C35 are all grounded.

[0018] Compared with the prior art, the utility model has the beneficial effects that:

[0019] The multi-channel AD conversion TTL signal conversion sampling circuit can realize the function of the traditional isolation signal conversion chip, and because the isolation is realized through the isolation chip, the voltage withstand span is larger than that of the traditional isolation transmission or linear photo-coupler; meanwhile, the domestication is easier to realize, the replaceability is higher, the sampling channels are more and easy to expand, and the sampling signal is easier to adjust. BRIEF DESCRIPTION OF DRAWINGS

[0020] In order to make the technical problems to be solved by the embodiments of the utility model, the technical scheme and the beneficial effects clearer, the following will make a further detailed description of the utility model by combining with the drawings and the embodiments. It should be noted that similar reference numerals and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further defined and explained in the subsequent drawings. At the same time, it is declared that the following described embodiments are only used for explaining the utility model and do not limit the utility model.

[0021] Figure 1 It is the principle block diagram of the multi-channel AD conversion TTL signal conversion sampling circuit in an embodiment of the utility model;

[0022] Figure 2 It is the circuit principle diagram of the synchronous rectification driving circuit and the constant current source charging and discharging circuit in an embodiment of the utility model;

[0023] Figure 3 It is the circuit principle diagram of the first analog signal sampling circuit, the second analog signal sampling circuit, the first analog signal first-order filter circuit and the second analog signal first-order filter circuit in an embodiment of the utility model;

[0024] Figure 4 It is the circuit principle diagram of the isolation chip, the first analog signal second-order filter circuit and the second analog signal second-order filter circuit in an embodiment of the utility model. DETAILED DESCRIPTION

[0025] In order to make the technical problems to be solved by the embodiments of the utility model, the technical scheme and the beneficial effects clearer, the following will make a further detailed description of the utility model by combining with the drawings and the embodiments. It should be noted that similar reference numerals and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further defined and explained in the subsequent drawings. At the same time, it is declared that the following described embodiments are only used for explaining the utility model and do not limit the utility model.

[0026] It should be noted that the terms "mounting", "setting", "connecting", "fixing" and the like should be understood broadly, for example, can be fixedly connected, can be detachably connected, or can be integrated; can be mechanically connected, or can be electrically connected; can be directly connected, or can be indirectly connected through an intermediate medium; can be the internal communication of two elements or the interaction relationship between two elements, unless otherwise explicitly limited.

[0027] Please refer to Figure 1The embodiment provides a multi-channel AD conversion TTL signal conversion sampling circuit, which comprises a synchronous rectification driving circuit 1, a constant current source charging and discharging circuit 2, a first analog signal sampling circuit 3, a second analog signal sampling circuit 4 and an isolation chip 5, the first input end and the second input end of the synchronous rectification driving circuit 1 are connected with a first synchronous driving signal and a second synchronous driving signal respectively, the output end of the synchronous rectification driving circuit 1 is connected with the output end of the constant current source charging and discharging circuit 2, the first input end of the first analog signal sampling circuit 3 and the first input end of the second analog signal sampling circuit 4 respectively, the second input end of the first analog signal sampling circuit 3 and the second input end of the second analog signal sampling circuit 4 are connected with a first analog signal and a second analog signal respectively, the output end of the first analog signal sampling circuit 3 and the output end of the second analog signal sampling circuit 4 are connected with the first input end and the second input end of the isolation chip 5 respectively, and the first output end and the second output end of the isolation chip 5 are connected with a single-chip microcomputer.

[0028] Working principle: the synchronous rectification driving circuit 1 is driven according to the first synchronous driving signal and the second synchronous driving signal, the charging level of the constant current source charging and discharging circuit 2 is pulled down, and thus a linear triangular wave is obtained. The linear triangular wave is used as a comparison reference of the first analog signal sampling circuit 3 and the second analog signal sampling circuit 4, the first analog signal sampling circuit 3 and the second analog signal sampling circuit 4 obtain a first pulse voltage and a second pulse voltage respectively by comparing the first analog signal and the second analog signal with the reference voltage provided by the linear triangular wave respectively, and the first pulse voltage and the second pulse voltage are uploaded to the single-chip microcomputer after being isolated by the isolation chip 5, so that the purpose of isolating signal conversion multi-channel sampling is achieved.

[0029] In the embodiment, the first analog signal and the second analog signal are output currents and output voltages respectively. Of course, in other embodiments, the first analog signal and the second analog signal can also be other analog signals, and the utility model does not limit this.

[0030] It should be noted that the multi-channel AD conversion TTL signal conversion sampling circuit of the utility model can also extend more isolation channels, for example, a third analog signal sampling circuit is added to realize three-channel sampling signals, or more analog signal sampling circuits are added to realize more-channel sampling signals.

[0031] Please refer to Figure 2In the embodiment, the synchronous rectification driving circuit 1 includes rectifier Q26-A, rectifier Q26-B, resistor R190, resistor R191, resistor R192, resistor R193, resistor R194, capacitor C105, capacitor C109, capacitor C116, capacitor C119, one end of the resistor R192 and one end of the capacitor C119 are connected with the first synchronous driving signal, one end of the resistor R191 and one end of the capacitor C116 are connected with the second synchronous driving signal, the first end of the rectifier Q26-A is connected with the other end of the resistor R192, the other end of the capacitor C119, the other end of the resistor R191, the other end of the capacitor C116, one end of the resistor R193 and one end of the capacitor C105 respectively, the second end of the rectifier Q26-A is connected with the first end of the rectifier Q26-B, one end of the resistor R194, one end of the resistor R190 and one end of the capacitor C109 respectively, the other end of the resistor R194 is connected with the first power voltage, the second end of the rectifier Q26-B is connected with the output end of the constant current source charging and discharging circuit 2, the third end of the rectifier Q26-A, the third end of the rectifier Q26-B, the other end of the resistor R193, the other end of the capacitor C105, the other end of the resistor R190 and the other end of the capacitor C109 are grounded. The first synchronous driving signal and the second synchronous driving signal are 300K synchronous rectification driving signals. In operation, the driving pulses of the first synchronous driving signal and the second synchronous driving signal trigger the rectifier Q26-A to conduct, and then the rectifier Q26-B pulls down the charging level of the constant current source charging and discharging circuit 2, thereby obtaining a linear triangular wave.

[0032] In a specific embodiment, the rectifier Q26-A and the rectifier Q26-B are MOS tubes with built-in bidirectional breakdown diodes and damping diodes, so that the rectifier Q26-A and the rectifier Q26-B not only serve as rectifiers in the circuit, but also provide additional circuit protection functions through the built-in bidirectional breakdown diodes and damping diodes, so that the circuit can maintain stable operation when facing voltage transients, surges and other abnormal conditions, and the reliability and stability of the circuit are improved.

[0033] Please refer to Figure 2In the embodiment, the constant current source charging and discharging circuit 2 comprises a switch tube Q27, an operational amplifier U9-A, a resistor R183, a resistor R184, a resistor R188, a resistor R189, a capacitor C94, a capacitor C97, and a capacitor C98. The first end of the switch tube Q27 is connected with one end of the resistor R189 and the negative input end of the operational amplifier U9-A. The other end of the resistor R189 is connected with one end of the resistor R184 and a reference voltage. The second end of the switch tube Q27 is connected with the output end of the operational amplifier U9-A through the resistor R188. The third end of the switch tube Q27 is connected with one end of the capacitor C98, the output end of the synchronous rectification driving circuit 1, the first input end of the first analog signal sampling circuit 3, and the first input end of the second analog signal sampling circuit 4. The positive input end of the operational amplifier U9-A is connected with the other end of the resistor R184, one end of the capacitor C97, and the other end of the resistor R184. The positive power supply end of the operational amplifier U9-A is connected with one end of the capacitor C94 and a second power voltage. The negative power supply end of the operational amplifier U9-A, the other end of the resistor R183, the other end of the capacitor C94, the other end of the capacitor C97, and the other end of the capacitor C98 are grounded. The switch tube Q27 and the operational amplifier U9-A form a constant current source to charge the capacitor C98 with a fixed constant current I. According to dv / dt*C=I, the voltage change slope dv / dt of the capacitor C is linear, and the charging time is greater than the driving time, so a 300K linear triangular wave is obtained. The 300K linear triangular wave is used as a comparison reference for the first analog signal sampling circuit 3 and the second analog signal sampling circuit 4.

[0034] Please refer to Figure 3 In the embodiment, the first analog signal sampling circuit 3 comprises an operational amplifier U21, a resistor R46, a resistor R174, a resistor R56, a capacitor C18, and a capacitor C21. The positive input end of the operational amplifier U21 is connected with the output end of the constant current source charging and discharging circuit 2 through the resistor R46. The negative input end of the operational amplifier U21 is connected with a first analog signal. The positive power supply end of the operational amplifier U21 is connected with one end of the capacitor C18 and a first power voltage. The output end of the operational amplifier U21 is connected with one end of the resistor R56, one end of the capacitor C21, and the first input end of the isolation chip 5 through the resistor R174. The negative power supply end of the operational amplifier U21, the other end of the resistor R56, the other end of the capacitor C18, and the other end of the capacitor C21 are grounded. When working, the operational amplifier U21 compares the first analog signal with the reference voltage provided by the 300K linear triangular wave to obtain a 300K first pulse voltage. The first pulse voltage is transmitted to a single-chip microcomputer as an isolated first analog signal through the isolation chip 5, so as to achieve the purpose of converting the signal into multi-channel sampling.

[0035] Referring to Figure 3 In the embodiment, the second analog signal sampling circuit 4 comprises an operational amplifier U10, a resistor R6, a resistor R18, a resistor R29, a capacitor C6 and a capacitor C10. The positive input terminal of the operational amplifier U10 is connected with the output terminal of the constant current source charging and discharging circuit 2 through the resistor R6. The negative input terminal of the operational amplifier U10 is connected with the second analog signal. The positive power supply terminal of the operational amplifier U10 is connected with one end of the capacitor C6 and the first power supply voltage respectively. The output terminal of the operational amplifier U10 is connected with one end of the resistor R29, one end of the capacitor C10 and the second input terminal of the isolation chip 5 respectively through the resistor R18. The negative power supply terminal of the operational amplifier U10, the other end of the resistor R29, the other end of the capacitor C6 and the other end of the capacitor C10 are grounded. In operation, the operational amplifier U10 compares the second analog signal with the reference voltage provided by the 300K linear triangular wave to obtain a 300K second pulse voltage. The second pulse voltage is uploaded to the single-chip microcomputer after being isolated by the isolation chip 5 to achieve the purpose of converting the isolated signal into multi-channel sampling.

[0036] Referring to Figure 1In the embodiment, the multi-channel AD conversion TTL signal conversion sampling circuit further comprises: a first analog signal first-order filter circuit 6, a second analog signal first-order filter circuit 7, a first analog signal second-order filter circuit 8 and a second analog signal second-order filter circuit 9. The input end of the first analog signal first-order filter circuit 6 and the input end of the second analog signal first-order filter circuit 7 are connected with the first analog signal and the second analog signal respectively. The output end of the first analog signal first-order filter circuit 6 and the output end of the second analog signal first-order filter circuit 7 are connected with the second input end of the first analog signal sampling circuit 3 and the second input end of the second analog signal sampling circuit 4 respectively. The input end of the first analog signal second-order filter circuit 8 and the input end of the second analog signal second-order filter circuit 9 are connected with the first output end and the second output end of the isolation chip 5 respectively. The output end of the first analog signal second-order filter circuit 8 and the output end of the second analog signal second-order filter circuit 9 are connected with the single-chip microcomputer. By setting the first analog signal first-order filter circuit 6 and the second analog signal first-order filter circuit 7, the first analog signal and the second analog signal are first-order filtered before entering the first analog signal sampling circuit 3 and the second analog signal sampling circuit 4, so that the signal is smoother and more stable, and then compared to improve the sampling accuracy of the first analog signal sampling circuit 3 and the second analog signal sampling circuit 4. By setting the first analog signal second-order filter circuit 8 and the second analog signal second-order filter circuit 9, the isolated first analog signal and the isolated second analog signal are second-order filtered before uploading to the single-chip microcomputer, and then uploaded to improve the purity and accuracy of the isolated analog signal, thereby improving the reliability and stability of the entire sampling circuit.

[0037] Please refer to Figure 3 In the embodiment, the first analog signal first-order filter circuit 6 comprises: a resistor R57, a resistor R172 and a capacitor C33. One end of the resistor R57 is connected with one end of the resistor R172 and the first analog signal respectively. The other end of the resistor R57 is connected with one end of the capacitor C33 and the second input end of the first analog signal sampling circuit 3 respectively. The other end of the resistor R57 and the other end of the capacitor C33 are grounded. The working principle is: when the first analog signal is input, the high-frequency component is short-circuited to the ground by the capacitor C33, and the low-frequency component is transmitted to the second input end of the first analog signal sampling circuit 3 through the resistor R57 and the resistor R172, thereby playing a filtering role of removing high-frequency noise and retaining low-frequency signals.

[0038] Please refer to Figure 3In the embodiment, the second analog signal first-order filter circuit 7 comprises a resistor R411, a resistor R13, a resistor R7, a resistor R9, a resistor R14, and a capacitor C9. One end of the resistor R411 is connected to the second analog signal. The other end of the resistor R411 is connected to one end of the resistor R7, one end of the resistor R9, and one end of the resistor R14 through the resistor R13. The other end of the resistor R14 is connected to one end of the capacitor C9 and the second input end of the second analog signal sampling circuit 4. The other end of the resistor R7, the other end of the resistor R9, and the other end of the capacitor C9 are grounded. When the second analog signal is input, it first passes through the resistor R411, then passes through the resistor voltage dividing network (the resistor R13, the resistor R7, and the resistor R9), and finally passes through the combination of the resistor R14 and the capacitor C9 to the second input end of the second analog signal sampling circuit 4. In this process, the high-frequency component is short-circuited to the ground by the capacitor C9, and the low-frequency component is transmitted to the output end through the resistor voltage dividing network and the resistor R14, thereby playing a role of removing high-frequency noise and retaining low-frequency signals.

[0039] Please refer to Figure 4 In the embodiment, the first analog signal second-order filter circuit 8 comprises a resistor R180, a resistor R222, a resistor R49, a capacitor C36, and a capacitor C37. One end of the resistor R180 is connected to the first output end of the isolation chip 5. The other end of the resistor R180 is connected to one end of the resistor R222 and one end of the capacitor C36. The other end of the resistor R222 is connected to one end of the resistor R49, one end of the capacitor C37, and the single-chip microcomputer. The other end of the resistor R49, the other end of the capacitor C36, and the other end of the capacitor C37 are grounded. When the first output end of the isolation chip 5 outputs the isolated first analog signal, it first passes through the resistor R180, and then is filtered by the combination of the resistor R222 and the capacitor C36 and the capacitor C37. The high-frequency component is short-circuited to the ground by the capacitor C36 and the capacitor C37, and the low-frequency component is transmitted to the single-chip microcomputer through the resistor R49, thereby playing a role of removing high-frequency noise and retaining low-frequency signals. And because there are two poles, the filtering effect is more significant than that of the first-order filter circuit.

[0040] Please refer to Figure 4In the embodiment, the second analog signal second-order filter circuit 9: resistance R33, resistance R159, resistance R67, capacitor C34, capacitor C35, one end of the resistance R33 is connected with the second output end of the isolation chip 5, the other end of the resistance R33 is connected with one end of the resistance R159 and one end of the capacitor C34 respectively, the other end of the resistance R159 is connected with one end of the resistance R67, one end of the capacitor C35 and the single-chip microcomputer respectively, the other end of the resistance R67, the other end of the capacitor C34 and the other end of the capacitor C35 are grounded. Working principle: when the second output end of the isolation chip 5 outputs the isolated first analog signal, it first passes through the resistance R33, and then is filtered through the combination of the resistance R159 and the capacitor C34 and the capacitor C35. The high-frequency component is short-circuited to the ground by the capacitor C34 and C35, and the low-frequency component is transmitted to the single-chip microcomputer through the resistance R67, thereby playing a role of removing high-frequency noise and retaining low-frequency signals, and the filtering effect is more remarkable due to the existence of two poles.

[0041] In summary, the multi-channel AD conversion TTL signal conversion sampling circuit can realize the function of the traditional isolation signal conversion chip, and since the isolation is realized by the isolation chip 5, the voltage withstand span is larger than that of the traditional isolation transmission or linear optical coupling; at the same time, it is easier to realize localization, has more alternative options, has more sampling channels and is easy to expand, and the sampling signal is easier to adjust.

[0042] It should be understood that those skilled in the art can make improvements or changes according to the above description, and all these improvements and changes shall belong to the protection scope of the appended claims of the utility model.

[0043] The utility model patent has been described above in combination with the drawings, and obviously, the implementation of the utility model patent is not limited by the above-mentioned mode, as long as various improvements are made by adopting the method concept and technical scheme of the utility model patent, or the concept and technical scheme of the utility model patent are directly applied to other occasions without improvement, all of which are within the protection scope of the utility model.

Claims

1. A multi-channel AD conversion TTL signal conversion sampling circuit, characterized in that, Include: Synchronous rectification drive circuit, constant current source charging and discharging circuit, first analog signal sampling circuit, second analog signal sampling circuit and isolation chip, the first input end and the second input end of the synchronous rectification drive circuit are connected with the first synchronous drive signal and the second synchronous drive signal respectively, the output end of the synchronous rectification drive circuit is connected with the output end of the constant current source charging and discharging circuit, the first input end of the first analog signal sampling circuit and the first input end of the second analog signal sampling circuit respectively, the second input end of the first analog signal sampling circuit and the second input end of the second analog signal sampling circuit are connected with the first analog signal and the second analog signal respectively, the output end of the first analog signal sampling circuit and the output end of the second analog signal sampling circuit are connected with the first input end and the second input end of the isolation chip respectively, the first output end and the second output end of the isolation chip are connected with the single-chip microcomputer.

2. The multi-channel AD conversion TTL signal conversion sampling circuit according to claim 1, characterized in that, The synchronous rectification drive circuit includes rectifier tube Q26-A, rectifier tube Q26-B, resistance R190, resistance R191, resistance R192, resistance R193, resistance R194, capacitor C105, capacitor C109, capacitor C116, capacitor C119, one end of the resistance R192 and one end of the capacitor C119 are connected with the first synchronous drive signal, one end of the resistance R191 and one end of the capacitor C116 are connected with the second synchronous drive signal, the first end of the rectifier tube Q26-A is connected with the other end of the resistance R192, the other end of the capacitor C119, the other end of the resistance R191, the other end of the capacitor C116, one end of the resistance R193, one end of the capacitor C105 respectively, the second end of the rectifier tube Q26-A is connected with the first end of the rectifier tube Q26-B, one end of the resistance R194, one end of the resistance R190 and one end of the capacitor C109 respectively, the other end of the resistance R194 is connected with the first power voltage, the second end of the rectifier tube Q26-B is connected with the output end of the constant current source charging and discharging circuit, the third end of the rectifier tube Q26-A, the third end of the rectifier tube Q26-B, the other end of the resistance R193, the other end of the capacitor C105, the other end of the resistance R190 and the other end of the capacitor C109 are all grounded.

3. The multi-channel AD conversion TTL signal conversion sampling circuit according to claim 1, characterized in that, The constant current source charging and discharging circuit comprises a switch tube Q27, an operational amplifier U9-A, a resistor R183, a resistor R184, a resistor R188, a resistor R189, a capacitor C94, a capacitor C97, and a capacitor C98. The first end of the switch tube Q27 is connected with one end of the resistor R189 and the negative input end of the operational amplifier U9-A. The other end of the resistor R189 is connected with one end of the resistor R184 and a reference voltage. The second end of the switch tube Q27 is connected with the output end of the operational amplifier U9-A through the resistor R188. The third end of the switch tube Q27 is connected with one end of the capacitor C98, the output end of the synchronous rectification driving circuit, the first input end of the first analog signal sampling circuit, and the first input end of the second analog signal sampling circuit. The positive input end of the operational amplifier U9-A is connected with the other end of the resistor R184, one end of the capacitor C97, and the other end of the resistor R184. The positive power supply end of the operational amplifier U9-A is connected with one end of the capacitor C94 and a second power supply voltage. The negative power supply end of the operational amplifier U9-A, the other end of the resistor R183, the other end of the capacitor C94, the other end of the capacitor C97, and the other end of the capacitor C98 are grounded.

4. The multi-channel AD conversion TTL signal conversion sampling circuit according to claim 1, characterized in that, The first analog signal sampling circuit comprises an operational amplifier U21, a resistor R46, a resistor R174, a resistor R56, a capacitor C18, and a capacitor C21. The positive input end of the operational amplifier U21 is connected with the output end of the constant current source charging and discharging circuit through the resistor R46. The negative input end of the operational amplifier U21 is connected with the first analog signal. The positive power supply end of the operational amplifier U21 is connected with one end of the capacitor C18 and a first power supply voltage. The output end of the operational amplifier U21 is connected with one end of the resistor R56, one end of the capacitor C21, and the first input end of the isolation chip through the resistor R174. The negative power supply end of the operational amplifier U21, the other end of the resistor R56, the other end of the capacitor C18, and the other end of the capacitor C21 are grounded.

5. The multi-channel AD conversion TTL signal conversion sampling circuit according to claim 1, characterized in that, The second analog signal sampling circuit comprises: an operational amplifier U10, a resistor R6, a resistor R18, a resistor R29, a capacitor C6 and a capacitor C10, a positive input end of the operational amplifier U10 is connected with an output end of the constant current source charging and discharging circuit through the resistor R6, a negative input end of the operational amplifier U10 is connected with the second analog signal, a positive power supply end of the operational amplifier U10 is connected with one end of the capacitor C6 and a first power supply voltage respectively, an output end of the operational amplifier U10 is connected with one end of the resistor R29, one end of the capacitor C10 and a second input end of the isolation chip respectively through the resistor R18, and a negative power supply end of the operational amplifier U10, the other end of the resistor R29, the other end of the capacitor C6 and the other end of the capacitor C10 are grounded.

6. The multi-channel AD conversion TTL signal conversion sampling circuit according to claim 1, characterized in that, Further comprising: a first analog signal first-order filter circuit, a second analog signal first-order filter circuit, a first analog signal second-order filter circuit and a second analog signal second-order filter circuit, an input end of the first analog signal first-order filter circuit and an input end of the second analog signal first-order filter circuit are connected with the first analog signal and the second analog signal respectively, an output end of the first analog signal first-order filter circuit and an output end of the second analog signal first-order filter circuit are connected with a second input end of the first analog signal sampling circuit and a second input end of the second analog signal sampling circuit respectively, an input end of the first analog signal second-order filter circuit and an input end of the second analog signal second-order filter circuit are connected with a first output end and a second output end of the isolation chip respectively, and an output end of the first analog signal second-order filter circuit and an output end of the second analog signal second-order filter circuit are connected with the single-chip microcomputer.

7. The multi-channel AD conversion TTL signal conversion sampling circuit according to claim 6, characterized in that, The first analog signal first-order filter circuit comprises: a resistor R57, a resistor R172 and a capacitor C33, one end of the resistor R57 is connected with one end of the resistor R172 and the first analog signal respectively, the other end of the resistor R57 is connected with one end of the capacitor C33 and the second input end of the first analog signal sampling circuit respectively, and the other end of the resistor R57 and the other end of the capacitor C33 are grounded.

8. The multi-channel AD conversion TTL signal conversion sampling circuit according to claim 6, characterized in that, The second analog signal first-order filter circuit comprises: a resistor R411, a resistor R13, a resistor R7, a resistor R9, a resistor R14 and a capacitor C9, one end of the resistor R411 is connected with the second analog signal, the other end of the resistor R411 is connected with one end of the resistor R7, one end of the resistor R9 and one end of the resistor R14 respectively through the resistor R13, the other end of the resistor R14 is connected with one end of the capacitor C9 and the second input end of the second analog signal sampling circuit respectively, and the other end of the resistor R7, the other end of the resistor R9 and the other end of the capacitor C9 are grounded.

9. The multi-channel AD conversion TTL signal conversion sampling circuit according to claim 6, characterized in that, The first analog signal second-order filter circuit stage comprises a resistor R180, a resistor R222, a resistor R49, a capacitor C36 and a capacitor C37, one end of the resistor R180 is connected with the first output end of the isolation chip, the other end of the resistor R180 is connected with one end of the resistor R222 and one end of the capacitor C36 respectively, the other end of the resistor R222 is connected with one end of the resistor R49, one end of the capacitor C37 and the single-chip microcomputer respectively, the other end of the resistor R49, the other end of the capacitor C36 and the other end of the capacitor C37 are grounded.

10. The multi-channel AD conversion TTL signal conversion sampling circuit according to claim 6, characterized in that, The second analog signal second-order filter circuit comprises a resistor R33, a resistor R159, a resistor R67, a capacitor C34 and a capacitor C35, one end of the resistor R33 is connected with the second output end of the isolation chip, the other end of the resistor R33 is connected with one end of the resistor R159 and one end of the capacitor C34 respectively, the other end of the resistor R159 is connected with one end of the resistor R67, one end of the capacitor C35 and the single-chip microcomputer respectively, the other end of the resistor R67, the other end of the capacitor C34 and the other end of the capacitor C35 are grounded.

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