Self-checking circuit
By independently controlling the frequency and power of the self-test signal through the self-test circuit, the problems of narrow frequency band and low frequency in the existing technology are solved, and the self-test signal can be precisely adjusted and the equipment function can be checked, which facilitates maintenance.
Patent Information
- Application Number
- CN202423095936.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-13
- Publication Date
- 2025-12-12
- Estimated Expiration
- 2034-12-13
AI Technical Summary
Most existing self-test technologies are based on simple hardware construction, with the self-test signal and radio frequency signal integrated. The frequency band is narrow and the frequency is low, making it impossible to accurately control power and frequency, and maintenance is inconvenient.
A self-test circuit was designed, including a miniaturized frequency source, a first amplification module, and a second amplification module. The self-test signal is independently controlled through a phase-locked loop and a digitally controlled attenuator, which can precisely adjust the power and frequency.
It enables independent transmission of self-test signals, facilitating disassembly and maintenance. With an ultra-wide bandwidth, it can output self-test signals of arbitrary frequency and power, making it highly adaptable and avoiding interference with the normal operation of the host module.
Smart Images
Figure CN223664733U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The application belongs to the technical field of power electronics, and particularly relates to a self-checking circuit. BACKGROUND
[0002] Self-checking technology is to generate a self-checking signal to automatically detect or monitor the function, performance and health status of a circuit or system. Self-checking technology is widely used in modern electronic devices and embedded systems, especially in devices requiring high reliability (such as aerospace, communication, medical treatment, industrial control, etc.). Through the self-checking signal, the system can check itself and detect possible faults or abnormalities during operation, thereby improving the stability and reliability of the system and reducing maintenance costs.
[0003] Most of the existing self-checking technologies are based on relatively simple hardware construction, and the self-checking signal only exists as a part of the function of the overall structure and is integrated with the comprehensive radio frequency signal. If a functional abnormality or device damage occurs, the repair frequency is high and disassembly is inconvenient. Moreover, in order to ensure the quality and stability of the signal, only a single frequency point and fixed output power self-checking signal can be generated, the frequency band is narrow and the frequency is low, and only the system function can be simply checked, which has limitations. CONTENT OF THE UTILITY MODEL
[0004] The present application aims to at least solve one of the technical problems existing in the prior art. To this end, the present application provides a self-checking circuit which can accurately control the power and frequency of the self-checking signal independently of the radio frequency signal.
[0005] In a first aspect, the present application provides a self-checking circuit, which comprises:
[0006] a miniaturized frequency source, a first amplification module and a second amplification module connected in sequence;
[0007] Under the condition that a reference signal is received at the input port of the miniaturized frequency source and an adjustment signal is received at the control port of the miniaturized frequency source, the miniaturized frequency source converts the reference signal into a radio frequency signal corresponding to the frequency or power of the adjustment signal, the first amplification module receives the radio frequency signal and outputs an amplified signal, and the second amplification module receives the amplified signal and outputs a self-checking signal.
[0008] According to one embodiment of the present application, the miniaturized frequency source comprises a frequency synthesizer and a phase-locked loop connected in sequence, the frequency synthesizer is used to call the phase-locked loop to adjust the reference signal into the radio frequency signal, and the phase-locked loop is used to compare the phase of the radio frequency signal and the reference signal and adjust the output frequency of the frequency synthesizer.
[0009] According to one embodiment of the application, the model of the miniaturized frequency source is RJP020180D2, the control port includes an NSS pin, an MOSI pin and an SCK pin, the power supply end VCC1 of the miniaturized frequency source is connected to a 5V power supply, and the power supply end VCC1 is also grounded through the parallel connection of a capacitor C30, a capacitor C32 and a capacitor C33; the power supply end VCC2 of the miniaturized frequency source is connected to a 12V power supply, and the power supply end VCC2 is also grounded through the parallel connection of a capacitor C36, a capacitor C37 and a capacitor C38.
[0010] According to one embodiment of the application, the first amplification module includes a 5-bit digital attenuator, a first operational amplifier and a first 3dB fixed attenuator connected in sequence, and the input port of the 5-bit digital attenuator is connected to the output port of the miniaturized frequency source.
[0011] According to one embodiment of the application, the model of the 5-bit digital attenuator is IDA-0024-6B, the model of the first operational amplifier is HGC418H, and the model of the first 3dB fixed attenuator is IFA-03; the output end of the first operational amplifier is connected to the first 3dB fixed attenuator through a capacitor C34, the output end of the first operational amplifier is connected to one end of an inductor L3, the other end of the inductor L3 is connected to an 8V power supply, and the other end of the inductor L3 is also grounded through a capacitor C31.
[0012] According to one embodiment of the application, the first amplification module further includes a first drive chip, the input end of the first drive chip is connected to a 5-bit digital attenuator control signal, and the output of the first drive chip is connected to the drive port of the 5-bit digital attenuator; the drive port of the 5-bit digital attenuator is a pin C2_5, a pin C3_5, a pin C3_0, a pin C4_5, a pin C4_0, a pin C5_5, a pin C5_0, a pin C6_5 and a pin C6_0; the input end of the first drive chip is used for inputting a 5-bit digital attenuator control signal, and the 5-bit digital attenuator control signal includes AT_V1 representing a 1dB attenuation bit, AT_V2 representing a 2dB attenuation bit, AT_V3 representing a 4dB attenuation bit, AT_V4 representing an 8dB attenuation bit and AT_V5 representing a 16dB attenuation bit.
[0013] According to one embodiment of the application, the second amplification module includes a 3-bit digital attenuator, a second operational amplifier and a second 3dB fixed attenuator connected in sequence.
[0014] According to one embodiment of the present application, the 3-bit digital attenuator is model IDA-0018-3A, the second operational amplifier is model HGC418H, the second 3dB fixed attenuator is model IFA-03, the output of the second operational amplifier is connected to the second 3dB fixed attenuator through capacitor C43, one end of the output of the second operational amplifier is connected to one end of inductor L4, the other end of inductor L4 is connected to an 8V power supply, and the other end of inductor L4 is also connected to ground through capacitor C41.
[0015] According to one embodiment of the present application, the second amplification module further comprises a second drive chip, the input end of the second drive chip is connected to a 3-bit digital attenuation control signal, and the output of the second drive chip is connected to the drive port of the 3-bit digital attenuator, the drive port of the 3-bit digital attenuator is pin 1A, pin 1B, pin 2B, pin 2A, pin 3B and pin 3A, the input end of the second drive chip is used to input a 3-bit digital attenuation control signal, and the 3-bit digital attenuation control signal comprises AT_1 representing a 20dB attenuation bit, AT_2 representing a 5dB attenuation bit, and AT_3 representing a 10dB attenuation bit.
[0016] According to one embodiment of the present application, the circuit further comprises a power switch circuit, one end of the power switch circuit is connected to a 12V power supply, and the other end of the power switch circuit is connected to the power supply end VCC2 of the miniaturized frequency source.
[0017] Additional aspects and advantages of the present application will be in part apparent and in part pointed out hereinafter.
[0018] The self-checking circuit provided by the present application has the following beneficial effects compared with the prior art:
[0019] (1) The transmission of the self-checking signal is realized by an independent self-checking circuit, which is convenient for disassembly and maintenance, can be separated from the radio frequency signal, can accurately control the power and frequency of the self-checking signal, can adjust the power and frequency of the self-checking signal, and can output a self-checking signal with any given frequency and power under the control of a wideband adjustment signal, so as to facilitate the checking of the overall function and index of the equipment, the improvement of the overall function and index, and the strong applicability.
[0020] (2) Amplitude adjustment is realized by 5-bit digital attenuator IDA-0024-6B and 3-bit digital attenuator IDA-0018-3A, power adjustment is realized through amplitude adjustment, in addition to frequency adjustment and amplitude adjustment, the step of self-checking signal output power adjustment is basically synchronized with the attenuation step of the two kinds of digital attenuators, to ensure that the step is less than or equal to 1dB; and the signal power leaked when the power is turned off is mainly ensured by the isolation degree of the miniaturized frequency source itself and the closed design of the structure cavity, to ensure that there is no large signal output from the output port of the self-checking module when the power is turned off, to avoid interfering with the normal work of the host module. BRIEF DESCRIPTION OF DRAWINGS
[0021] The above and / or additional aspects and advantages of the present application will become apparent and more readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings in which:
[0022] Figure 1 is one of the structure schematic diagrams of the self-checking circuit provided by the embodiments of the present application;
[0023] Figure 2 is the second structure schematic diagram of the self-checking circuit provided by the embodiments of the present application;
[0024] Figure 3 is the third structure schematic diagram of the self-checking circuit provided by the embodiments of the present application
[0025] Figure 4 is the structure schematic diagram of the self-checking module provided by the embodiments of the present application. DETAILED DESCRIPTION
[0026] The technical solutions in the embodiments of the present application will be described clearly in the following with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art belong to the scope of protection of the present application.
[0027] The terms "first", "second", and the like in the specification and claims of the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances, so that the embodiments of the present application can be implemented in an order other than those illustrated or described herein, and the objects distinguished by "first", "second", etc. are generally a class, not limited to the number of objects, for example, the first object can be one or more. In addition, "and / or" in the specification and claims means at least one of the connected objects, and the character " / ", generally indicates that the front and rear associated objects are in an "or" relationship.
[0028] The self-checking circuit provided by the embodiments of the present application will be described in detail below in combination with the drawings through specific embodiments and application scenarios.
[0029] As shown in Figure 1 and Figure 2 The self-checking circuit includes a miniaturized frequency source, a first amplification module and a second amplification module connected in sequence.
[0030] In the case that the input port of the miniaturized frequency source receives a reference signal and the control port of the miniaturized frequency source receives an adjustment signal, the miniaturized frequency source converts the reference signal into a radio frequency signal corresponding to the frequency or power of the adjustment signal, the first amplification module receives the radio frequency signal and outputs an amplified signal, and the second amplification module receives the amplified signal and outputs a self-checking signal.
[0031] The reference signal can be a known frequency signal provided by a stable signal source, such as a crystal oscillator, an external frequency source, etc., as a reference frequency, which is the basis for frequency conversion and adjustment.
[0032] The adjustment signal can be used to set the accurate frequency of the output radio frequency signal or control its power output, which can be a power adjustment signal or a frequency adjustment signal.
[0033] For example, the frequency of the reference signal is 100MHz, and the frequency of the radio frequency signal is 2-18GHz.
[0034] In actual implementation, the miniaturized frequency source SOURCE1 adjusts the frequency or power of the radio frequency signal according to the change of the adjustment signal.
[0035] In the miniaturized frequency source SOURCE1, the frequency synthesizer uses technologies such as Phase-Locked Loop (PLL) or Direct Digital Synthesis (DDS) to adjust the output frequency according to the input adjustment signal, and performs frequency conversion, frequency mixing, etc. on the basis of the reference signal to realize the change of the frequency, ensuring that the radio frequency signal meets the power or frequency corresponding to the adjustment signal.
[0036] The PLL synchronizes the radio frequency signal with the reference signal by comparing their phases, dynamically adjusts the output frequency of the frequency synthesizer, and thus ensures the stability and accuracy of the frequency of the radio frequency signal.
[0037] The first amplification module performs the first amplification on the radio frequency signal to obtain an amplified signal, so as to provide high gain and low distortion amplification effect.
[0038] The second amplification module performs the second amplification on the amplified signal to obtain a stronger self-checking signal and output, and the signal after two amplifications can have higher power, which is suitable for driving downstream circuits or as a test and diagnosis signal, effectively avoiding the distortion introduced by the high gain of a single amplifier.
[0039] The power of the self-checking signal can be -35 to +10 dBm.
[0040] The self-checking circuit provided by the embodiment of the application can realize the transmission of the self-checking signal through the independent self-checking circuit, is convenient to disassemble and maintain, can be separated from the radio frequency signal, can accurately control the power and frequency of the self-checking signal, can adjust the power and frequency of the self-checking signal, and can output the self-checking signal with any given frequency and power under the control of the wide-band adjusted signal, so as to facilitate the checking of the overall function and index of the equipment and the improvement of the overall function and index, and has strong applicability.
[0041] In some embodiments, the miniaturized frequency source comprises a connected frequency synthesizer and a phase-locked loop, the frequency synthesizer being configured to invoke the phase-locked loop to adjust the reference signal into the radio frequency signal, the phase-locked loop being configured to compare the phase of the radio frequency signal and the reference signal and adjust the output frequency of the frequency synthesizer.
[0042] The frequency synthesizer is responsible for converting the reference signal into the required radio frequency signal, and in this process, a phase-locked loop (PLL) is used to accurately adjust the frequency.
[0043] In the miniaturized frequency source, the output frequency of the frequency synthesizer is controlled by the phase-locked loop (PLL), which is used to lock the phase relationship between the output frequency and the reference signal.
[0044] The frequency synthesizer can directly generate a signal with a desired frequency through digital signal processing by direct digital synthesis (DDS) technology, or can mix the reference signal with a high-frequency local oscillator signal to generate a target frequency, or can convert the reference signal into a target frequency by calling a multiplier or a frequency divider through frequency multiplication or frequency division technology.
[0045] The phase-locked loop (PLL) can ensure that the output frequency of the frequency synthesizer maintains a certain phase relationship with the reference signal, thereby stabilizing the frequency.
[0046] Inside the phase-locked loop (PLL), the phase comparator (Phase Comparator) compares the phase of the output signal of the frequency synthesizer and the reference signal, calculates the phase difference between them, and converts it into a voltage signal as a phase error signal; the loop filter (Loop Filter) receives the error signal output by the phase comparator, filters and processes it, can remove noise, and obtains a smooth error signal to further smooth the signal; the voltage-controlled oscillator (Voltage-Controlled Oscillator, VCO) adjusts its oscillation frequency according to the error signal output by the loop filter, so that the output frequency of the frequency synthesizer is closer to the frequency of the reference signal. The frequency of the VCO will be adjusted with the change of the input control voltage, thereby adjusting the output frequency.
[0047] During the operation of the PLL, the phase comparator continuously monitors the phase difference between the reference signal and the frequency synthesizer output signal, and adjusts the operating frequency of the VCO through the loop filter. If the frequency of the reference signal changes, the phase-locked loop (PLL) will automatically adjust the output frequency of the VCO to keep it in phase with the reference signal, or lock within a certain frequency range. In the case of phase-locked loop (PLL) phase locking, the frequency and phase relationship between the output signal of the frequency synthesizer and the reference signal remains stable, and the frequency of the output signal can be accurately controlled by adjusting the feedback loop of the phase-locked loop (PLL).
[0048] Through the feedback mechanism of the phase-locked loop, the frequency synthesizer adjusts the frequency of its output signal to some extent to synchronize with the frequency of the reference signal. In this process, the phase-locked loop (PLL) can accurately control the output frequency of the frequency synthesizer, even if the radio frequency signal is in a high frequency range, it can still maintain high precision stability. The frequency synthesizer will generate a radio frequency signal, the frequency of which is determined by the reference signal after being adjusted by the phase-locked loop (PLL).
[0049] The output frequency of the frequency synthesizer is stabilized under the adjustment of the phase-locked loop (PLL), and the frequency of the output signal can be fine-tuned as needed.
[0050] The control signal can be used to further adjust the working state of the phase-locked loop (PLL), thereby adjusting the output frequency or phase of the frequency synthesizer.
[0051] The feedback mechanism of the PLL ensures that the frequency of the radio frequency signal and the reference signal always maintains a certain phase relationship, even in the case of external disturbance or temperature change, the frequency of the output signal of the frequency synthesizer can be guaranteed to be stable.
[0052] In this embodiment, the joint action of the frequency synthesizer and the phase-locked loop adjusts the reference signal to a radio frequency signal, ensuring the stability and high precision of the radio frequency signal.
[0053] In some embodiments, as shown in Figure 3 The model of the miniaturized frequency source is RJP020180D2, the control port includes NSS pin, MOSI pin and SCK pin, the power supply end VCC1 of the miniaturized frequency source is connected to a 5V power supply, and the power supply end VCC1 is also connected to ground through parallel capacitors C30, C32 and C33, the power supply end VCC2 of the miniaturized frequency source is connected to a 12V power supply, and the power supply end VCC2 is also connected to ground through parallel capacitors C36, C37 and C38.
[0054] Capacitor C30, capacitor C32 and capacitor C33 are 10 μF, 0.1 μF and 1 nF respectively; capacitor C36, capacitor C37 and capacitor C38 are 1 nF, 0.1 μF and 0.1 μF respectively.
[0055] The input port of the miniaturized frequency source U10 is the REF pin, the output port is the RFOUT pin, the reference signal is input to the input port of the miniaturized frequency source through the capacitor C35, and the control port includes the NSS pin, the MOSI pin and the SCK pin, which correspond to LE, DATA and CLK respectively, LE represents the SPI enable signal, DATA represents the SPI data signal, and CLK represents the SPI clock signal.
[0056] In actual execution, the 100MHz reference signal is input to the miniaturized frequency source through the capacitor C35 and the REF pin, the capacitor C35 is 100 pF, the control signal is input to the miniaturized frequency source through the NSS pin, the MOSI pin and the SCK pin, and the radio frequency signal is output to the first amplification module through the RFOUT pin.
[0057] In some embodiments, the first amplification module includes a 5-bit digital attenuator, a first operational amplifier and a first 3dB fixed attenuator connected in sequence, and the input port of the 5-bit digital attenuator is connected to the output port of the miniaturized frequency source.
[0058] The input port of the 5-bit digital attenuator is the IN pin, and the output port is the OUT pin.
[0059] In some embodiments, the model of the 5-bit digital attenuator is IDA-0024-6B, the model of the first operational amplifier is HGC418H, the model of the first 3dB fixed attenuator is IFA-03, the output end of the first operational amplifier is connected to the first 3dB fixed attenuator through the capacitor C34, and the output end of the first operational amplifier is connected to one end of the inductor L3, the other end of the inductor L3 is connected to an 8V power supply, and the other end of the inductor L3 is also grounded through the capacitor C31.
[0060] The inductor L3 is 15 nH, and the capacitor C31 is 1 nF.
[0061] In some embodiments, the first amplification module further comprises a first drive chip, an input end of the first drive chip is connected with a 5-bit digital control attenuation control signal, an output of the first drive chip is connected with a drive port of the 5-bit digital control attenuator, the drive port of the 5-bit digital control attenuator is pin C2_5, pin C3_5, pin C3_0, pin C4_5, pin C4_0, pin C5_5, pin C5_0, pin C6_5 and pin C6_0, the input end of the first drive chip is used for inputting the 5-bit digital control attenuation control signal, and the 5-bit digital control attenuation control signal comprises AT_V1 representing a 1dB attenuation bit, AT_V2 representing a 2dB attenuation bit, AT_V3 representing a 4dB attenuation bit, AT_V4 representing an 8dB attenuation bit and AT_V5 representing a 16dB attenuation bit.
[0062] The 5-bit digital control attenuator has five 5-bit digital control attenuation control signals, AT_V1 represents a 1dB attenuation bit, AT_V2 represents a 2dB attenuation bit, AT_V3 represents a 4dB attenuation bit, AT_V4 represents an 8dB attenuation bit and AT_V5 represents a 16dB attenuation bit.
[0063] In actual implementation, the first drive chip U11 is selected as MWC0003T, the drive port of the 5-bit digital control attenuator U6 is pin C2_5, pin C3_5, pin C3_0, pin C4_5, pin C4_0, pin C5_5, pin C5_0, pin C6_5 and pin C6_0, and the 5-bit digital control attenuator U6 attenuates the radio frequency signal.
[0064] The first operational amplifier U12 amplifies the attenuated radio frequency signal at a first stage, and inputs the radio frequency signal to the first 3dB fixed attenuator U9 through pin OUT and capacitor C34, and the capacitor C34 is 100pF.
[0065] The first 3dB fixed attenuator U9 attenuates the amplified radio frequency signal to obtain an amplified signal (RE) and outputs the amplified signal (RE).
[0066] In the case that the voltage at the input end VIN of the first drive chip U11 is 0V, at the output end of the second drive chip U13, A=-5V and B=0V, and in the case that the voltage at the input end VIN is 3.3V, A=0V and B=-5V.
[0067] For the drive port of the 5-bit digital control attenuator U6, pin C1_5 is always set to -5V, and when 0V, 0.5dB attenuation is performed.
[0068] Pin C2_5 attenuates 1dB at 0V; pin C3_5 attenuates 2dB at 0V, pin C3_0 is -5V at this time; pin C4_5 attenuates 4dB at 0V, pin C4_0 is -5V at this time; pin C5_5 attenuates 8dB at 0V, pin C5_0 is -5V at this time; pin C6_5 attenuates 16dB at 0V, pin C6_0 is -5V at this time.
[0069] In this embodiment, attenuation is carried out through a 5-bit digital attenuator and a first 3dB fixed attenuator, thereby widening the adjustable range of output power.
[0070] In some embodiments, the second amplification module comprises a 3-bit digital attenuator, a second operational amplifier and a second 3dB fixed attenuator connected in sequence.
[0071] The input port of the 3-bit digital attenuator U15 is pin IN, and the output port is pin OUT.
[0072] In some embodiments, the model of the 3-bit digital attenuator is IDA-0018-3A, the model of the second operational amplifier is HGC418H, the model of the second 3dB fixed attenuator is IFA-03, the output end of the second operational amplifier is connected to the second 3dB fixed attenuator through capacitor C43, one end of the output end of the second operational amplifier is connected to inductor L4, the other end of inductor L4 is connected to a 8V power supply, and the other end of inductor L4 is also connected to ground through capacitor C41.
[0073] Inductor L4 is 15nH, and capacitor C41 is 1nF.
[0074] In some embodiments, the second amplification module further comprises a second drive chip, the input end of the second drive chip is connected to a 3-bit digital attenuator control signal, the output of the second drive chip is connected to the drive port of the 3-bit digital attenuator, the drive port of the 3-bit digital attenuator is pin 1A, pin 1B, pin 2B, pin 2A, pin 3B and pin 3A, and the input end of the second drive chip is used to input a 3-bit digital attenuator control signal, the 3-bit digital attenuator control signal comprises AT_1 representing a 20dB attenuation bit, AT_2 representing a 5dB attenuation bit, and AT_3 representing a 10dB attenuation bit.
[0075] The 3-bit digital attenuator has three kinds of 3-bit digital attenuator control signals, AT_1 representing a 20dB attenuation bit, AT_2 representing a 5dB attenuation bit, and AT_3 representing a 10dB attenuation bit.
[0076] In actual implementation, the second drive chip U13 is MWC0003T, the driving ports of the 3-bit digital attenuator U15 are pin 1A, pin 1B, pin 2B, pin 2A, pin 3B and pin 3A, and the 3-bit digital attenuator U15 attenuates the amplified signal;
[0077] For the driving ports of the 3-bit digital attenuator U15, pin 1A attenuates 20 dB at-5V, pin 2A attenuates 5 dB at-5V, and pin 3A attenuates 10 dB at-5V. The pin VEE of the second drive chip U13 is connected to a-5V power supply and grounded through a capacitor C40, and the capacitor C40 is 1nF.
[0078] The second operational amplifier U16 performs second-stage amplification on the attenuated amplified signal, and inputs the signal to the second 3dB fixed attenuator U14 through a pin OUT and a capacitor C43.
[0079] The second 3dB fixed attenuator U14 attenuates the amplified amplified signal to obtain a self-check signal and outputs the signal through a capacitor C44.
[0080] The capacitor C43 and the capacitor C44 are both 100pF.
[0081] When the voltage at the input end VIN of the second drive chip U13 is 0V, at the output end of the second drive chip U13, A=-5V and B=0V; when the voltage at the input end VIN is 3.3V, A=0V and B=-5V.
[0082] In this embodiment, attenuation is performed through the 3-bit digital attenuator and the second 3dB fixed attenuator, thereby widening the adjustable range of output power.
[0083] In some embodiments, the circuit further comprises a power switch circuit, one end of the power switch circuit is connected to a 12V power supply, and the other end of the power switch circuit is connected to a power supply end VCC2 of the miniaturized frequency source.
[0084] In actual implementation, a switching element such as a MOS tube or a triode is arranged in the power switch circuit, the switching element is controlled to be turned on or turned off through a switching control signal, and the DC working power 12V input of the 12V power supply end VCC2 of the miniaturized frequency source is provided or cut off.
[0085] In addition, the self-check circuit can also be provided with a detection chip for detecting the voltage and current of the self-check circuit and generating and outputting a health signal.
[0086] VCC2 is also grounded through a capacitor C36, a capacitor C37 and a capacitor C38, the capacitor C36 is 1nF, the capacitor C37 is 0.1uF, and the capacitor C38 is 10uF.
[0087] An embodiment is described below.
[0088] The function of the self-checking circuit is mainly to provide signals in the working frequency range of the device for calibration and verification of the device, with switching function, amplitude adjustment function and frequency adjustment function.
[0089] The output self-checking signal meets the following requirements: frequency range 2-18GHz, power -35-+10dBm, power adjustment step ≤1dB, and off-leakage signal power < -55dBm.
[0090] The miniaturized frequency source RJP020180D2 with high control degree is selected as the core main body, and through the SPI serial communication protocol, the input 100MHz reference signal is converted into a 2-18GHz radio frequency signal by adjusting the signal control of the miniaturized frequency source, with a frequency step of 10MHz.
[0091] There are three kinds of adjustment signals for the miniaturized frequency source, LE represents the SPI enable signal, DATA represents the SPI data signal, and CLK represents the SPI clock signal.
[0092] Then add two sets of digital attenuators and low-noise amplifiers with appropriate frequency range to widen the output power adjustable range;
[0093] Finally, add two sets of 3dB fixed attenuators to balance the overall link gain to the appropriate position, and cooperate with manual control of the digital attenuator to make the output power in the range of -35-+10dBm
[0094] There are 8 kinds of power control signals, among which the 5-bit digital attenuator has 5 kinds of power control signals, AT_V1 represents 1dB attenuation bit, AT_V2 represents 2dB attenuation bit, AT_V3 represents 4dB attenuation bit, AT_V4 represents 8dB attenuation bit, and AT_V5 represents 16dB attenuation bit.
[0095] The 3-bit digital attenuator has 3 kinds of power control signals, AT_1 represents 20dB attenuation bit, AT_2 represents 5dB attenuation bit, and AT_3 represents 10dB attenuation bit.
[0096] Record the attenuation values of the two digital attenuators corresponding to each frequency point and each output power value to form a data table, and record the actual value of the output power corresponding to the theoretical output power. When needed, call the attenuation value data in the table to control the two digital attenuators through the SPI serial port to accurately output the self-checking signal power value.
[0097] The attenuation value / output power data table is shown in Table 1 below.
[0098] Table 1 Attenuation value / output power data table
[0099]
[0100] The amplitude adjustment is realized by a 5-bit digital attenuator IDA-0024-6B and a 3-bit digital attenuator IDA-0018-3A, and the power adjustment is realized by the amplitude adjustment. In addition to the frequency adjustment and the amplitude adjustment, the self-check signal output power adjustment step is basically synchronized with the attenuation step of the two digital attenuators, so that the step is less than or equal to 1 dB. The signal power leakage when the power is turned off is mainly ensured by the isolation degree of the miniaturized frequency source itself and the closed design of the structure cavity, so that no large signal is output from the self-check module output port when the power is turned off, and the normal work of the host module is avoided. The circuit chips of the radio frequency part are all bare chips, which can effectively avoid signal crosstalk, improve the overall index performance, and have good stability and high consistency.
[0101] As shown in Figure 4 The self-check circuit in the application can be integrated as a self-check module. Compared with the existing self-check technology which can only give a fixed frequency power, the self-check module can output a self-check signal of any frequency and power as a simple signal source, and realize the checking of various functions of the equipment.
[0102] It should be noted that in this document, the terms "comprising", "containing", or any other variant thereof are intended to cover non-exclusive inclusions, so that a process, method, article, or device that includes a series of elements not only includes those elements, but also includes other elements not explicitly listed, or includes elements inherent to such a process, method, article, or device. Without more limitations, the element defined by the statement "comprising a" does not exclude the presence of another identical element in the process, method, article, or device that includes the element. In addition, it should be pointed out that the scope of the methods and devices in the embodiments of the application is not limited to the order of functions shown or discussed, but can also include functions performed in a substantially simultaneous manner or in reverse order, for example, the described method can be performed in an order different from that described, and various steps can also be added, omitted, or combined. In addition, the features described with reference to certain examples can be combined in other examples.
[0103] In the description of the application, "first feature" and "second feature" can include one or more features.
[0104] In the description of the application, the meaning of "a plurality of" is two or more.
[0105] The embodiments of the present application are described above with reference to the drawings, but the present application is not limited to the specific embodiments described above, and the specific embodiments described above are merely illustrative, not restrictive, and a person of ordinary skill in the art can make many forms under the inspiration of the present application without departing from the purpose of the present application and the scope protected by the claims, all of which belong to the protection of the present application.
[0106] In the description of the present specification, the description referring to the terms "one embodiment", "some embodiments", "exemplary embodiment", "example", "specific example", or "some examples" means that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In the present specification, the exemplary description of the above terms does not necessarily mean the same embodiment or example. Also, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.
[0107] Although the embodiments of the present application have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and variations can be made thereto without departing from the principles and spirit of the present application, and the scope of the present application is defined by the claims and their equivalents.
Claims
1. A self-test circuit, characterized in that, It includes a miniaturized frequency source, a first amplification module, and a second amplification module connected in sequence; When a reference signal is received at the input port of the miniaturized frequency source and an adjustment signal is received at the control port of the miniaturized frequency source, the miniaturized frequency source converts the reference signal into a radio frequency signal with a frequency or power corresponding to the adjustment signal. The first amplification module receives the radio frequency signal and outputs an amplified signal, and the second amplification module receives the amplified signal and outputs a self-test signal.
2. The self-test circuit according to claim 1, characterized in that, The miniaturized frequency source includes a frequency synthesizer and a phase-locked loop connected together. The frequency synthesizer is used to call the phase-locked loop to adjust the reference signal into the radio frequency signal. The phase-locked loop is used to perform a phase comparison between the radio frequency signal and the reference signal to adjust the output frequency of the frequency synthesizer.
3. The self-test circuit according to claim 1, characterized in that, The miniaturized frequency source is model RJP020180D2. The control port includes an NSS pin, a MOSI pin, and an SCK pin. The power supply terminal VCC1 of the miniaturized frequency source is connected to a 5V power supply. The power supply terminal VCC1 is also grounded through parallel capacitors C30, C32, and C33. The power supply terminal VCC2 of the miniaturized frequency source is connected to a 12V power supply. The power supply terminal VCC2 is also grounded through parallel capacitors C36, C37, and C38.
4. The self-test circuit according to claim 1, characterized in that, The first amplification module includes a 5-digit digitally controlled attenuator, a first operational amplifier, and a first 3dB fixed attenuator connected in sequence. The input port of the 5-digit digitally controlled attenuator is connected to the output port of the miniaturized frequency source.
5. The self-test circuit according to claim 4, characterized in that, The model of the 5-digit digitally controlled attenuator is IDA-0024-6B, the model of the first operational amplifier is HGC418H, the model of the first 3dB fixed attenuator is IFA-03, the output terminal of the first operational amplifier is connected to the first 3dB fixed attenuator through capacitor C34, the output terminal of the first operational amplifier is connected to one end of inductor L3, the other end of inductor L3 is connected to an 8V power supply, and the other end of inductor L3 is also grounded through capacitor C31.
6. The self-test circuit according to claim 5, characterized in that, The first amplification module further includes a first driver chip. The input terminal of the first driver chip is connected to a 5-digit digital controlled attenuation control signal, and the output of the first driver chip is connected to the drive port of the 5-digit digital controlled attenuator. The drive port of the 5-digit digital controlled attenuator is pin C2_5, pin C3_5, pin C3_0, pin C4_5, pin C4_0, pin C5_5, pin C5_0, pin C6_5, and pin C6_0. The input terminal of the first driver chip is used to input the 5-digit digital controlled attenuation control signal. The 5-digit digital controlled attenuation control signal includes AT_V1 representing a 1dB attenuation bit, AT_V2 representing a 2dB attenuation bit, AT_V3 representing a 4dB attenuation bit, AT_V4 representing an 8dB attenuation bit, and AT_V5 representing a 16dB attenuation bit.
7. The self-test circuit according to claim 1, characterized in that, The second amplification module includes a 3-digit digitally controlled attenuator, a second operational amplifier, and a second 3dB fixed attenuator connected in sequence.
8. The self-test circuit according to claim 7, characterized in that, The model of the three-digit digitally controlled attenuator is IDA-0018-3A, the model of the second operational amplifier is HGC418H, the model of the second 3dB fixed attenuator is IFA-03, the output terminal of the second operational amplifier is connected to the second 3dB fixed attenuator through capacitor C43, the output terminal of the second operational amplifier is connected to one end of inductor L4, the other end of inductor L4 is connected to an 8V power supply, and the other end of inductor L4 is also grounded through capacitor C41.
9. The self-test circuit according to claim 8, characterized in that, The second amplification module also includes a second driver chip. The input terminal of the second driver chip is connected to a 3-digit digital controlled attenuation control signal, and the output terminal of the second driver chip is connected to the drive port of the 3-digit digital controlled attenuator. The drive port of the 3-digit digital controlled attenuator is pin 1A, pin 1B, pin 2B, pin 2A, pin 3B, and pin 3A. The input terminal of the second driver chip is used to input the 3-digit digital controlled attenuation control signal. The 3-digit digital controlled attenuation control signal includes AT_1 representing a 20dB attenuation bit, AT_2 representing a 5dB attenuation bit, and AT_3 representing a 10dB attenuation bit.
10. The self-test circuit according to claim 1, characterized in that, The circuit also includes a power switch circuit, one end of which is connected to a 12V power supply, and the other end of which is connected to the power supply terminal VCC2 of the miniaturized frequency source.