Band-type brake power supply circuit, band-type brake driver and elevator band-type brake device

Abstract

The utility model provides a band-type brake power supply circuit, a band-type brake driver and an elevator band-type brake device, and the band-type brake power supply circuit comprises a power supply main loop, a sampling circuit, a first protection circuit, a second protection circuit, a first signal output circuit and a second signal output circuit. The power supply main loop comprises a rectification circuit, a voltage conversion circuit, a first switch circuit and a second switch circuit, and when an abnormal condition occurs, the first protection circuit and the second protection circuit respectively trigger and output a first enable signal and a second enable signal; the first signal output circuit triggers to turn off the first switching circuit and the second switching circuit based on the first enable signal, and the second signal output circuit triggers to turn off the voltage conversion circuit based on the second enable signal, so that the power supply of the band-type brake is cut off, and the band-type brake is switched to a band-type braking state. The band-type brake power supply circuit does not need to be provided with a band-type brake, miniaturization of the band-type brake device is achieved, and the design cost is reduced.

Description

TECHNICAL FIELD

[0001] The utility model belongs to the field of brake control technology, especially relates to a brake power supply circuit, brake driver and elevator brake device. BACKGROUND

[0002] In the brake power supply field, in order to deal with the safety needs, the power supply of brake brake can be effectively cut off when failure or accident occurs, for example, in the elevator field, when the elevator fails, in order to avoid the elevator from hitting the top or squatting the bottom, the power supply of brake brake needs to be effectively switched in time when the elevator fails, so that the brake brake is switched to the brake state and the elevator is braked.

[0003] In the conventional brake control scheme, the brake contactor is added to realize the control of the brake power supply, and the brake contactor is large in size, so that the size of the brake device cannot be further miniaturized. UTILITY MODEL CONTENTS

[0004] The utility model discloses a brake power supply circuit, which aims to solve the problem of large size of the traditional brake power supply circuit.

[0005] The first aspect of the utility model embodiment provides a brake power supply circuit for outputting a power signal to a brake brake, and the brake power supply circuit comprises:

[0006] A power main circuit comprises a rectifier circuit, a voltage conversion circuit and a power output circuit connected in sequence, and the power output circuit comprises a first switch circuit and a second switch circuit connected in parallel between the voltage conversion circuit and the brake brake;

[0007] A sampling circuit is connected to the output end of the voltage conversion circuit, the output end of the first switch circuit, the output end of the second switch circuit and the control signal end of the brake brake respectively and samples the corresponding first potential signal, second potential signal, third potential signal and fourth potential signal;

[0008] A first protection circuit is connected to the sampling circuit, and the first protection circuit is used for detecting the potential of the first potential signal, the second potential signal and the fourth potential signal and outputting a first enable signal when the potential signals are not the same;

[0009] A second protection circuit is connected to the sampling circuit, and the second protection circuit is used for detecting the potential of the first potential signal, the third potential signal and the fourth potential signal and outputting a second enable signal when the potential signals are not the same;

[0010] The first signal output circuit is connected to the first protection circuit and is triggered by the first enable signal to output a first shutdown signal to shut down the first switch circuit and the second switch circuit.

[0011] The second signal output circuit is connected to the second protection circuit and is triggered by the second enable signal to output a second shutdown signal to shut down the voltage conversion circuit.

[0012] Optionally, the first switching circuit and the second switching circuit are also connected to the main controller, which is used to output a brake control signal to the control signal terminal of the brake, output a first switching signal to the first switching circuit, and output a second switching signal to the second switching circuit.

[0013] The first protection circuit includes a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a first capacitor, a second capacitor, a third capacitor, a first diode, a first XNOR gate, a second XNOR gate, a first NAND gate, a first inverter, and a first optocoupler;

[0014] The first terminal of the first resistor is used to input the fourth potential signal. The second terminal of the first resistor is connected to the first input terminal of the first XOR gate. The first terminal of the second resistor is used to input the second potential signal. The second terminal of the second resistor, the cathode of the first diode, the first terminal of the third resistor, and the second input terminal of the first XOR gate are connected. The anode of the first diode is connected to the first terminal of the fourth resistor. The second terminal of the fourth resistor is used to input the first analog signal. The second terminal of the third resistor is grounded. The output terminal of the first XOR gate is connected to the first input terminal of the first NAND gate. The first terminal of the fifth resistor is used to input the first potential signal. The second terminal of the fifth resistor is connected to the first input terminal of the second XOR gate. The first terminal of the sixth resistor is used to input the fourth potential signal. The second terminal of the sixth resistor is connected to the second input terminal of the second XOR gate. The output terminal of the first NAND gate is connected to the second input terminal of the first NAND gate. The output terminal of the first NAND gate is connected to the first terminal of the seventh resistor. The second terminal of the seventh resistor, the first terminal of the first capacitor, and the input terminal of the first inverter are connected. The second terminal of the first capacitor is grounded. The output terminal of the first inverter is connected to the first terminal of the eighth resistor. The second terminal of the eighth resistor, the first terminal of the ninth resistor, the first terminal of the second capacitor, and the anode of the first optocoupler are connected. The second terminal of the ninth resistor, the second terminal of the second capacitor, and the cathode of the first optocoupler are grounded. The collector of the first optocoupler is connected to the first terminal of the tenth resistor. The second terminal of the tenth resistor is connected to the positive voltage terminal. The emitter of the first optocoupler, the first terminal of the eleventh resistor, and the first terminal of the third capacitor are connected to form the output terminal of the first protection circuit. The second terminal of the eleventh resistor and the second terminal of the third capacitor are grounded.

[0015] Optionally, the second protection circuit includes a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, a nineteenth resistor, a twentieth resistor, a twenty-first resistor, a twenty-second resistor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a second diode, a third XNOR gate, a fourth XNOR gate, a second NAND gate, a second inverter, and a second optocoupler;

[0016] The first terminal of the twelfth resistor is used to input the fourth potential signal. The second terminal of the twelfth resistor is connected to the first input terminal of the third XNOR gate. The first terminal of the thirteenth resistor is used to input the third potential signal. The second terminal of the thirteenth resistor, the cathode of the second diode, the first terminal of the fourteenth resistor, and the second input terminal of the third XNOR gate are connected. The anode of the second diode is connected to the first terminal of the fifteenth resistor. The second terminal of the fifteenth resistor is used to input the second analog signal. The second terminal of the fourteenth resistor is grounded. The output terminal of the third XNOR gate is connected to the first input terminal of the second NAND gate. The first terminal of the sixteenth resistor is used to input the first potential signal. The second terminal of the sixteenth resistor is connected to the first input terminal of the fourth XNOR gate. The first terminal of the seventeenth resistor is used to input the fourth potential signal. The second terminal of the seventeenth resistor is connected to the second input terminal of the fourth XNOR gate. The output terminal is connected to the second input terminal of the second NAND gate. The output terminal of the second NAND gate is connected to the first terminal of the eighteenth resistor. The second terminal of the eighteenth resistor, the first terminal of the fourth capacitor, and the input terminal of the second inverter are connected. The second terminal of the fourth capacitor is grounded. The output terminal of the second inverter is connected to the first terminal of the nineteenth resistor. The second terminal of the nineteenth resistor, the first terminal of the twentieth resistor, the first terminal of the fifth capacitor, and the anode of the second optocoupler are connected. The second terminal of the twentieth resistor, the second terminal of the fifth capacitor, and the cathode of the second optocoupler are grounded. The collector of the second optocoupler is connected to the first terminal of the eleventh resistor. The second terminal of the eleventh resistor is connected to the positive voltage terminal. The emitter of the second optocoupler, the first terminal of the twentieth resistor, and the first terminal of the sixth capacitor are connected to form the output terminal of the second protection circuit. The second terminal of the twentieth resistor and the second terminal of the sixth capacitor are grounded.

[0017] Optionally, the first signal output circuit includes a first power supply chip, a first optocoupler circuit, and a second optocoupler circuit.

[0018] The power input terminal of the first power chip is connected to the positive power terminal, and the power output terminal of the first power chip is connected to the input terminal of the first optocoupler circuit and the input terminal of the second optocoupler circuit, respectively.

[0019] The first optocoupler circuit includes a twenty-third resistor, a twenty-fourth resistor, a twenty-fifth resistor, a seventh capacitor, an eighth capacitor, and a third optocoupler;

[0020] The first end of the 23rd resistor, the first end of the 7th capacitor, and the anode of the 3rd optocoupler are connected to form the input terminal of the first optocoupler circuit. The second end of the 23rd resistor, the second end of the 7th capacitor, and the cathode of the 3rd optocoupler are grounded. The collector of the 3rd optocoupler is connected to the first end of the 24th resistor. The second end of the 24th resistor is connected to the positive power supply terminal. The emitter of the 3rd optocoupler, the first end of the 25th resistor, and the first end of the 8th capacitor are connected to the control terminal of the first switching circuit. The second end of the 25th resistor and the second end of the 8th capacitor are grounded.

[0021] The second optocoupler circuit includes a twenty-sixth resistor, a twenty-seventh resistor, a twenty-eighth resistor, a ninth capacitor, a tenth capacitor, and a fourth optocoupler;

[0022] The first end of the 26th resistor, the first end of the 9th capacitor, and the anode of the 4th optocoupler are connected to form the input terminal of the 2nd optocoupler circuit. The second end of the 26th resistor, the second end of the 9th capacitor, and the cathode of the 4th optocoupler are grounded. The collector of the 4th optocoupler is connected to the first end of the 27th resistor. The second end of the 27th resistor is connected to the positive power supply terminal. The emitter of the 4th optocoupler, the first end of the 28th resistor, and the first end of the 10th capacitor are connected to the control terminal of the 2nd switching circuit. The second end of the 28th resistor and the second end of the 10th capacitor are grounded.

[0023] Optionally, the second signal output circuit includes a second power supply chip and a driver;

[0024] The power input terminal of the second power chip is connected to the positive power terminal, and the power output terminal of the second power chip is connected to the power terminal of the driver. The driver is used to output a voltage conversion signal to the voltage conversion circuit.

[0025] Optionally, the main power supply circuit further includes:

[0026] A relay, wherein the switch of the relay is connected in series between the voltage conversion circuit and the first switching circuit and the second switching circuit;

[0027] The brake power supply circuit also includes:

[0028] The third signal output circuit is connected to the coil of the relay, the first protection circuit, and the second protection circuit, respectively. The third signal output circuit is used to detect the potential of the output signals of the first protection circuit and the second protection circuit, and cut off the output voltage enable signal to the coil of the relay when the potentials of the two output signals are different, so as to turn off the relay.

[0029] Optionally, the third signal output circuit includes an AND gate, a 29th resistor, a 30th resistor, a 31st resistor, an 11th capacitor, a 12th capacitor, and a fifth optocoupler;

[0030] The first input terminal of the AND gate is connected to the output terminal of the first protection circuit, the second input terminal of the AND gate is connected to the output terminal of the second protection circuit, the output terminal of the AND gate, the first terminal of the 29th resistor, the first terminal of the 11th capacitor, and the anode of the fifth optocoupler are connected, the second terminal of the 29th resistor, the second terminal of the 11th capacitor, and the cathode of the fifth optocoupler are grounded, the collector of the fifth optocoupler is connected to the first terminal of the 30th resistor, the second terminal of the 30th resistor is connected to the positive power supply terminal, the emitter of the fifth optocoupler, the first terminal of the 31st resistor, and the first terminal of the 12th capacitor are connected to form the signal output terminal of the third signal output circuit, and the second terminal of the 31st resistor and the second terminal of the 12th capacitor are grounded.

[0031] Optionally, the voltage conversion circuit includes a first switching transistor, an inductor, a thirteenth capacitor, and a third diode;

[0032] The cathode of the third diode, the first terminal of the thirteenth capacitor, and the positive power supply terminal of the rectifier circuit are connected to form the positive power supply output terminal of the voltage conversion circuit. The anode of the third diode, the first terminal of the first switch, and the first terminal of the inductor are connected. The second terminal of the inductor and the second terminal of the thirteenth capacitor are connected to form the negative power supply output terminal of the voltage conversion circuit. The second terminal of the first switch is connected to the negative power supply terminal of the rectifier circuit. The control terminal of the first switch is connected to the signal terminal of the main controller and the output terminal of the second signal output circuit, respectively.

[0033] A second aspect of this utility model provides a brake driver, including a main controller and a brake power supply circuit as described above, wherein the main controller is connected to the brake power supply circuit.

[0034] A third aspect of this utility model provides an elevator brake device, including a brake actuator and a brake driver as described above, wherein the brake driver and the brake actuator are connected.

[0035] Compared with the prior art, the beneficial effects of this utility model embodiment are as follows: The above-mentioned brake power supply circuit includes a main power supply circuit, a sampling circuit, a first protection circuit, a second protection circuit, a first signal output circuit, and a second signal output circuit. The main power supply circuit includes a rectifier circuit, a voltage conversion circuit, and a first switch circuit and a second switch circuit connected in parallel. When an abnormal situation occurs in the power supply or the brake control signal output to the brake in the main power supply circuit, the first protection circuit triggers the output of a first enable signal. The first signal output circuit triggers the shutdown of the first switch circuit and the second switch circuit based on the first enable signal. The second protection circuit triggers the output of a second enable signal. The second signal output circuit triggers the shutdown of the voltage conversion circuit based on the second enable signal, thereby cutting off the power supply to the brake and switching the brake to the brake braking state. The brake power supply circuit does not require the installation of a brake and adopts a circuit structure, realizing the miniaturization of the brake device and reducing the design cost. Attached Figure Description

[0036] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0037] Figure 1 A schematic diagram of a first structure of the brake power supply circuit provided in an embodiment of this utility model;

[0038] Figure 2 This is a schematic diagram of the structure of the brake driver provided in an embodiment of the present invention;

[0039] Figure 3 A circuit diagram of the first protection circuit provided for an embodiment of this utility model;

[0040] Figure 4 A circuit diagram of the second protection circuit provided in an embodiment of this utility model;

[0041] Figure 5 A circuit diagram of the first signal output circuit provided for an embodiment of this utility model;

[0042] Figure 6 This is a schematic diagram of the structure of the second signal output circuit provided in an embodiment of the present invention;

[0043] Figure 7 A circuit diagram of the main power supply circuit 10 provided in an embodiment of this utility model;

[0044] Figure 8A schematic diagram of a second structure of the brake power supply circuit provided in an embodiment of this utility model;

[0045] Figure 9 A circuit diagram of the third signal output circuit provided for an embodiment of this utility model;

[0046] Figure 10 This is a schematic diagram of the elevator brake device provided in an embodiment of the present invention. Detailed Implementation

[0047] To make the technical problem to be solved, the technical solution, and the beneficial effects of this utility model clearer, the present utility model will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present utility model and are not intended to limit the present utility model.

[0048] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this utility model, "a plurality of" means two or more, unless otherwise explicitly specified.

[0049] A first aspect of this utility model provides a brake power supply circuit 100 for outputting a power signal to the brake 2, wherein, as... Figure 10 As shown, the brake 2 is also connected to the main controller 200. When the brake 2 is in the brake release state, the main controller 200 outputs a brake control signal to the brake 2 and a corresponding power control signal to the brake power circuit 100. The brake power circuit 100 triggers the output power signal to the brake 2 based on the brake control signal. After the brake 2 is powered on and receives the brake control signal, it switches to the brake release state and releases the corresponding module, such as the corresponding component in the elevator. The elevator will not brake. In case of an abnormality, the main controller 200 will cut off the output of the brake control signal. At the same time, the main controller 200 outputs the corresponding power control signal to the brake power circuit 100. The brake power circuit 100 stops outputting the power signal. After the brake 2 has no working power and no brake control signal, the brake 2 switches to the brake locking mode and brakes the corresponding module, such as the corresponding component in the elevator. The elevator is braked to avoid overshooting or bottoming out.

[0050] In order to achieve automatic detection and power output control, in one optional embodiment, such as Figure 1 As shown, the brake power supply circuit 100 includes:

[0051] The main power circuit 10 includes a rectifier circuit 11, a voltage conversion circuit 12 and a power output circuit connected in sequence. The power output circuit includes a first switching circuit 13 and a second switching circuit 14 connected in parallel between the voltage conversion circuit 12 and the brake 2.

[0052] The sampling circuit 60 is connected to the output terminal of the voltage conversion circuit 12, the output terminal of the first switching circuit 13, the output terminal of the second switching circuit 14, and the control signal terminal of the holding brake 2, and samples and outputs the corresponding first potential signal VDC_FB, second potential signal K1_FB, third potential signal K2_FB and fourth potential signal Y2_FB.

[0053] The first protection circuit 20 is connected to the sampling circuit 60. The first protection circuit 20 is used to detect the potentials of the first potential signal VDC_FB, the second potential signal K1_FB and the fourth potential signal Y2_FB, and outputs the first enable signal EN1 when the potential signals are not at the same potential.

[0054] The second protection circuit 30 is connected to the sampling circuit 60. The second protection circuit 30 is used to detect the potential of the first potential signal VDC_FB, the third potential signal K2_FB and the fourth potential signal Y2_FB, and output the second enable signal EN2 when the potential signals are not at the same potential.

[0055] The first signal output circuit 40 is connected to the first protection circuit 20. It is triggered by the first enable signal EN1 to output a first shutdown signal to shut down the first switch circuit 13 and the second switch circuit 14.

[0056] The second signal output circuit 50 is connected to the second protection circuit 30 and is triggered by the second enable signal EN2 to output the second shutdown signal to shut down the voltage conversion circuit 12.

[0057] In this embodiment, the main power circuit 10 outputs a power signal or cuts off the output power signal to the brake 2 based on each control signal.

[0058] Among them, such as Figure 2 As shown, the first switching circuit 13, the second switching circuit 14 and the voltage conversion circuit 12 are also connected to the main controller 200. The main controller 200 is used to output the brake control signal to the control signal terminal of the brake 2, output the first switching signal to the first switching circuit 13 and the second switching signal to the second switching circuit 14, and output the voltage conversion signal to the voltage conversion circuit 12.

[0059] Under normal operating conditions, the main controller 200 outputs corresponding voltage conversion signals to the voltage conversion circuit 12. The AC power supply is rectified by the rectifier circuit 11 and converted to DC power. The DC power supply is then stepped down by the voltage conversion circuit 12. Simultaneously, the main controller 200 outputs a first switch signal and a second switch signal to the first switch circuit 13 and the second switch circuit 14. The first switch circuit 13 and the second switch circuit 14 are activated, and two power signals are output to the brake 2. These two power signals constitute redundant power supply, improving power supply reliability. At the same time, the main controller 200 also outputs a brake control signal to the brake 2. The brake 2 switches to the brake release state and releases the corresponding module, such as releasing a corresponding component in the elevator, preventing the elevator from braking.

[0060] At this time, the sampling circuit 60 samples the output voltage of the voltage conversion circuit 12, the output voltage of the first switching circuit 13, the output voltage of the second switching circuit 14, and the output state of the brake control signal, and converts them into corresponding high and low potentials. When all circuits of the brake power supply circuit 100 are normal and the main controller 200 outputs the brake control signal normally, the first potential signal VDC_FB, the second potential signal K1_FB, the third potential signal K2_FB, and the fourth potential signal Y2_FB are all at high level. At this time, when the first protection circuit 20 detects that the first potential signal VDC_FB, the second potential signal K1_FB, and the fourth potential signal Y2_FB are at the same potential, the first protection circuit 20 will not output the first enable signal EN1. Similarly, when the second protection circuit 30 detects that the first potential signal VDC_FB, the third potential signal K2_FB, and the fourth potential signal Y2_FB are at the same high potential, the second protection circuit 30 will not output the second enable signal EN2.

[0061] If the first signal output circuit 40 does not receive the first enable signal EN1, the first signal output circuit 40 will not output the first shutdown signal to the first switch circuit 13 and the second switch circuit 14. The two switch circuits will normally switch on and off, and when there is a power signal input at the front end, the two switch circuits will normally output a power signal to the holding brake 2.

[0062] When the second signal output circuit 50 does not receive the second enable signal EN2, the second signal output circuit 50 will not output the second shutdown signal to the voltage conversion circuit 12. The voltage conversion circuit 12 will continue to perform voltage conversion normally and output the stepped-down voltage signal to the first switch circuit 13 and the second switch circuit 14 at the back end.

[0063] And when an abnormal state occurs, such as the first switch circuit 13 being abnormally shut down, the second potential signal K1_FB changes to a low level. The first protection circuit 20 detects that the three potential signals are not the same. At this time, the first protection circuit 20 triggers the output of the first enable signal EN1. After receiving the first enable signal EN1, the first signal output circuit 40 triggers the output of the first shutdown signal to the first switch circuit 13 and the second switch circuit 14, simultaneously shutting down the two switch circuits, thereby cutting off the power supply to the brake 2 and switching the brake 2 to the brake locking mode.

[0064] Similarly, when the second switching circuit 14 is abnormally shut down, the third potential signal K2_FB changes to a low level. When the second protection circuit 30 detects that the three potential signals are not the same, it triggers the output of the second enable signal EN2. After receiving the second enable signal EN2, the second signal output circuit 50 triggers the output of the second shutdown signal to the voltage conversion circuit 12. The voltage conversion circuit 12 shuts down and cuts off the output voltage signal to the downstream switching circuit and the brake 2. The brake 2 switches to the brake locking mode.

[0065] When the voltage conversion circuit 12 malfunctions and causes no voltage signal output, the first potential signal VDC_FB switches to a low level. The first protection circuit 20 detects that the three potential signals are not the same. At this time, the first protection circuit 20 triggers the output of the first enable signal EN1. After receiving the first enable signal EN1, the first signal output circuit 40 triggers the output of the first shutdown signal to the first switch circuit 13 and the second switch circuit 14, and simultaneously shuts down the two switch circuits.

[0066] At the same time, when the second protection circuit 30 detects that the three potential signals are not the same, the second protection circuit 30 triggers the output of the second enable signal EN2. After receiving the second enable signal EN2, the second signal output circuit 50 triggers the output of the second shutdown signal to the voltage conversion circuit 12. The voltage conversion circuit 12 shuts down and cuts off the output voltage signal to the downstream switching circuit and the brake 2. The brake 2 switches to the brake locking mode.

[0067] Similarly, when the main controller 200 malfunctions and there is no brake control signal output, the fourth potential signal Y2_FB switches to a low level. The first protection circuit 20 triggers and outputs the first enable signal EN1. The first signal output circuit 40 outputs the first shutdown signal to the first switch circuit 13 and the second switch circuit 14, simultaneously shutting down both switch circuits. The second protection circuit 30 triggers and outputs the second enable signal EN2. The second signal output circuit 50 outputs the second shutdown signal to the voltage conversion circuit 12. The voltage conversion circuit 12 shuts down and cuts off the output voltage signal to the downstream switch circuit and the brake 2. The brake 2 switches to the brake locking mode. This achieves abnormal protection under normal elevator operation.

[0068] And when the corresponding module is in a stopped working state, such as when the elevator is in a stopped state, the main controller 200 outputs a voltage conversion signal, a first switch signal and a second switch signal to control the voltage conversion circuit 12 to turn off, the first switch circuit 13 to turn off and the second switch circuit 14 to turn off, and the main controller 200 cuts off the output of the brake control signal to the brake 2. At this time, all potential signals are at a low potential.

[0069] At this time, the first protection circuit 20 detects that all three potential signals are at a low level. The first protection circuit 20 will not output the first enable signal EN1, and the first signal output circuit 40 will not output the first shutdown signal to the first switch circuit 13 and the second switch circuit 14. The two switch circuits remain in the off state.

[0070] The second protection circuit 30 detects that all three potential signals are at a low level. The second protection circuit 30 will not output the second enable signal EN2, and the second signal output circuit 50 will not output the second shutdown signal to the voltage conversion circuit 12. The voltage conversion circuit 12 remains in the shutdown state.

[0071] When an abnormal state occurs, such as when the voltage conversion circuit 12 malfunctions and outputs a voltage signal, or when the brake 2 abnormally receives a power signal and brake controller signal, the first protection circuit 20 and the second protection circuit 30 output corresponding first enable signals EN1 and EN2. The first signal output circuit 40 outputs a first shutdown signal to the first switch circuit 13 and the second switch circuit 14, simultaneously shutting down both switch circuits. The second signal output circuit 50 outputs a second shutdown signal to the voltage conversion circuit 12, which shuts down and cuts off the output voltage signal to the downstream switch circuits and brake 2, switching brake 2 to brake locking mode. This achieves abnormal protection during elevator shutdown.

[0072] The rectifier circuit 11 can adopt a corresponding rectifier bridge BR1, rectifier, or other structure; the voltage conversion circuit 12 can adopt a corresponding voltage divider circuit, boost converter, or other structure; the first switching circuit 13 and the second switching circuit 14 can adopt corresponding switching devices; and the first protection circuit 20 and the second protection circuit 30 can adopt corresponding logic gates, level detection circuits, or other structures. In an optional embodiment, such as... Figure 3 and Figure 4 As shown, the first protection circuit 20 includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a first capacitor C1, a second capacitor C2, a third capacitor C3, a first diode D1, a first XNOR gate U1, a second XNOR gate U2, a first NAND gate U3, a first inverter U4, and a first optocoupler U01.

[0073] The first terminal of the first resistor R1 is used to input the fourth potential signal Y2_FB. The second terminal of the first resistor R1 is connected to the first input terminal of the first XNOR gate U1. The first terminal of the second resistor R2 is used to input the second potential signal K1_FB. The second terminal of the second resistor R2, the cathode of the first diode D1, the first terminal of the third resistor R3, and the second input terminal of the first XNOR gate U1 are connected. The anode of the first diode D1 is connected to the first terminal of the fourth resistor R4. The second terminal of the fourth resistor R4 is used to input the first analog signal Ctr11. The second terminal of the third resistor R3 is grounded. The output terminal of the first XNOR gate U1 is connected to the first input terminal of the first NAND gate U3. The first terminal of the fifth resistor R5 is used to input the first potential signal VDC_FB. The second terminal of the fifth resistor R5 is connected to the first input terminal of the second XNOR gate U2. The first terminal of the sixth resistor R6 is used to input the fourth potential signal Y2_FB. The second terminal of the sixth resistor R6 is connected to the second input terminal of the second XNOR gate U2. The output of the NAND gate U2 is connected to the second input of the first NAND gate U3. The output of the first NAND gate U3 is connected to the first end of the seventh resistor R7. The second end of the seventh resistor R7, the first end of the first capacitor C1, and the input of the first inverter U4 are connected. The second end of the first capacitor C1 is grounded. The output of the first inverter U4 is connected to the first end of the eighth resistor R8. The second end of the eighth resistor R8, the first end of the ninth resistor R9, the first end of the second capacitor C2, and the anode of the first optocoupler U01 are connected. The second end of the ninth resistor R9, the second end of the second capacitor C2, and the cathode of the first optocoupler U01 are grounded. The collector of the first optocoupler U01 is connected to the first end of the tenth resistor R10. The second end of the tenth resistor R10 is connected to the positive voltage terminal. The emitter of the first optocoupler U01, the first end of the eleventh resistor R11, and the first end of the third capacitor C3 are connected to form the output of the first protection circuit 20. The second end of the eleventh resistor R11 and the second end of the third capacitor C3 are grounded.

[0074] In this embodiment, the first enable signal EN1 is low. Under normal operating conditions, the first switch circuit 13, the second switch circuit 14, and the voltage conversion circuit 12 are in normal operating conditions and output two power signals to the brake 2. The main controller 200 also outputs a brake control signal to the brake 2. The brake 2 switches to the brake release state and releases the corresponding module, such as the corresponding component in the elevator. The elevator will not brake.

[0075] At this time, the sampling circuit 60 samples the output voltage of the voltage conversion circuit 12, the output voltage of the first switching circuit 13, the output voltage of the second switching circuit 14, and the output state of the brake control signal, and converts them into corresponding high and low potentials. When all circuits of the brake power supply circuit 100 are normal and the main controller 200 outputs the brake control signal normally, the first potential signal VDC_FB, the second potential signal K1_FB, the third potential signal K2_FB, and the fourth potential signal Y2_FB are all at high level. At this time, the first XOR gate U1 outputs a high level, the second XOR gate U2 outputs a high level, the first NAND gate U3 outputs a low level, the first inverter U4 outputs a high level, the first optocoupler U01 is turned on and outputs a high level to the first signal output circuit 40, the first signal output circuit 40 is turned off and outputs a first turn-off signal to the first switching circuit 13 and the second switching circuit 14. The two switching circuits are normally turned on and off, and when there is a power signal input at the front end, the two switching circuits normally output a power signal to the brake 2.

[0076] When an abnormal state occurs, at least one of the first potential signal VDC_FB, the second potential signal K1_FB, and the fourth potential signal Y2_FB is at a low level. At this time, the first XNOR gate U1 and / or the second XNOR gate U2 output at least one low level, the first NAND gate U3 outputs a high level, the first inverter U4 outputs a low level, and the first optocoupler U01 shuts down and outputs a low-level first enable signal EN1. After receiving the first enable signal EN1, the first signal output circuit 40 triggers the output of a first shutdown signal to the first switch circuit 13 and the second switch circuit 14, simultaneously shutting down the two switch circuits, thereby cutting off the power supply to the brake 2 and switching the brake 2 to the brake locking mode.

[0077] Meanwhile, when only the second switching circuit 14 is needed to control the power signal on and off, the main controller 200 can output a first switching signal to control the first switching circuit 13 to turn off. At the same time, the main controller 200 can output a high-level first analog signal Ctr11. At this time, the second potential signal K1_FB remains at a low level. The first analog signal Ctr11 can pull the second input terminal of the first XOR gate U1 to a high level. The first analog signal Ctr11 replaces the second potential signal K1_FB when the first switching circuit 13 is working normally. Thus, when the first switching circuit 13 is out of working state, a normal potential signal is provided to the first protection circuit 20, and a single-channel power output is completed.

[0078] And when the corresponding module is in a stopped working state, such as when the elevator is in a stopped state, the main controller 200 outputs a voltage conversion signal, a first switch signal and a second switch signal to control the voltage conversion circuit 12 to turn off, the first switch circuit 13 to turn off and the second switch circuit 14 to turn off, and the main controller 200 cuts off the output of the brake control signal to the brake 2. At this time, all potential signals are at a low potential.

[0079] At this time, the first XOR gate U1 outputs a high level, the second XOR gate U2 outputs a high level, the first NAND gate U3 outputs a low level, the first inverter U4 outputs a high level, the first optocoupler U01 is turned on and outputs a high level to the first signal output circuit 40, the first signal output circuit 40 is turned off and outputs a first turn-off signal to the first switch circuit 13 and the second switch circuit 14. The two switch circuits are normally turned on and off, and the two switch circuits remain in the off state.

[0080] Meanwhile, when only the second switching circuit 14 is needed to control the power signal on and off, the main controller 200 can output a first switching signal to control the first switching circuit 13 to turn off. At the same time, the main controller 200 can output a low-level first analog signal Ctr11. At this time, the second potential signal K1_FB is low. The first analog signal Ctr11 can pull the second input terminal of the first XOR gate U1 to a low level. The first analog signal Ctr11 replaces the second potential signal K1_FB when the first switching circuit 13 is working normally. Thus, when the first switching circuit 13 is out of working state, a normal potential signal is provided to the first protection circuit 20, and a single power output is completed.

[0081] Correspondingly, such as Figure 4 As shown, in an optional embodiment, the second protection circuit 30 includes a twelfth resistor R12, a thirteenth resistor R13, a fourteenth resistor R14, a fifteenth resistor R15, a sixteenth resistor R16, a seventeenth resistor R17, an eighteenth resistor R18, a nineteenth resistor R19, a twentieth resistor R20, a twenty-first resistor R21, a twenty-second resistor R22, a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6, a second diode D2, a third XNOR gate U5, a fourth XNOR gate U6, a second NAND gate U7, a second inverter U8, and a second optocoupler U02;

[0082] The first terminal of the twelfth resistor R12 is used to input the fourth potential signal Y2_FB. The second terminal of the twelfth resistor R12 is connected to the first input terminal of the third XNOR gate U5. The first terminal of the thirteenth resistor R13 is used to input the third potential signal K2_FB. The second terminal of the thirteenth resistor R13, the cathode of the second diode D2, the first terminal of the fourteenth resistor R14, and the second input terminal of the third XNOR gate U5 are connected. The anode of the second diode D2 is connected to the first terminal of the fifteenth resistor R15. The second terminal of the fifteenth resistor R15 is used to input the second analog signal Ctr12. The second terminal of the fourteenth resistor R14 is grounded. The output terminal of the third XNOR gate U5 is connected to the first input terminal of the second NAND gate U7. The first terminal of the sixteenth resistor R16 is used to input the first potential signal VDC_FB. The second terminal of the sixteenth resistor R16 is connected to the first input terminal of the fourth XNOR gate U6. The first terminal of the seventeenth resistor R17 is used to input the fourth potential signal Y2_FB. The second terminal of the seventeenth resistor R17 is connected to the second input terminal of the fourth XNOR gate U6. The output of the fourth NAND gate U6 is connected to the second input of the second NAND gate U7. The output of the second NAND gate U7 is connected to the first end of the eighteenth resistor R18. The second end of the eighteenth resistor R18, the first end of the fourth capacitor C4, and the input of the second inverter U8 are connected. The second end of the fourth capacitor C4 is grounded. The output of the second inverter U8 is connected to the first end of the nineteenth resistor R19. The second end of the nineteenth resistor R19, the first end of the twentieth resistor R20, the first end of the fifth capacitor C5, and the anode of the second optocoupler U02 are connected. The second end of the twentieth resistor R20, the second end of the fifth capacitor C5, and the cathode of the second optocoupler U02 are grounded. The collector of the second optocoupler U02 is connected to the first end of the twenty-first resistor R21. The second end of the twenty-first resistor R21 is connected to the positive voltage terminal. The emitter of the second optocoupler U02, the first end of the twenty-second resistor R22, and the first end of the sixth capacitor C6 are connected to form the output of the second protection circuit 30. The second end of the twenty-second resistor R22 and the second end of the sixth capacitor C6 are grounded.

[0083] In this embodiment, the second enable signal EN2 is low. Under normal operating conditions, the first switch circuit 13, the second switch circuit 14, and the voltage conversion circuit 12 are in normal operating conditions and output two power signals to the brake 2. The main controller 200 also outputs a brake control signal to the brake 2. The brake 2 switches to the brake release state and releases the corresponding module, such as the corresponding component in the elevator. The elevator will not brake.

[0084] At this time, the sampling circuit 60 samples the output voltage of the voltage conversion circuit 12, the output voltage of the first switching circuit 13, the output voltage of the second switching circuit 14, and the output state of the brake control signal, and converts them into corresponding high and low potentials. When all circuits of the brake power supply circuit 100 are normal and the main controller 200 outputs the brake control signal normally, the first potential signal VDC_FB, the second potential signal K1_FB, the third potential signal K2_FB, and the fourth potential signal Y2_FB are all at high level. At this time, the third XOR gate U5 outputs a high level, the fourth XOR gate U6 outputs a high level, the second NAND gate U7 outputs a low level, the second inverter U8 outputs a high level, the second optocoupler U02 is turned on and outputs a high level to the second signal output circuit 50, the second signal output circuit 50 is turned off and outputs a second turn-off signal to the voltage conversion circuit 12, the voltage conversion circuit 12 continues to perform voltage conversion normally, and outputs the stepped-down voltage signal to the first switching circuit 13 and the second switching circuit 14 at the back end.

[0085] When an abnormal state occurs, at least one of the first potential signal VDC_FB, the third potential signal K2_FB, and the fourth potential signal Y2_FB is at a low level. At this time, the third XOR gate U5 and / or the fourth XOR gate U6 output at least one low level, the second NAND gate U7 outputs a high level, the second inverter U8 outputs a low level, and the second optocoupler U02 turns off and outputs a low-level second enable signal EN2. After receiving the second enable signal EN2, the second signal output circuit 50 triggers the output of a second turn-off signal to the voltage conversion circuit 12. The voltage conversion circuit 12 turns off and cuts off the output voltage signal to the downstream switching circuit and the brake 2. The brake 2 switches to the brake locking mode.

[0086] Meanwhile, when only the first switching circuit 13 is needed to control the power signal on and off, the main controller 200 can output a second switching signal to control the second switching circuit 14 to turn off. At the same time, the main controller 200 can output a high-level second analog signal Ctr12. At this time, the third potential signal K2_FB remains at a low level. The second analog signal Ctr12 can pull the second input terminal of the third XOR gate U5 to a high level. The second analog signal Ctr12 replaces the third potential signal K2_FB when the second switching circuit 14 is working normally. Thus, when the second switching circuit 14 is out of working state, a normal potential signal is provided to the second protection circuit 30, and a single-channel power output is completed.

[0087] And when the corresponding module is in a stopped working state, such as when the elevator is in a stopped state, the main controller 200 outputs a voltage conversion signal, a first switch signal and a second switch signal to control the voltage conversion circuit 12 to turn off, the first switch circuit 13 to turn off and the second switch circuit 14 to turn off, and the main controller 200 cuts off the output of the brake control signal to the brake 2. At this time, all potential signals are at a low potential.

[0088] At this time, the third XOR gate U5 outputs a high level, the fourth XOR gate U6 outputs a high level, the second NAND gate U7 outputs a low level, the second inverter U8 outputs a high level, the second optocoupler U02 is turned on and outputs a high level to the second signal output circuit 50, the second signal output circuit 50 is turned off and outputs the voltage conversion circuit 12, and the voltage conversion circuit 12 remains in the off state.

[0089] Meanwhile, when only the first switching circuit 13 is needed to control the power signal on and off, the main controller 200 can output a second switching signal to control the second switching circuit 14 to turn off. At the same time, the main controller 200 can output a low-level second analog signal Ctr12. At this time, the third potential signal K2_FB is low. The second analog signal Ctr12 can pull the second input terminal of the third XOR gate U5 to a low level. The second analog signal Ctr12 replaces the third potential signal K2_FB when the second switching circuit 14 is working normally. Thus, when the second switching circuit 14 is out of working state, a normal potential signal is provided to the first protection circuit 20, and a single power output is completed.

[0090] The first signal output circuit 40 can output two first shutdown signals to the first switch circuit 13 and the second switch circuit 14. The first signal output circuit 40 and the second signal output circuit 50 can employ corresponding signal generators, level conversion circuits, etc. In an optional embodiment, such as... Figure 5 As shown, the first signal output circuit 40 includes a first power supply chip DC1, a first optocoupler circuit 41, and a second optocoupler circuit 42.

[0091] The power input terminal of the first power chip DC1 is connected to the positive power terminal VDD, and the power output terminal of the first power chip DC1 is connected to the input terminal of the first optocoupler circuit 41 and the input terminal of the second optocoupler circuit 42 respectively.

[0092] The first optocoupler circuit 41 includes a twenty-third resistor R23, a twenty-fourth resistor R24, a twenty-fifth resistor R25, a seventh capacitor C7, an eighth capacitor C8, and a third optocoupler U03;

[0093] The first terminal of the 23rd resistor R23, the first terminal of the 7th capacitor C7, and the anode of the 3rd optocoupler U03 are connected to form the input terminal of the first optocoupler circuit 41. The second terminal of the 23rd resistor R23, the second terminal of the 7th capacitor C7, and the cathode of the 3rd optocoupler U03 are grounded. The collector of the 3rd optocoupler U03 is connected to the first terminal of the 24th resistor R24. The second terminal of the 24th resistor R24 ​​is connected to the positive power supply terminal VDD. The emitter of the 3rd optocoupler U03, the first terminal of the 25th resistor R25, and the first terminal of the 8th capacitor C8 are connected to the control terminal of the first switching circuit 13. The second terminal of the 25th resistor R25 and the second terminal of the 8th capacitor C8 are grounded.

[0094] The second optocoupler circuit 42 includes a twenty-sixth resistor R26, a twenty-seventh resistor R27, a twenty-eighth resistor R28, a ninth capacitor C9, a tenth capacitor C10, and a fourth optocoupler U04.

[0095] The first end of the twenty-sixth resistor R26, the first end of the ninth capacitor C9, and the anode of the fourth optocoupler U04 are connected to form the input terminal of the second optocoupler circuit 42. The second end of the twenty-sixth resistor R26, the second end of the ninth capacitor C9, and the cathode of the fourth optocoupler U04 are grounded. The collector of the fourth optocoupler U04 is connected to the first end of the twenty-seventh resistor R27. The second end of the twenty-seventh resistor R27 is connected to the positive power supply terminal VDD. The emitter of the fourth optocoupler U04, the first end of the twenty-eighth resistor R28, and the first end of the tenth capacitor C10 are connected to the control terminal of the second switch circuit 14. The second end of the twenty-eighth resistor R28 and the second end of the tenth capacitor C10 are grounded.

[0096] In this embodiment, the first power chip DC1 performs voltage conversion, for example, stepping down 12V to 5V. When the first signal output circuit 40 does not receive the first enable signal EN1, the first power chip DC1 normally outputs the converted voltage signal. At this time, the third optocoupler U03 and the fourth optocoupler U04 are turned on. The third optocoupler U03 outputs a high level to the first switching circuit 13, and the fourth optocoupler U04 outputs a high level to the second switching circuit 14. The first switching circuit 13 and the second switching circuit 14 are triggered to turn on after receiving the high level.

[0097] When the first signal output circuit 40 receives the first enable signal EN1, the first power chip DC1 has no voltage signal output. At this time, the third optocoupler U03 and the fourth optocoupler U04 are turned off. The third optocoupler U03 and the fourth optocoupler U04 respectively output a low-level first turn-off signal to the first switch circuit 13 and the second switch circuit 14. The first switch circuit 13 and the second switch circuit 14 are triggered to turn off after receiving the first turn-off signal.

[0098] like Figure 6As shown, in an optional embodiment, the second signal output circuit 50 includes a second power supply chip 51 and a driver 52;

[0099] The power input terminal of the second power chip 51 is connected to the positive power supply terminal VDD, and the power output terminal of the second power chip 51 is connected to the power supply terminal of the driver 52. The driver 52 is used to output voltage conversion signals to the voltage conversion circuit 12.

[0100] In this embodiment, the second power chip 51 performs voltage conversion, for example, stepping down 12V to 5V. When the second signal output circuit 50 does not receive the second enable signal EN2, the second power chip 51 normally outputs the converted voltage signal to the driver 52, the driver 52 normally outputs the voltage conversion signal, and the voltage conversion circuit 12 works normally.

[0101] And when the second signal output circuit 50 receives the second enable signal EN2, the second power chip 51 cuts off the output voltage signal to the driver 52, the driver 52 cuts off the output voltage conversion signal, and the voltage conversion circuit 12 is turned off.

[0102] The rectifier circuit 11 can adopt a corresponding rectifier bridge BR1, rectifier, or other structure; the voltage conversion circuit 12 can adopt a corresponding voltage divider circuit, boost converter, or other structure; and the first switching circuit 13 and the second switching circuit 14 can adopt corresponding switching devices. In an optional embodiment, such as... Figure 7 As shown, the rectifier circuit 11 includes a rectifier bridge BR1, and the voltage conversion circuit 12 includes a first switching transistor Q1, an inductor L1, a thirteenth capacitor C13, and a third diode D3.

[0103] The cathode of the third diode D3, the first terminal of the thirteenth capacitor C13, and the positive power supply terminal VDD of the rectifier circuit 11 are connected to form the positive power supply output terminal of the voltage conversion circuit 12. The anode of the third diode D3, the first terminal of the first switch Q1, and the first terminal of the inductor L1 are connected. The second terminal of the inductor L1 and the second terminal of the thirteenth capacitor C13 are connected to form the negative power supply output terminal of the voltage conversion circuit 12. The second terminal of the first switch Q1 is connected to the negative power supply terminal of the rectifier circuit 11. The control terminal of the first switch Q1 is connected to the signal terminal of the main controller 200 and the output terminal of the second signal output circuit 50, respectively.

[0104] The first switch Q1, the first inductor L1, and the third diode D3 form a step-down circuit. The first switch Q1 turns on and off according to the received voltage conversion signal and performs step-down conversion, and is triggered to turn off when the second turn-off signal is received.

[0105] The first switching circuit 13 uses the second switching transistor K1, and the second switching circuit 14 uses the third switching transistor K2. In order to improve the safety of voltage output, the second switching transistor K1 and the third switching transistor K2 are IGBT transistors, and the first switching transistor Q1 is a MOSFET. The second switching transistor K1 and the third switching transistor K2 are triggered to turn on when they receive a high level and triggered to turn off when they receive a low level.

[0106] In order to achieve multiple power output control of the main power circuit 10, in an optional embodiment, such as Figure 7 As shown, the main power supply circuit 10 also includes:

[0107] Relay RLY1 is connected in series between voltage conversion circuit 12 and first switching circuit 13 and second switching circuit 14. When the coil of relay RLY1 is energized, it engages and transmits a voltage signal to the first switching circuit 13 and second switching circuit 14. When the coil of relay RLY1 is not energized, it disengages, cutting off the output voltage signal to the first switching circuit 13 and second switching circuit 14. The voltage signal of the relay RLY1 coil can be provided by a corresponding circuit in the main controller 200 and the brake power supply circuit 100. In an optional embodiment, such as... Figure 8 As shown, the brake power supply circuit 100 also includes:

[0108] The third signal output circuit 70 is connected to the coil of relay RLY1, the first protection circuit 20, and the second protection circuit 30, respectively. The third signal output circuit 70 is used to detect the potential of the output signals of the first protection circuit 20 and the second protection circuit 30, and cuts off the output voltage enable signal EN3 to the coil of relay RLY1 when the potentials of the two output signals are different, so as to turn off relay RLY1.

[0109] In this embodiment, under normal operating conditions, the first protection circuit 20 and the second protection circuit 30 do not output the first enable signal EN1 and the second enable signal EN2, that is, they output two high-level signals. At this time, the third signal output circuit 70 outputs the voltage enable signal EN3 to the coil of the relay RLY1. The relay RLY1 is energized and transmits the voltage signal to the first switch circuit 13 and the second switch circuit 14.

[0110] In abnormal conditions, at least one of the first protection circuit 20 and the second protection circuit 30 outputs a low-level enable signal. At this time, the third signal output circuit 70 cuts off the output voltage enable signal EN3 to the coil of the relay RLY1. The relay RLY1 is not energized and disconnected, and the output voltage signal to the first switch circuit 13 and the second switch circuit 14 is cut off.

[0111] By setting the third signal output circuit 70 to realize the logical judgment of the two enable signals and correspondingly control the on and off operation of the relay RLY1, the power output control of the main power circuit 10 motor can be further realized, improving the reliability of power output control under abnormal conditions and ensuring the braking control of the holding brake 2.

[0112] Correspondingly, the third signal output circuit 70 can employ appropriate logic gates, level conversion circuits, etc., as in an optional embodiment, such as... Figure 9 As shown, the third signal output circuit 70 includes an AND gate U9, a twenty-ninth resistor R29, a thirtieth resistor R30, a thirty-first resistor R31, an eleventh capacitor C11, a twelfth capacitor C12, and a fifth optocoupler U05.

[0113] The first input terminal of AND gate U9 is connected to the output terminal of the first protection circuit 20, and the second input terminal of AND gate U9 is connected to the output terminal of the second protection circuit 30. The output terminal of AND gate U9, the first terminal of the twenty-ninth resistor R29, the first terminal of the eleventh capacitor C11, and the anode of the fifth optocoupler U05 are connected. The second terminal of the twenty-ninth resistor R29, the second terminal of the eleventh capacitor C11, and the cathode of the fifth optocoupler U05 are grounded. The collector of the fifth optocoupler U05 is connected to the first terminal of the thirtieth resistor R30. The second terminal of the thirtieth resistor R30 is connected to the positive power supply terminal VDD. The emitter of the fifth optocoupler U05, the first terminal of the thirty-first resistor R31, and the first terminal of the twelfth capacitor C12 are connected to form the signal output terminal of the third signal output circuit 70. The second terminal of the thirty-first resistor R31 and the second terminal of the twelfth capacitor C12 are grounded.

[0114] In this embodiment, under normal operating conditions, the first protection circuit 20 and the second protection circuit 30 do not output the first enable signal EN1 and the second enable signal EN2, that is, they output two high-level signals. At this time, the AND gate U9 outputs a high level, the fifth optocoupler U05 is turned on, and outputs a high-level voltage enable signal EN3 to the coil of the relay RLY1. The relay RLY1 is energized and transmits a voltage signal to the first switch circuit 13 and the second switch circuit 14.

[0115] In abnormal conditions, at least one of the first protection circuit 20 and the second protection circuit 30 outputs a low-level enable signal. At this time, AND gate U9 outputs a low level, the fifth optocoupler U05 is turned off, and the output voltage enable signal EN3 is cut off to the coil of relay RLY1. Relay RLY1 is not powered on and disconnected, and the output voltage signal is cut off to the first switch circuit 13 and the second switch circuit 14.

[0116] The beneficial effects of this utility model embodiment compared with the prior art are as follows: The above-mentioned brake power supply circuit 100 includes a main power supply circuit 10, a sampling circuit 60, a first protection circuit 20, a second protection circuit 30, a first signal output circuit 40, and a second signal output circuit 50. The main power supply circuit 10 includes a rectifier circuit 11, a voltage conversion circuit 12, and a first switch circuit 13 and a second switch circuit 14 connected in parallel. When an abnormality occurs in the power supply corresponding to the main power supply circuit 10 or in the brake control signal output to the brake 2, the first protection circuit 20 is triggered. The first enable signal EN1 is output. The first signal output circuit 40 triggers the shutdown of the first switch circuit 13 and the second switch circuit 14 based on the first enable signal EN1. The second protection circuit 30 triggers the output of the second enable signal EN2. The second signal output circuit 50 triggers the shutdown of the voltage conversion circuit 12 based on the second enable signal EN2, thereby cutting off the power supply to the brake 2. The brake 2 switches to the brake braking state. The brake power supply circuit 100 does not need to be equipped with the brake 2 and adopts a circuit structure, which realizes the miniaturization of the brake device and reduces the design cost.

[0117] This utility model also proposes a brake actuator 521, such as Figure 10 As shown, the brake driver 521 includes a main controller 200 and the aforementioned brake power supply circuit 100. The specific structure of the brake power supply circuit 100 is as described in the above embodiments. Since this brake driver 521 adopts all the technical solutions of all the above embodiments, it has at least all the beneficial effects brought about by the technical solutions of the above embodiments, which will not be described in detail here. The main controller 200 is connected to the brake power supply circuit 100.

[0118] When the brake 2 is in the brake release state, the main controller 200 outputs a brake control signal to the brake 2 and a corresponding power control signal to the brake power circuit 100. The brake power circuit 100 triggers the output power signal to the brake 2 based on the brake control signal. After the brake 2 is powered on and receives the brake control signal, it switches to the brake release state and releases the corresponding module, such as the corresponding component in the elevator. The elevator will not brake. In case of an abnormality, the main controller 200 will cut off the output of the brake control signal. At the same time, the main controller 200 outputs the corresponding power control signal to the brake power circuit 100. The brake power circuit 100 stops outputting the power signal. After the brake 2 has no working power and no brake control signal, the brake 2 switches to the brake locking mode and brakes the corresponding module, such as the corresponding component in the elevator. The elevator is braked to avoid overshooting or bottoming out.

[0119] This utility model also proposes an elevator brake device, such as... Figure 10As shown, the elevator brake device can be applied to elevators. The elevator brake device includes a brake actuator 2 and the aforementioned brake driver 521. The specific structure of the brake driver 521 is as described in the above embodiments. Since this elevator brake device adopts all the technical solutions of all the above embodiments, it possesses at least all the beneficial effects brought about by the technical solutions of the above embodiments, which will not be elaborated further here. The brake driver 521 and the brake actuator 2 are connected.

[0120] The above-described embodiments are only used to illustrate the technical solutions of this utility model, and are not intended to limit it. Although this utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this utility model, and should all be included within the protection scope of this utility model.

Claims

1. A brake power supply circuit for outputting a power signal to the brake, characterized in that, The brake power supply circuit includes: The main power circuit includes a rectifier circuit, a voltage conversion circuit, and a power output circuit connected in sequence. The power output circuit includes a first switching circuit and a second switching circuit connected in parallel between the voltage conversion circuit and the brake. The sampling circuit is connected to the output terminal of the voltage conversion circuit, the output terminal of the first switching circuit, the output terminal of the second switching circuit, and the control signal terminal of the brake, respectively, and samples and outputs the corresponding first potential signal, second potential signal, third potential signal, and fourth potential signal. A first protection circuit is connected to the sampling circuit. The first protection circuit is used to detect the potentials of the first potential signal, the second potential signal, and the fourth potential signal, and output a first enable signal when the potential signals are not at the same potential. The second protection circuit is connected to the sampling circuit. The second protection circuit is used to detect the potentials of the first potential signal, the third potential signal and the fourth potential signal, and output a second enable signal when the potential signals are not at the same potential. The first signal output circuit is connected to the first protection circuit and is triggered by the first enable signal to output a first shutdown signal to shut down the first switch circuit and the second switch circuit. The second signal output circuit is connected to the second protection circuit and is triggered by the second enable signal to output a second shutdown signal to shut down the voltage conversion circuit.

2. The brake power supply circuit as described in claim 1, characterized in that, The first switching circuit and the second switching circuit are also connected to the main controller, which is used to output a brake control signal to the control signal terminal of the brake, output a first switching signal to the first switching circuit, and output a second switching signal to the second switching circuit. The first protection circuit includes a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a first capacitor, a second capacitor, a third capacitor, a first diode, a first XNOR gate, a second XNOR gate, a first NAND gate, a first inverter, and a first optocoupler; The first terminal of the first resistor is used to input the fourth potential signal. The second terminal of the first resistor is connected to the first input terminal of the first XOR gate. The first terminal of the second resistor is used to input the second potential signal. The second terminal of the second resistor, the cathode of the first diode, the first terminal of the third resistor, and the second input terminal of the first XOR gate are connected. The anode of the first diode is connected to the first terminal of the fourth resistor. The second terminal of the fourth resistor is used to input the first analog signal. The second terminal of the third resistor is grounded. The output terminal of the first XOR gate is connected to the first input terminal of the first NAND gate. The first terminal of the fifth resistor is used to input the first potential signal. The second terminal of the fifth resistor is connected to the first input terminal of the second XOR gate. The first terminal of the sixth resistor is used to input the fourth potential signal. The second terminal of the sixth resistor is connected to the second input terminal of the second XOR gate. The output terminal of the first NAND gate is connected to the second input terminal of the first NAND gate. The output terminal of the first NAND gate is connected to the first terminal of the seventh resistor. The second terminal of the seventh resistor, the first terminal of the first capacitor, and the input terminal of the first inverter are connected. The second terminal of the first capacitor is grounded. The output terminal of the first inverter is connected to the first terminal of the eighth resistor. The second terminal of the eighth resistor, the first terminal of the ninth resistor, the first terminal of the second capacitor, and the anode of the first optocoupler are connected. The second terminal of the ninth resistor, the second terminal of the second capacitor, and the cathode of the first optocoupler are grounded. The collector of the first optocoupler is connected to the first terminal of the tenth resistor. The second terminal of the tenth resistor is connected to the positive voltage terminal. The emitter of the first optocoupler, the first terminal of the eleventh resistor, and the first terminal of the third capacitor are connected to form the output terminal of the first protection circuit. The second terminal of the eleventh resistor and the second terminal of the third capacitor are grounded.

3. The brake power supply circuit as described in claim 2, characterized in that, The second protection circuit includes a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, a nineteenth resistor, a twentieth resistor, a twenty-first resistor, a twenty-second resistor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a second diode, a third XNOR gate, a fourth XNOR gate, a second NAND gate, a second inverter, and a second optocoupler; The first terminal of the twelfth resistor is used to input the fourth potential signal. The second terminal of the twelfth resistor is connected to the first input terminal of the third XNOR gate. The first terminal of the thirteenth resistor is used to input the third potential signal. The second terminal of the thirteenth resistor, the cathode of the second diode, the first terminal of the fourteenth resistor, and the second input terminal of the third XNOR gate are connected. The anode of the second diode is connected to the first terminal of the fifteenth resistor. The second terminal of the fifteenth resistor is used to input the second analog signal. The second terminal of the fourteenth resistor is grounded. The output terminal of the third XNOR gate is connected to the first input terminal of the second NAND gate. The first terminal of the sixteenth resistor is used to input the first potential signal. The second terminal of the sixteenth resistor is connected to the first input terminal of the fourth XNOR gate. The first terminal of the seventeenth resistor is used to input the fourth potential signal. The second terminal of the seventeenth resistor is connected to the second input terminal of the fourth XNOR gate. The output terminal is connected to the second input terminal of the second NAND gate. The output terminal of the second NAND gate is connected to the first terminal of the eighteenth resistor. The second terminal of the eighteenth resistor, the first terminal of the fourth capacitor, and the input terminal of the second inverter are connected. The second terminal of the fourth capacitor is grounded. The output terminal of the second inverter is connected to the first terminal of the nineteenth resistor. The second terminal of the nineteenth resistor, the first terminal of the twentieth resistor, the first terminal of the fifth capacitor, and the anode of the second optocoupler are connected. The second terminal of the twentieth resistor, the second terminal of the fifth capacitor, and the cathode of the second optocoupler are grounded. The collector of the second optocoupler is connected to the first terminal of the eleventh resistor. The second terminal of the eleventh resistor is connected to the positive voltage terminal. The emitter of the second optocoupler, the first terminal of the twentieth resistor, and the first terminal of the sixth capacitor are connected to form the output terminal of the second protection circuit. The second terminal of the twentieth resistor and the second terminal of the sixth capacitor are grounded.

4. The brake power supply circuit as described in claim 1, characterized in that, The first signal output circuit includes a first power supply chip, a first optocoupler circuit, and a second optocoupler circuit. The power input terminal of the first power chip is connected to the positive power terminal, and the power output terminal of the first power chip is connected to the input terminal of the first optocoupler circuit and the input terminal of the second optocoupler circuit, respectively. The first optocoupler circuit includes a twenty-third resistor, a twenty-fourth resistor, a twenty-fifth resistor, a seventh capacitor, an eighth capacitor, and a third optocoupler; The first end of the 23rd resistor, the first end of the 7th capacitor, and the anode of the 3rd optocoupler are connected to form the input terminal of the first optocoupler circuit. The second end of the 23rd resistor, the second end of the 7th capacitor, and the cathode of the 3rd optocoupler are grounded. The collector of the 3rd optocoupler is connected to the first end of the 24th resistor. The second end of the 24th resistor is connected to the positive power supply terminal. The emitter of the 3rd optocoupler, the first end of the 25th resistor, and the first end of the 8th capacitor are connected to the control terminal of the first switching circuit. The second end of the 25th resistor and the second end of the 8th capacitor are grounded. The second optocoupler circuit includes a twenty-sixth resistor, a twenty-seventh resistor, a twenty-eighth resistor, a ninth capacitor, a tenth capacitor, and a fourth optocoupler; The first end of the 26th resistor, the first end of the 9th capacitor, and the anode of the 4th optocoupler are connected to form the input terminal of the 2nd optocoupler circuit. The second end of the 26th resistor, the second end of the 9th capacitor, and the cathode of the 4th optocoupler are grounded. The collector of the 4th optocoupler is connected to the first end of the 27th resistor. The second end of the 27th resistor is connected to the positive power supply terminal. The emitter of the 4th optocoupler, the first end of the 28th resistor, and the first end of the 10th capacitor are connected to the control terminal of the 2nd switching circuit. The second end of the 28th resistor and the second end of the 10th capacitor are grounded.

5. The brake power supply circuit as described in claim 1, characterized in that, The second signal output circuit includes a second power supply chip and a driver; The power input terminal of the second power chip is connected to the positive power terminal, and the power output terminal of the second power chip is connected to the power terminal of the driver. The driver is used to output a voltage conversion signal to the voltage conversion circuit.

6. The brake power supply circuit as described in any one of claims 1 to 5, characterized in that, The main power supply circuit also includes: A relay, wherein the switch of the relay is connected in series between the voltage conversion circuit and the first switching circuit and the second switching circuit; The brake power supply circuit also includes: The third signal output circuit is connected to the coil of the relay, the first protection circuit, and the second protection circuit, respectively. The third signal output circuit is used to detect the potential of the output signals of the first protection circuit and the second protection circuit, and cut off the output voltage enable signal to the coil of the relay when the potentials of the two output signals are different, so as to turn off the relay.

7. The brake power supply circuit as described in claim 6, characterized in that, The third signal output circuit includes an AND gate, a 29th resistor, a 30th resistor, a 31st resistor, an 11th capacitor, a 12th capacitor, and a fifth optocoupler; The first input terminal of the AND gate is connected to the output terminal of the first protection circuit, the second input terminal of the AND gate is connected to the output terminal of the second protection circuit, the output terminal of the AND gate, the first terminal of the 29th resistor, the first terminal of the 11th capacitor, and the anode of the fifth optocoupler are connected, the second terminal of the 29th resistor, the second terminal of the 11th capacitor, and the cathode of the fifth optocoupler are grounded, the collector of the fifth optocoupler is connected to the first terminal of the 30th resistor, the second terminal of the 30th resistor is connected to the positive power supply terminal, the emitter of the fifth optocoupler, the first terminal of the 31st resistor, and the first terminal of the 12th capacitor are connected to form the signal output terminal of the third signal output circuit, and the second terminal of the 31st resistor and the second terminal of the 12th capacitor are grounded.

8. The brake power supply circuit as described in claim 1, characterized in that, The voltage conversion circuit includes a first switching transistor, an inductor, a thirteenth capacitor, and a third diode; The cathode of the third diode, the first terminal of the thirteenth capacitor, and the positive power supply terminal of the rectifier circuit are connected to form the positive power supply output terminal of the voltage conversion circuit. The anode of the third diode, the first terminal of the first switch, and the first terminal of the inductor are connected. The second terminal of the inductor and the second terminal of the thirteenth capacitor are connected to form the negative power supply output terminal of the voltage conversion circuit. The second terminal of the first switch is connected to the negative power supply terminal of the rectifier circuit. The control terminal of the first switch is connected to the signal terminal of the main controller and the output terminal of the second signal output circuit, respectively.

9. A brake actuator, characterized in that, It includes a main controller and a brake power supply circuit as described in any one of claims 1 to 8, wherein the main controller is connected to the brake power supply circuit.

10. An elevator brake device, characterized in that, It includes a holding brake and a holding brake actuator as described in claim 9, wherein the holding brake actuator and the holding brake are connected.

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