Bias conditioning compensation sampling device and power tube transconductance testing device

Abstract

The utility model relates to a bias conditioning compensation sampling device and a power tube transconductance testing device, and the bias conditioning compensation sampling device comprises an input conditioning unit which is connected with an input unit and a compensation sampling unit, and outputs a conditioned signal to the compensation sampling unit for a signal accessed by the input unit; the compensation sampling unit is connected with the bias conditioning unit and the output unit, receives a signal output by the input conditioning unit and a signal output by the bias conditioning unit, and outputs a signal subjected to compensation sampling to the output unit; the output feedback unit is connected with the output unit, receives the original signal output by the output unit and outputs a feedback signal to the bias conditioning unit; and the bias conditioning unit is connected with the output feedback unit, receives the feedback signal output by the output feedback unit, and outputs the signal subjected to bias conditioning to the compensation sampling unit. Signal feedback regulation is realized, the accuracy of output signals is ensured, and the compensation sampling reliability is improved.

Description

TECHNICAL FIELD

[0001] The application relates to the technical field of semiconductor testing, in particular to a bias conditioning compensation sampling device and a power tube transconductance testing device. BACKGROUND

[0002] With the development of the new energy industry, the testing demand range of power semiconductors is becoming larger and larger. As an indispensable part of integrated circuit ATE (Automatic Test Equipment) testing, transconductance testing is used for GFS testing of various types of power semiconductors. In order to further improve the parameter measurement accuracy and stability of various types of GFS, the bias conditioning compensation sampling method is particularly important.

[0003] The traditional bias conditioning compensation sampling method is to control the bias conditioning circuit to perform signal conditioning through a controller, output the signal to a multiplier for frequency mixing, and then output to a bandwidth multiplier and an adder. The output signal cannot be ensured to be accurate, and the compensation sampling reliability is low. CONTENT OF THE INVENTION

[0004] Therefore, it is necessary to provide a bias conditioning compensation sampling device and a power tube transconductance testing device capable of improving the compensation sampling reliability in view of the above problems.

[0005] The first aspect of the application provides a bias conditioning compensation sampling device, comprising:

[0006] An input conditioning unit is connected to an input unit and a compensation sampling unit, receives a signal input by the input unit, and outputs a conditioned signal to the compensation sampling unit;

[0007] The compensation sampling unit is connected to a bias conditioning unit and an output unit, receives a signal output by the input conditioning unit and a signal output by the bias conditioning unit, and outputs a compensated and sampled signal to the output unit;

[0008] An output feedback unit is connected to the output unit, receives an original signal output by the output unit, and outputs a feedback signal to the bias conditioning unit;

[0009] The bias conditioning unit is connected to the output feedback unit, receives a feedback signal output by the output feedback unit, and outputs a bias-conditioned signal to the compensation sampling unit.

[0010] In one of the embodiments, the input conditioning unit comprises a first digital-to-analog converter and an operational amplifier circuit, the first digital-to-analog converter is connected to the input unit and the operational amplifier circuit, and the operational amplifier circuit is connected to the compensation sampling unit; the first digital-to-analog converter performs digital-to-analog conversion on the signal input by the input unit, outputs an analog signal to the operational amplifier circuit, the operational amplifier circuit amplifies and reverses the polarity of the received analog signal, and outputs the conditioned signal to the compensation sampling unit.

[0011] In one of the embodiments, the operational amplifier circuit comprises a positive operational amplifier circuit and a negative operational amplifier circuit, the positive operational amplifier circuit is connected to the first digital-to-analog converter and the compensation sampling unit, and the negative operational amplifier circuit is connected to the first digital-to-analog converter and the compensation sampling unit.

[0012] The positive operational amplifier circuit amplifies and reverses the polarity of the analog signal output by the first digital-to-analog converter when in communication with the first digital-to-analog converter, and outputs the conditioned signal to the compensation sampling unit; the negative operational amplifier circuit amplifies and reverses the polarity of the analog signal output by the first digital-to-analog converter when in communication with the first digital-to-analog converter, and outputs the conditioned signal to the compensation sampling unit.

[0013] The positive operational amplifier circuit / negative operational amplifier circuit comprises a main channel circuit and an auxiliary channel circuit, the main channel circuit is connected to the first digital-to-analog converter and the compensation sampling unit, and the auxiliary channel circuit is connected to the ground and the compensation sampling unit; the main channel circuit amplifies and reverses the polarity of the input analog signal when in communication with the first digital-to-analog converter, combines the signals output by the differential amplification of the auxiliary channel circuit, and outputs the conditioned signal to the compensation sampling unit.

[0014] In one of the embodiments, the output feedback unit comprises a data processor, the data processor is connected to the output unit and the bias conditioning unit; the data processor performs operations on the original signal output by the output unit according to a set coefficient to compensate for link imbalance, and outputs the feedback signal to the bias conditioning unit.

[0015] In one of the embodiments, the bias conditioning unit comprises a second digital-to-analog converter and a bias conditioning circuit, the second digital-to-analog converter is connected to the output feedback unit and the bias conditioning circuit, and the bias conditioning circuit is connected to the compensation sampling unit.

[0016] In one of the embodiments, the bias conditioning circuit includes a positive bias conditioning circuit and a negative bias conditioning circuit, the positive bias conditioning circuit is connected to the second digital-to-analog converter and the compensation sampling unit, and the negative bias conditioning circuit is connected to the second digital-to-analog converter and the compensation sampling unit.

[0017] The positive bias conditioning circuit amplifies the analog signal output by the second digital-to-analog converter and then transmits the amplified analog signal to the compensation sampling unit when the positive bias conditioning circuit is in communication with the second digital-to-analog converter, and the negative bias conditioning circuit amplifies the analog signal output by the second digital-to-analog converter and then transmits the amplified analog signal to the compensation sampling unit when the negative bias conditioning circuit is in communication with the second digital-to-analog converter.

[0018] The positive bias conditioning circuit includes a positive power rail operational amplifier, and / or the negative bias conditioning circuit includes a negative power rail operational amplifier.

[0019] In one of the embodiments, the bias conditioning compensation sampling device further includes a controller connected to the output unit, the positive bias conditioning circuit, and the negative bias conditioning circuit, the controller controls the positive bias conditioning circuit or the negative bias conditioning circuit to be in communication with the second digital-to-analog converter according to the output voltage of the output unit.

[0020] In one of the embodiments, the compensation sampling unit includes a variable gain amplifier connected to the input conditioning unit and the bias conditioning unit, and a low-pass filter connected to the variable gain amplifier and the output unit.

[0021] In one of the embodiments, the bias conditioning compensation sampling device further includes:

[0022] an input and bias calibration unit connected to the input conditioning unit and the bias conditioning unit, and configured to calibrate the input conditioning unit and the bias conditioning unit.

[0023] The second aspect of the present application provides a power tube transconductance testing device including the above bias conditioning compensation sampling device.

[0024] The above bias conditioning compensation sampling device and power tube transconductance testing device, the input conditioning unit outputs the conditioned signal to the compensation sampling unit after conditioning the signal input by the input unit. The output feedback unit receives the original signal output by the output unit and outputs the feedback signal to the bias conditioning unit. The bias conditioning unit receives the feedback signal output by the output feedback unit and outputs the bias-conditioned signal to the compensation sampling unit. The compensation sampling unit receives the signal output by the input conditioning unit and the signal output by the bias conditioning unit, and outputs the compensation-sampled signal to the output unit, thereby realizing signal feedback adjustment, ensuring the accuracy of the output signal, and improving the reliability of the compensation sampling. BRIEF DESCRIPTION OF DRAWINGS

[0025] Figure 1 a structure schematic diagram of the bias conditioning compensation sampling device in one embodiment;

[0026] Figure 2 a structure schematic diagram of the input conditioning unit in one embodiment;

[0027] Figure 3 a structure schematic diagram of the compensation sampling unit in one embodiment;

[0028] Figure 4 a structure schematic diagram of the output feedback unit in one embodiment;

[0029] Figure 5 a structure schematic diagram of the bias conditioning unit in one embodiment;

[0030] Figure 6 a structure schematic diagram of the bias conditioning compensation sampling device in one embodiment. DETAILED DESCRIPTION

[0031] In order to make the purpose, technical scheme and advantages of the present application clearer, the present application will be further described in detail below with reference to the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not intended to limit the present application.

[0032] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the present application.

[0033] It can be understood that, in the following embodiments, “connection” between the circuits, modules, units, etc. connected to each other should be understood as “electrical connection”, “communication connection” and the like if the circuits, modules, units, etc. connected to each other have transmission of electrical signals or data.

[0034] As used herein, the singular forms “a”, “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises”, “comprising”, “includes” and / or “including” when used herein, specify the presence of stated features, integers, operations, components, parts, or combinations thereof, but do not preclude the presence or addition of one or more other features, integers, operations, components, parts, or combinations thereof.

[0035] In one embodiment, as shown in FIG. 1, the bias conditioning compensation sampling device comprises an input conditioning unit 100, a compensation sampling unit 200, an output feedback unit 300 and a bias conditioning unit 400. Figure 1As shown, a bias conditioning compensation sampling device 100 is provided, comprising an input conditioning unit 110, a compensation sampling unit 120, an output feedback unit 130 and a bias conditioning unit 140, wherein the input conditioning unit 110 is connected to the input unit and the compensation sampling unit 120, receives the signal accessed by the input unit, and outputs the conditioned signal to the compensation sampling unit 120; the compensation sampling unit 120 is connected to the bias conditioning unit 140 and the output unit, receives the signal output by the input conditioning unit 110 and the signal output by the bias conditioning unit 140, and outputs the compensation sampled signal to the output unit; the output feedback unit 130 is connected to the output unit, receives the original signal output by the output unit, and outputs the feedback signal to the bias conditioning unit 140; the bias conditioning unit 140 is connected to the output feedback unit 130, receives the feedback signal output by the output feedback unit 130, and outputs the bias conditioned signal to the compensation sampling unit 120.

[0036] Specifically, the input unit delivers the accessed signal to the input conditioning unit 110 for signal conditioning, and the conditioned signal is delivered to the compensation sampling unit 120, and the compensation sampled signal is output to the output unit. The original signal output by the output unit is fed back through the output feedback unit 130, and the output feedback signal is output to the bias conditioning unit 140, and the bias conditioned signal is delivered to the compensation sampling unit 120, and the compensation sampling unit 120 performs compensation sampling processing on the two signals delivered by the input conditioning unit 110 and the bias conditioning unit 140, and the processed signal is delivered to the output unit. In addition, the bias conditioning compensation sampling device 100 can further comprise an input and bias calibration unit 150, which is connected to the input conditioning unit 110 and the bias conditioning unit 140, and calibrates the input conditioning unit 110 and the bias conditioning unit 140.

[0037] In one embodiment, as shown in Figure 2 The input conditioning unit 110 comprises a first digital-to-analog converter DAC1 and an operational amplifier circuit 112, the first digital-to-analog converter DAC1 is connected to the input unit and the operational amplifier circuit 112, and the operational amplifier circuit 112 is connected to the compensation sampling unit 120; the first digital-to-analog converter DAC1 performs digital-to-analog conversion on the signal accessed by the input unit, and outputs an analog signal to the operational amplifier circuit 112, and the operational amplifier circuit 112 amplifies and inverts the polarity of the received analog signal to obtain a conditioned signal delivered to the compensation sampling unit 120. The analog signal is amplified and the polarity is inverted by the operational amplifier circuit 112 to obtain a negative voltage / positive voltage, which is delivered to the compensation sampling unit 120 as a conditioned signal, so that the compensation sampling unit 120 generates an amplified positive voltage / negative voltage through negative feedback operational amplifier processing, which is delivered to the output unit as a compensation sampled signal.

[0038] The GFS parameter test of the power MOS tube usually needs to give a small or large voltage value to the gate source end GS of the power MOS tube. According to the size and positive or negative of the required voltage, the amplification processing mode of the operational amplifier circuit 112 will also be different. Specifically, as shown in Figure 6 the operational amplifier circuit 112 can include a positive operational amplifier circuit 1122 and a negative operational amplifier circuit 1124. The positive operational amplifier circuit 1122 is connected to the first digital-to-analog converter DAC1 and the compensation sampling unit 120, and the negative operational amplifier circuit 1124 is connected to the first digital-to-analog converter DAC1 and the compensation sampling unit 120. When the positive operational amplifier circuit 1122 is in communication with the first digital-to-analog converter DAC1, it amplifies and reverses the polarity of the analog signal output by the first digital-to-analog converter DAC1 and outputs the conditioned signal to the compensation sampling unit 120. When the negative operational amplifier circuit 1124 is in communication with the first digital-to-analog converter DAC1, it amplifies and reverses the polarity of the analog signal output by the first digital-to-analog converter DAC1 and outputs the conditioned signal to the compensation sampling unit 120.

[0039] The positive operational amplifier circuit 1122 and the negative operational amplifier circuit 1124 can each include multiple operational amplifiers. The operational amplifiers inside the positive operational amplifier circuit 1122 and the negative operational amplifier circuit 1124 are connected to a positive power supply or a negative power supply, so that the positive operational amplifier circuit 1122 and the negative operational amplifier circuit 1124 have different working modes to adapt to different voltage requirements of the power MOS tube test. The combination of the double operational amplifier circuit and the positive and negative power supply improves the problem of insufficient upper and lower limits of a single power rail. Control switches can be provided inside or outside the positive operational amplifier circuit 1122 and the negative operational amplifier circuit 1124. The operational amplifiers are connected to the first digital-to-analog converter DAC1 through the corresponding control switches. The control switches are switched on and off by an external controller to control the communication between the positive operational amplifier circuit 1122 / negative operational amplifier circuit 1124 and the first digital-to-analog converter DAC1, so that the positive operational amplifier circuit 1122 / negative operational amplifier circuit 1124 works. The specific structure of the positive operational amplifier circuit 1122 and the negative operational amplifier circuit 1124 is not unique. The positive operational amplifier circuit 1122 / negative operational amplifier circuit 1124 can include a main channel circuit and an auxiliary channel circuit. The main channel circuit is connected to the first digital-to-analog converter DAC1 and the compensation sampling unit 120, and the auxiliary channel circuit is connected to the ground end and the compensation sampling unit 120. When the main channel circuit is in communication with the first digital-to-analog converter DAC1, it amplifies and reverses the polarity of the input analog signal, and then differentially amplifies the output signal with the auxiliary channel circuit to combine and output the conditioned signal to the compensation sampling unit 120. In this embodiment, continue to refer to Figure 6The positive operational amplifier circuit 1122 may include operational amplifiers U2, U3, and U4. Operational amplifiers U2 and U3 constitute the main channel circuit, and operational amplifier U4 constitutes the auxiliary channel circuit. The input terminal of operational amplifier U2 is connected to the output terminal of the first digital-to-analog converter DAC1 via a control switch. The input terminal of operational amplifier U3 is connected to the output terminal of operational amplifier U2, and the output terminal of operational amplifier U3 is connected to the compensation sampling unit 120. The input terminal of operational amplifier U4 is connected to the ground terminal, and the output terminal of operational amplifier U4 is connected to the compensation sampling unit 120. The power supply terminal of operational amplifier U3 is connected to a positive voltage VCC, and the power supply terminal of operational amplifier U4 is connected to a negative voltage VEE. In this embodiment, operational amplifier U4 is a proportional operational amplifier. The input analog signal is amplified by operational amplifier U2, then inverted by operational amplifier U3, and output. Operational amplifier U4 amplifies the signal at the ground terminal proportionally and outputs it. The two signals are subtracted to obtain a conditioned signal, which is then sent to the compensation sampling unit 120.

[0040] The negative operational amplifier circuit 1124 may include operational amplifiers U5, U6, and U7. Operational amplifiers U5 and U6 constitute the main channel circuit, and operational amplifier U7 constitutes the auxiliary channel circuit. The input terminal of operational amplifier U5 is connected to the output terminal of the first digital-to-analog converter DAC1 via a control switch. The input terminal of operational amplifier U6 is connected to the output terminal of operational amplifier U5, and the output terminal of operational amplifier U6 is connected to the compensation sampling unit 120. The input terminal of operational amplifier U7 is connected to the ground terminal, and the output terminal of operational amplifier U7 is connected to the compensation sampling unit 120. The power supply terminal of operational amplifier U6 is connected to a negative voltage VEE, and the power supply terminal of operational amplifier U7 is connected to a positive voltage VCC. The input analog signal is amplified by operational amplifier U5, then inverted by operational amplifier U6, and output. Operational amplifier U7 amplifies the signal at the ground terminal proportionally and outputs it. The two signals are subtracted to obtain a conditioned signal, which is then sent to the compensation sampling unit 120.

[0041] In one embodiment, such as Figure 3 As shown, the compensation sampling unit 120 includes a variable gain amplifier 122 and a low-pass filter 124. The variable gain amplifier 122 is connected to the input conditioning unit 110 and the bias conditioning unit 140, and the low-pass filter 124 is connected to the variable gain amplifier 122 and the output unit. Wherein, as... Figure 6As shown, the output unit is an analog-to-digital converter (ADC), the variable gain amplifier 122 can include an operational amplifier U1, a feedback gear shift circuit 1222 and a ground gear shift circuit 1224, the feedback gear shift circuit 1222 is composed of resistors and control switches, and the ground gear shift circuit 1224 is composed of resistors and control switches. A plurality of feedback gear shift circuits 1222 are arranged between the inverting input terminal and the output terminal of the operational amplifier U1, and a plurality of ground gear shift circuits 1224 are arranged between the non-inverting input terminal and the ground terminal of the operational amplifier U1. By controlling the on-off of the control switches in the feedback gear shift circuit 1222 and the ground gear shift circuit 1224 through an external controller, the gain coefficient of the variable gain amplifier 122 can be changed. The low-pass filter 124 can specifically adopt a SALLEN-KEY low-pass filter, and the low-pass filter 124 is connected to the output terminal of the operational amplifier U1 and the analog-to-digital converter ADC, and the signal output by the operational amplifier U1 is filtered and then transmitted to the analog-to-digital converter ADC.

[0042] Further, the compensation sampling unit 120 further includes a switching switch, a positive operational amplifier circuit 1122 and a negative operational amplifier circuit 1124, which are respectively connected to one end of the corresponding switching switch through the corresponding resistors in the compensation sampling unit 120, and the other end of the switching switch is connected to the inverting input terminal of the operational amplifier U1. Among them, the output terminal of the operational amplifier U3 and the output terminal of the operational amplifier U4 in the positive operational amplifier circuit 1122 are connected to one end of the same switching switch through corresponding resistors, and the other end of the switching switch is connected to the inverting input terminal of the operational amplifier U1. The output terminal of the operational amplifier U6 and the output terminal of the operational amplifier U7 in the negative operational amplifier circuit 1124 are connected to one end of the same switching switch through corresponding resistors, and the other end of the switching switch is connected to the inverting input terminal of the operational amplifier U1. By controlling the on-off of the switching switch, the negative voltage output by the positive operational amplifier circuit 1122 / negative operational amplifier circuit 1124 is connected to the inverting input terminal of the operational amplifier U1 for amplification processing.

[0043] In one embodiment, as Figure 4As shown, the output feedback unit 130 includes a data processor 132 connected to the output unit and the bias conditioning unit 140; the data processor 132 performs operation on the original signal output by the output unit according to the set coefficient to compensate for the link imbalance, and obtains a feedback signal transmitted to the bias conditioning unit 140. Specifically, the data processor 132 can be an FPGA, MCU, CPU, ARM, etc. The data processor 132 performs operation (addition, subtraction, multiplication, division, etc.) on the accessed original signal according to the set coefficient, compensates for the imbalance, bias, etc. caused by the digital-to-analog converter, operational amplifier or other devices in the link, improves the linearity and stability of the link, and also facilitates the subsequent bias processing by the bias conditioning unit 140, and facilitates the input and bias calibration by the input and bias calibration unit 150.

[0044] In one embodiment, as shown in FIG. 1, the bias conditioning unit 140 includes a second digital-to-analog converter DAC2 and a bias conditioning circuit 142, the second digital-to-analog converter DAC2 is connected to the output feedback unit 130 and the bias conditioning circuit 142, and the bias conditioning circuit 142 is connected to the compensation sampling unit 120. The feedback signal output by the output feedback unit 130 is converted into an analog signal by the second digital-to-analog converter DAC2, and then the analog signal obtained by the conversion is subjected to bias conditioning by the bias conditioning circuit 142, and the bias-conditioned signal is output to the compensation sampling unit 120. Figure 5

[0045] Similarly, according to the different voltages required for power MOS tube testing, the specific structure of the bias conditioning circuit 142 will also be different. As shown in FIG. 1, the bias conditioning circuit 142 can include a positive bias conditioning circuit 1422 and a negative bias conditioning circuit 1424, the positive bias conditioning circuit 1422 is connected to the second digital-to-analog converter DAC2 and the compensation sampling unit 120, and the negative bias conditioning circuit 1424 is connected to the second digital-to-analog converter DAC2 and the compensation sampling unit 120; the positive bias conditioning circuit 1422, when in communication with the second digital-to-analog converter DAC2, amplifies the analog signal output by the second digital-to-analog converter DAC2 and transmits it to the compensation sampling unit 120; the negative bias conditioning circuit 1424, when in communication with the second digital-to-analog converter DAC2, amplifies the analog signal output by the second digital-to-analog converter DAC2 and transmits it to the compensation sampling unit 120. Figure 6

[0046] ​​The positive bias conditioning circuit 1422 includes a positive power rail operational amplifier, and / or the negative bias conditioning circuit 1424 includes a negative power rail operational amplifier. Similarly, control switches can be provided internally or externally in the positive bias conditioning circuit 1422 and the negative bias conditioning circuit 1424. The positive power rail operational amplifier / negative power rail operational amplifier is connected to the output of the second digital-to-analog converter DAC2 through corresponding control switches. The positive bias conditioning circuit 1422 / negative bias conditioning circuit 1424 is directly connected to the inverting input of the operational amplifier U1 through a resistor inside the compensation sampling unit 120. An external controller switches the control switches on and off, connecting the positive bias conditioning circuit 1422 / negative bias conditioning circuit 1424 to the output of the second digital-to-analog converter DAC2, thereby enabling the positive bias conditioning circuit 1422 / negative bias conditioning circuit 1424 to operate. After appropriately adjusting the gain and compensating the phase of the received analog signal using a positive power rail operational amplifier / negative power rail operational amplifier, the output signal is given to the compensation sampling unit 120. In this embodiment, the advantage of using positive and negative power rail operational amplifiers is that it reduces the power supply range requirements for the operational amplifiers and allows for a wider range of selectable models.

[0047] In one embodiment, the bias conditioning compensation sampling device further includes a controller connected to the output unit, the positive bias conditioning circuit 1422, and the negative bias conditioning circuit 1424. The controller controls the positive bias conditioning circuit 1422 or the negative bias conditioning circuit 1424 to connect to the second digital-to-analog converter based on the output voltage of the output unit. Signal conditioning is performed by selecting either the positive bias conditioning circuit 1422 or the negative bias conditioning circuit 1424 based on the actual output voltage of the output unit.

[0048] Specifically, such as Figure 6 As shown, when testing a power MOSFET, its gate (G) is connected via the terminal BGS_GFS between operational amplifiers U2 and U3 in the positive operational amplifier circuit 1122, and between operational amplifiers U5 and U6 in the negative operational amplifier circuit 1124. The source (S) of the power MOSFET is connected to ground via the terminal ESS_GFS. Testing the GFS parameter of a power MOSFET requires applying a small or large voltage value to the gate-source terminal (GS). The bias conditioning compensation sampling method is described in detail below:

[0049] 1. When the voltage required by the gate-source end GS of the power MOS tube is a large value, such as X1 V, the first digital-to-analog converter DAC1 outputs X1 / Y1 V, and since the output voltage is positive, the voltage follows the loop Vout=0~X V, and after passing through the operational amplifier with a gain of Y1, the voltage drop between BGS_GFS and ESS_GFS is X1 V. After the entire input conditioning unit 110 is passed, the voltage entering the compensation sampling unit 120 is -X1 V, the default amplification factor of the variable gain amplifier 122 is -A, the signal becomes AX1 V at this point, and after passing through the low-pass filter 124, it flows into the analog-to-digital converter ADC. The analog-to-digital converter ADC outputs the original signal to the data processor 132. The data processor 132 analyzes and processes the original signal, outputs a feedback signal to the second digital-to-analog converter DAC2, and then outputs the bias-conditioned signal to the compensation sampling unit 120 through the negative bias conditioning circuit 1424, and the voltage entering the analog-to-digital converter ADC is within the input range of the analog-to-digital converter ADC.

[0050] 2. When the gate-source end GS of the power MOS tube is a small value, such as X2 mV, the first digital-to-analog converter DAC1 outputs X2 / Y1 mV, and since the output voltage is positive, the voltage follows the loop Vout=0~X V, and after passing through the operational amplifier with a gain of Y1, the voltage drop between BGS_GFS and ESS_GFS is X2 mV. After the entire input conditioning unit 110 is passed, the voltage entering the compensation sampling unit 120 is -X2 mV, the default amplification factor of the variable gain amplifier 122 is -A, the signal becomes A X2 mV at this point, and after passing through the low-pass filter 124, it flows into the analog-to-digital converter ADC. The analog-to-digital converter ADC outputs the original signal to the data processor 132. The data processor 132 analyzes and processes the original signal, outputs a feedback signal to the second digital-to-analog converter DAC2, and then outputs the bias-conditioned signal to the compensation sampling unit 120 through the positive bias conditioning circuit 1422, and the voltage entering the analog-to-digital converter ADC is within the input range of the analog-to-digital converter ADC.

[0051] Further, with reference to Figure 6The input and bias calibration unit 150 can include a multimeter, resistors, capacitors, etc. The input positive pole of the multimeter is connected to the output terminal of the second digital-to-analog converter DAC2 in the bias conditioning unit 140 through the terminal BGS GFS, between the operational amplifier U2 and the operational amplifier U3 in the positive operational amplifier circuit 1122, between the operational amplifier U5 and the operational amplifier U6 in the negative operational amplifier circuit 1124. The input negative pole of the multimeter is connected to the ground through the terminal ESS GFS. The output of the input conditioning unit 110 and the bias conditioning unit 140 can be calibrated by the multimeter respectively, so that the accuracy and linearity of the output results are more accurate. In the embodiment, the multimeter can be a six-bit or eight-bit multimeter, and the specific model depends on the calibration accuracy requirement range.

[0052] The technical features of the above-described embodiments can be combined in any manner. To make the description concise, all possible combinations of the technical features in the above-described embodiments are not described, but as long as the combinations of the technical features do not contradict, they should be considered within the scope of the present disclosure.

[0053] The above-described embodiments only express several implementation manners of the present application, and the description is more specific and detailed, but it should not be understood as a limitation on the scope of the utility model patent. It should be pointed out that for ordinary skilled in the art, without departing from the concept of the present application, a number of modifications and improvements can be made, which are all within the protection scope of the present application. Therefore, the protection scope of the patent of the present application should be subject to the appended claims.

Claims

1. A bias-conditioned compensation sampling device, characterized by, The application relates to a signal processing circuit, which comprises the following units: an input conditioning unit connected with an input unit and a compensation sampling unit, receiving a signal inputted by the input unit and outputting a conditioned signal to the compensation sampling unit; the compensation sampling unit connected with a bias conditioning unit and an output unit, receiving the signal outputted by the input conditioning unit and the signal outputted by the bias conditioning unit, and outputting a compensation-sampled signal to the output unit; an output feedback unit connected with the output unit, receiving an original signal outputted by the output unit and outputting a feedback signal to the bias conditioning unit; the bias conditioning unit connected with the output feedback unit, receiving the feedback signal outputted by the output feedback unit and outputting a bias-conditioned signal to the compensation sampling unit.

2. The apparatus of claim 1, wherein, The input conditioning unit comprises a first digital-to-analog converter and an operational amplifier circuit, the first digital-to-analog converter is connected with the input unit and the operational amplifier circuit, and the operational amplifier circuit is connected with the compensation sampling unit; the first digital-to-analog converter performs digital-to-analog conversion on the signal inputted by the input unit, outputs an analog signal to the operational amplifier circuit, the operational amplifier circuit amplifies and reverses the polarity of the received analog signal, and outputs the conditioned signal to the compensation sampling unit.

3. The apparatus of claim 2, wherein, The operational amplifier circuit comprises a positive operational amplifier circuit and a negative operational amplifier circuit, the positive operational amplifier circuit is connected with the first digital-to-analog converter and the compensation sampling unit, and the negative operational amplifier circuit is connected with the first digital-to-analog converter and the compensation sampling unit; the positive operational amplifier circuit amplifies and reverses the polarity of the analog signal outputted by the first digital-to-analog converter when in communication with the first digital-to-analog converter, outputs the conditioned signal to the compensation sampling unit; and the negative operational amplifier circuit amplifies and reverses the polarity of the analog signal outputted by the first digital-to-analog converter when in communication with the first digital-to-analog converter, outputs the conditioned signal to the compensation sampling unit; the positive operational amplifier circuit / negative operational amplifier circuit comprises a main channel circuit and an auxiliary channel circuit, the main channel circuit is connected with the first digital-to-analog converter and the compensation sampling unit, and the auxiliary channel circuit is connected with a ground terminal and the compensation sampling unit; the main channel circuit amplifies and reverses the polarity of the inputted analog signal, combines the signal outputted by differential amplification of the main channel circuit and the auxiliary channel circuit, and outputs the conditioned signal to the compensation sampling unit.

4. The apparatus of claim 1, wherein, The output feedback unit comprises a data processor connected with the output unit and the bias conditioning unit; the data processor performs operation on the original signal outputted by the output unit according to a set coefficient to compensate for link imbalance, and outputs the feedback signal to the bias conditioning unit.

5. The apparatus of claim 1, wherein, The bias conditioning unit comprises a second digital-to-analog converter and a bias conditioning circuit, the second digital-to-analog converter is connected with the output feedback unit and the bias conditioning circuit, and the bias conditioning circuit is connected with the compensation sampling unit.

6. The apparatus of claim 5, wherein, The bias conditioning circuit comprises a positive bias conditioning circuit and a negative bias conditioning circuit, the positive bias conditioning circuit is connected with the second digital-to-analog converter and the compensation sampling unit, and the negative bias conditioning circuit is connected with the second digital-to-analog converter and the compensation sampling unit. The positive bias conditioning circuit amplifies the analog signal output by the second digital-to-analog converter and then transmits the amplified analog signal to the compensation sampling unit when the positive bias conditioning circuit is in communication with the second digital-to-analog converter; and the negative bias conditioning circuit amplifies the analog signal output by the second digital-to-analog converter and then transmits the amplified analog signal to the compensation sampling unit when the negative bias conditioning circuit is in communication with the second digital-to-analog converter. The positive bias conditioning circuit comprises a positive power rail operational amplifier, and / or the negative bias conditioning circuit comprises a negative power rail operational amplifier.

7. The apparatus of claim 6, wherein, The bias conditioning circuit further comprises a controller connected with the output unit, the positive bias conditioning circuit and the negative bias conditioning circuit, the controller controls the positive bias conditioning circuit or the negative bias conditioning circuit to be in communication with the second digital-to-analog converter according to the output voltage of the output unit.

8. The apparatus of claim 1, wherein, The compensation sampling unit comprises a variable gain amplifier connected with the input conditioning unit and the bias conditioning unit, and a low-pass filter connected with the variable gain amplifier and the output unit.

9. The apparatus of any one of claims 1-8, wherein, The bias conditioning circuit further comprises: an input and bias calibration unit connected with the input conditioning unit and the bias conditioning unit, and configured to calibrate the input conditioning unit and the bias conditioning unit.

10. A power tube transconductance testing apparatus, characterized by, The bias conditioning circuit comprises the bias conditioning compensation sampling device according to any one of claims 1-9.

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