Packaging structure based on high-heat-dissipation metal slurry
By using a high-heat-dissipation metal paste and adding a microchannel structure in the packaging structure, the problem of insufficient thermal conductivity of the molding compound is solved, achieving a high-efficiency heat dissipation and low-cost packaging solution.
Patent Information
- Application Number
- CN202423315205.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-31
- Publication Date
- 2025-12-19
- Estimated Expiration
- 2034-12-31
AI Technical Summary
In existing fan-out packages, the thermal conductivity of the molding compound is insufficient, leading to serious heat dissipation problems for high-power chips, which affects chip performance, lifespan, and structural strength.
A high-heat-dissipation metal paste is used to replace the molding compound, and a microchannel structure is prepared on its surface to increase the specific surface area and improve the heat dissipation effect.
It effectively dissipates chip heat, improves heat dissipation performance, is suitable for high-density I/O interface chips, reduces package size, and lowers costs.
Smart Images
Figure CN223693120U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model belongs to silicon-based fan-out type packaging structure technical field, especially relates to a packaging structure based on high heat dissipation metal paste. BACKGROUND
[0002] With the continuous improvement of IC manufacturing level, Moore's law is more and more close to the theoretical limit. With the decrease of chip size, the improvement of integration and the promotion of function, the packaging density is also higher and higher. With this, the unit volume power consumption increases sharply, and the chip working temperature also comes higher and higher, which affects the reliability and normal work of the chip.
[0003] At present, the fan-out type packaging uses plastic packaging material to reconstruct wafer, can realize the packaging solution of minimum size, makes the chip keep high performance, and the volume is smaller, the weight is lighter, and the cost is lower. Meanwhile, the plastic packaging material can provide good mechanical support and environmental protection for the chip, reduces the influence of external factors on the chip. The specific performance is that the wiring design of I / O contact point is carried out in the area outside the chip size, the number of I / O contact point is significantly improved, the available area of chip is increased by using RDL wiring process, the effective area of chip is fully utilized, the cost is reduced, the signal transmission distance is shortened by using tin ball connection, the electrical performance is improved, and the multi-die packaging configuration and fine RDL with line width and line spacing of ≤10 mu m are supported. However, the heat conduction ability of plastic packaging material is poor, and under the packaging configuration of multi-die fine line width, the heat dissipation problem caused by high power consumption of the chip still exists, which has a serious influence on the performance, service life, structural strength and energy consumption of the chip.
[0004] In view of the above situation, the existing silicon-based fan-out type packaging with integrated heat dissipation structure is poor in heat dissipation effect by micro-channel air heat dissipation, and cannot be used for the chip with high heat flux density, therefore, the high heat dissipation fan-out packaging structure based on high heat dissipation metal paste is proposed to solve the above technical defects. UTILITY MODEL CONTENTS
[0005] The utility model discloses a packaging structure based on high heat dissipation metal paste, compared with traditional structure, through coating high heat dissipation metal paste at the bottom of the packaging body to replace plastic packaging material, the active chip can be supported and protected, and the heat of the chip can also be exported, the chip heat dissipation is increased, and the specific surface area is increased by adding micro-channel structure of dozens to hundreds of microns in the high heat dissipation metal paste, so that the heat dissipation effect of the high heat dissipation metal paste is increased.
[0006] To solve the above technical problems, the utility model provides a packaging structure based on high heat dissipation metal paste, including resin matrix and high heat dissipation metal layer, the back of resin matrix is equipped with high heat dissipation metal layer, and the back of high heat dissipation metal layer is evenly provided with micro-channel groove,
[0007] The high-heat-dissipation metal layer is made of nano-silver paste or nano-copper paste.
[0008] Preferably, several functional chips are plastic-sealed in the grooves of the resin base, so that the back surfaces of the functional chips are in contact with the high-heat-dissipation metal layer.
[0009] Preferably, the functional chips are high-density I / O interface chips.
[0010] Preferably, at least one metal wiring layer is arranged on the surface of the functional chips and connected to the pads of the functional chips.
[0011] Preferably, an insulating layer is arranged between the metal wiring layer and the functional chips, and the insulating layer has openings to expose the pads of the functional chips.
[0012] Preferably, several bumps are welded on the surface of the metal wiring layer.
[0013] Preferably, a solder resist layer is arranged on the surface of the metal wiring layer, and the solder resist layer has openings to expose part of the metal wiring layer for welding with the bumps.
[0014] Compared with the prior art, the present application has the following advantages:
[0015] 1. Compared with the traditional structure, the present application replaces the plastic sealing material with high-heat-dissipation metal paste on the bottom of the packaging body, which not only supports and protects the active chip but also dissipates the heat of the chip, thereby increasing the heat dissipation of the chip.
[0016] 2. The present application adds micro-channel structures of tens to hundreds of microns in the high-heat-dissipation metal paste, which increases the specific surface area and the heat dissipation effect of the high-heat-dissipation metal paste.
[0017] 3. The present application is suitable for high-density I / O interface chips, which can reduce the packaging size, reduce the cost, and improve the performance. BRIEF DESCRIPTION OF DRAWINGS
[0018] Fig. 1 is a structure diagram of plastic sealing of a functional chip according to the present application.
[0019] Fig. 2 is a structure diagram of surface re-wiring according to the present application.
[0020] Fig. 3 is a structure diagram of making bumps on the metal wiring layer according to the present application.
[0021] Fig. 4This is a schematic diagram of the structure of the present invention, showing the thinning of the back side of the resin substrate as required.
[0022] Fig. 5 This is a schematic diagram of a packaging structure based on a high heat dissipation metal paste according to the present invention.
[0023] In the figure: 1-resin matrix, 101-functional chip, 2-metal wiring layer, 201-insulating layer, 3-bump, 301-solder resist layer, 4-high heat dissipation metal layer, 401-microchannel trench. Detailed Implementation
[0024] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become clearer from the following description. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the present invention.
[0025] Example 1
[0026] like Fig. 5 As shown, this utility model embodiment provides an encapsulation structure based on a high heat dissipation metal paste, including a resin matrix 1 and a high heat dissipation metal layer 4; the high heat dissipation metal layer 4 is provided on the back side of the resin matrix 1, and microchannel grooves 401 are uniformly formed on the back side of the high heat dissipation metal layer 4.
[0027] The high heat dissipation metal layer 4 is made by coating with nano silver paste or nano copper paste, and the nano silver paste or nano copper paste is also mixed with thermosetting resin.
[0028] It also includes a number of functional chips 101, which are encapsulated in the groove of the resin substrate 1, so that the back side of the functional chip 101 is in contact with the high heat dissipation metal layer 4.
[0029] The functional chip 101 is a high-density I / O interface chip.
[0030] It also includes at least one metal wiring layer 2, which is disposed on the surface of the functional chip 101 and is used to connect with the pads of the functional chip 101.
[0031] It also includes an insulating layer 201, which is located between the metal wiring layer 2 and the functional chip 101, and the insulating layer 201 has an opening to expose the pads of the functional chip 101.
[0032] It also includes a number of bumps 3, which are welded to the surface of the metal wiring layer 2.
[0033] A solder resist layer 301 is further included, which covers the surface of the metal wiring layer 2 and has openings to expose part of the metal wiring layer 2 for soldering with the bumps 3.
[0034] The high-heat-dissipation fan-out packaging structure based on high-heat-dissipation metal paste replaces the plastic packaging material with the high-heat-dissipation metal paste to support and protect the functional chip, and meanwhile, conducts the heat of the functional chip out, thereby increasing the heat dissipation of the chip.
[0035] Embodiment 2
[0036] As shown in Figs. 1-5 The embodiment further provides a preparation process of the high-heat-dissipation fan-out packaging structure based on high-heat-dissipation metal paste, and specifically includes the following steps.
[0037] 1) The functional chip is plastic packaged to form a 12-inch wafer for facilitating wafer release. The plastic packaging thickness is controlled to be 600-700 μm in consideration of warping and subsequent process requirements. The filling material can be resin, polyimide and polyamide polymer.
[0038] 2) Surface redistribution is performed to lead out the electrical performance to the wafer. For the high-density I / O interface chip, multi-layer wiring can be adopted, that is, a passivation layer is further added, and a second RDL is further redistributed on the passivation layer to package the chip, thereby effectively reducing the packaging size.
[0039] 3) The bumps are made on the metal wiring layer.
[0040] 4) The resin substrate back surface is thinned according to requirements, and the functional chip needs to be exposed at the corresponding position.
[0041] 5) The resin substrate back surface is coated with high-heat-dissipation metal paste, and a micro-channel is formed on the surface of the high-heat-dissipation metal paste through a specific method to increase the specific surface area of the metal paste and improve the heat dissipation effect, thereby completing the packaging.
[0042] In summary, the utility model provides a packaging structure and process based on high-heat-dissipation metal paste for solving the heat dissipation problem of the fan-out packaging of the multi-chip fine line width packaging configuration. The high-heat-dissipation metal paste is used to replace the plastic packaging material on the back surface of the chip. The high-heat-dissipation metal paste supports and protects the chip while conducting the heat of the functional chip out. The specific surface area is increased through the micro-channel structure in the metal paste, and the heat dissipation effect of the metal paste is further increased, thereby effectively solving the heat dissipation problem of the high-performance chip in the fan-out packaging configuration.
[0043] The above description is only the description of the preferred embodiment of the utility model, and is not any limitation on the range of the utility model. Any change and modification of the above disclosure by the ordinary skilled in the art is within the protection scope of the claims.
Claims
1. A packaging structure based on high heat dissipation metal paste, characterized in that, The resin base and the high-heat-dissipation metal layer; the back of the resin base is provided with the high-heat-dissipation metal layer, and the back of the high-heat-dissipation metal layer is uniformly provided with micro-channel grooves. The high-heat-dissipation metal layer is made of nano-silver paste or nano-copper paste.
2. The packaging structure based on high heat dissipation metal paste according to claim 1, wherein, The functional chips are plastic-sealed in the grooves of the resin base, so that the back of the functional chip is in contact with the high-heat-dissipation metal layer.
3. The high heat dissipating metal paste based packaging structure of claim 2, wherein, The functional chip is a high-density I / O interface chip.
4. The high heat dissipating metal paste based packaging structure of claim 2, wherein, The metal wiring layer is arranged on the surface of the functional chip and is connected with the bonding pad of the functional chip.
5. The high heat dissipating metal paste based packaging structure of claim 4, wherein, The insulating layer is between the metal wiring layer and the functional chip, and the insulating layer has an opening to expose the bonding pad of the functional chip.
6. The high heat dissipating metal paste based packaging structure of claim 4, wherein, The protrusions are welded on the surface of the metal wiring layer.
7. The high heat dissipating metal paste based packaging structure of claim 6, wherein, The solder resist layer covers the surface of the metal wiring layer, and the solder resist layer has an opening to expose part of the metal wiring layer so as to be soldered with the protrusion.