Semiconductor testing device

Abstract

The utility model discloses a semiconductor testing device, which comprises a supporting block for bearing a PCB (Printed Circuit Board) and a chip mounting assembly arranged above the PCB, a group of welding spots are formed on the PCB; the chip installation assembly at least comprises an upper cover and a base which are buckled, and the upper cover and the base define a space used for containing a chip and a needle plate. The needle plate is provided with a group of needle holes facilitating penetration of the probes, and the positions of the needle holes are in one-to-one correspondence with the positions of welding spots on the PCB and the positions of pins on the chip. After the upper cover and the base are buckled, the probe enables the PCB to be electrically connected with the chip so as to detect the performance of the chip. The utility model has the advantages that the welding spots on the PCB are electrically connected with the test pins on the chip through the probes, the problem point location of the semiconductor can be determined only by replacing the corresponding probes when local non-conduction occurs, and compared with the prior art, the replacement of the probes is more convenient and faster, and the cost is reduced. Meanwhile, the problem point location can be found more quickly and accurately, the cost is low, and the test efficiency is high.

Description

TECHNICAL FIELD

[0001] The utility model belongs to the technical field of semiconductor manufacturing, especially relates to a semiconductor testing device. BACKGROUND

[0002] In the modern electronic manufacturing field, printed circuit board (PCB board) is the key component of electronic component connection and electrical performance realization. With the development of electronic equipment towards miniaturization, high performance and high reliability, the design and manufacturing technology of PCB board is also constantly progressing. However, in the prior art, the pin welding on the PCB board is a key and fragile link, and its reliability directly affects the performance and service life of the whole circuit board.

[0003] In the traditional PCB manufacturing process, the pin is usually fixed on the PCB board by welding; for details, refer to the existing patent CN114980557B, 'Preparation process capable of optimizing USB device pin welding'. Although this connection mode can provide relatively stable electrical connection, it also has some obvious defects: 1. Unstable welding quality: during the welding process, virtual welding, cold welding and other defects may occur, and these poor welding will cause unstable circuit connection and affect the performance of the circuit board. 2. Poor resistance to external force: the welding point is easy to break under external force, especially in the environment of thermal expansion and mechanical vibration, the reliability of the welding point is severely tested. 3. High maintenance cost: once the welding point is damaged, the whole PCB board often needs to be replaced, which not only increases the maintenance cost, but also prolongs the maintenance time and affects the use and maintenance efficiency of the product. 4. Environmental impact: the flux and solder used in the welding process may contain harmful substances, causing environmental pollution.

[0004] In addition, the existing technology usually tests the chip by using the PCB board made in the above-mentioned manner, that is, connecting the pin on the PCB board with the pin on the chip to test whether the chip is normally powered on. At this time, it is necessary to ensure the quality of the PCB board, and once the welding position of a pin on the PCB board is not accurate or the welding quality is poor, it will inevitably affect the test reliability. In this case, the whole PCB board must be replaced, which not only causes a large amount of waste of PCB boards, but also increases the production and maintenance cost. UTILITY MODEL CONTENTS

[0005] The utility model aims at solving the above-mentioned problems existing in the prior art, and provides a semiconductor testing device.

[0006] The utility model realizes the purpose by the following technical scheme:

[0007] The semiconductor testing device comprises a support block for bearing a PCB board and a chip mounting assembly arranged above the PCB board; a plurality of welding points are formed on the PCB board; the chip mounting assembly comprises at least a clamped upper cover and a base, which enclose a space for accommodating a chip and a needle plate; a plurality of needle holes for facilitating the penetration of probes are arranged on the needle plate, and the arrangement positions of the needle holes correspond to the positions of the welding points on the PCB board and the positions of pins on the chip one by one; after the upper cover and the base are clamped, the probes electrically connect the PCB board and the chip to detect the performance of the chip.

[0008] Preferably, the upper cover and the base are connected through a buckle; mounting grooves for mounting the buckle are formed on the two sides of the upper cover and the base, and the upper cover is pivotally connected with the buckle; a clamping block for clamping the buckle is formed in the mounting groove on the base.

[0009] Preferably, an elastic member is arranged between the inner wall of the buckle and the groove bottom of the mounting groove.

[0010] Preferably, the chip mounting assembly further comprises a pressing block; the pressing block is sleeved in the upper cover, and the pressing block and the upper cover are hollow; the chip is embedded in the pressing plate, and the bottom surface of the pressing plate is formed with a limiting structure matched with the chip.

[0011] Preferably, the chip mounting assembly further comprises a floating plate; the floating plate is located between the chip and the needle plate and is sleeved in the base plate; a through hole corresponding to the probe is formed on the floating plate.

[0012] Preferably, the length of the PCB board is greater than the length of the base, and the widths of the PCB board and the base are equivalent; openings are formed at the two ends of the PCB board; the support plate is bolted with the base, and the bolt penetrates through the openings.

[0013] The advantages of the technical scheme of the utility model mainly lie in that:

[0014] The welding points on the PCB board and the test pins on the chip are connected through the probes to realize the electrical connection of the two, and the problem pins on the semiconductor chip are obtained through the test conductive points; at this time, only the corresponding probes need to be replaced, and the problem points of the semiconductor can be determined after the probe causes are eliminated; compared with the replacement of the entire PCB board in the prior art, the replacement of the probes is more convenient and fast, the problem points can be found more quickly and accurately, the cost is low, and the testing efficiency is high.

[0015] The position of the chip is further limited by the limiting structure on the pressing plate to ensure the stability and testing accuracy of the chip during the testing process.

[0016] The upper cover and the pressing block are designed as hollow shapes to reduce the overall weight and the pressure applied to the two chips, effectively preventing the probe from being in transition contact with the PCB or causing the chip and / or the probe to be worn or bent due to excessive force, thereby prolonging the service life of the chip and the probe. BRIEF DESCRIPTION OF DRAWINGS

[0017] Figure 1 : perspective view of the preferred embodiment of the present application;

[0018] Figure 2 : sectional view of the preferred embodiment of the present application;

[0019] Figure 3 : exploded view of the preferred embodiment of the present application. DETAILED DESCRIPTION

[0020] The purpose, advantages and characteristics of the present application will be illustrated and explained by the following non-limiting description of the preferred embodiments. These embodiments are only typical examples of the application of the technical solutions of the present application, and any technical solutions formed by equivalent replacement or equivalent transformation shall fall within the scope of the present application.

[0021] In the description of the scheme, it should be noted that the orientations or positional relationships indicated by the terms "center", "upper", "lower", "left", "right", "front", "rear", "vertical", "horizontal", "inner", "outer" and the like are based on the orientations or positional relationships shown in the drawings, and are only for the convenience of description and simplification of description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present application. In addition, the terms "first", "second", "third" are only for the purpose of description, and cannot be understood as indicating or implying relative importance. Furthermore, in the description of the scheme, the direction close to the operator is the proximal end, and the direction away from the operator is the distal end.

[0022] As Figure 1 and Figure 2 shown, the present application discloses a semiconductor testing device, which comprises a support block 11 for bearing a PCB 1, and a chip mounting assembly 2 arranged above the PCB 1. The two ends of the PCB 1 are formed with openings 10; the support plate 11 is bolted with the base 22 in the chip mounting assembly 2, and the bolt penetrates through the opening 10. The support plate 11 and the base 22 are detachably connected, which can ensure the stability of the PCB 1 during testing, and at the same time, the support plate 11 suspends the PCB during bearing, reduces the contact with the outside world, thereby reducing the friction force and protecting the quality of the PCB.

[0023] AsFigure 1 As shown, the chip mounting assembly 2 at least includes a buckled upper cover 21 and a base 22, which enclose a space as shown Figure 2 to accommodate the chip 23 and the needle plate 24. Further, the length of the PCB board 1 is greater than that of the base 22, and the opening 10 is located outside the base 22; the width of the PCB board 1 is equivalent to that of the base 22.

[0024] Further, the upper cover 21 and the base 22 are connected by a buckle 3 as shown Figure 3 . The two sides of the upper cover 21 and the base 22 are formed with mounting grooves 220 for mounting the buckle 3, and the upper cover 21 is pivotally connected with the buckle 3. That is, mounting holes are formed on the groove walls of the mounting grooves 220 on the upper cover 21, and a pivot passes through the mounting holes and the mounting holes on the buckle 3, so that the buckle 3 can rotate relative to the upper cover 21. In addition, an elastic member is arranged between the inner wall of the buckle 3 and the groove bottom of the mounting groove 220; the elastic member can be a known component with elastic deformation performance including a spring. The mounting groove 220 on the base 22 is formed with a clamping block 221 for buckling the buckle 3, and the bottom end of the buckle 3 abuts against the lower surface of the clamping block 221 when buckled. The upper cover 21 and the base 22 are quickly buckled by the buckle to fix the position of the chip 23 arranged in the inner cavities of the two, and to ensure that the chip 23 is coaxial with the PCB board, facilitating quick detection of the quality of the chip 23.

[0025] As shown Figure 2 , a group of welding points corresponding to the pins of the chip 23 are formed on the PCB board 1. The needle plate 24 is located above the PCB board 1, and a group of needle holes are arranged on the needle plate 24 for facilitating the penetration of probes 241. The arrangement positions of the needle holes correspond to the positions of the welding points on the PCB board 1 and the positions of the pins on the chip 23 one by one. When the upper cover 21 and the base 22 are buckled, the probes 241 electrically connect the PCB board 1 and the chip 23 to detect the performance of the chip 23. The welding points on the PCB board and the test pins on the chip are connected by the probes to realize the electrical connection of the two, and the problem pins on the semiconductor chip are obtained through the test conductive points; at this time, only the corresponding probes need to be replaced, and the problem points of the semiconductor can be determined after the probe reason is eliminated. Compared with the need to replace the entire PCB board in the prior art, the replacement of the probes is more convenient and fast, and the problem points can be found more quickly and accurately, with low cost and high test efficiency.

[0026] As shown Figure 3As shown, the chip mounting assembly 2 further comprises a pressing block 25. In order to realize rapid assembly test, the pressing block 25 is preferably sleeved in the upper cover 21, and the pressing block 25 is hollow with the upper cover 21, so as to reduce the overall weight, reduce the pressure applied to the chip 23, effectively prevent the probe from being in transition contact with the PCB due to excessive force on the chip, or cause the chip and / or probe to wear or bend, and prolong the service life of the chip and the probe. The chip 23 is embedded in the pressing plate 25, and the bottom surface of the pressing plate 25 is formed with a limiting structure matched with the chip 23; the position of the chip is further limited by the limiting structure on the pressing plate, so as to ensure the stability and test accuracy of the chip during the test process.

[0027] Further, the chip mounting assembly 2 further comprises a floating plate 26, which is located between the chip 23 and the needle plate 24 and is sleeved in the bottom plate 22; the floating plate 26 is formed with a through hole corresponding to the probe 241. The height of the floating plate 26 in the bottom plate 22 is automatically adjusted, and then the pressure of the probe on the needle plate is adjusted, so as to effectively prevent the PCB from being damaged due to excessive force, and prolong the service life of the PCB. In addition, in other embodiments, the floating plate 26 can also be a common plate, which mainly plays a role of pressing the needle plate and limiting the probe, that is, ensuring the coaxiality of the probe 241 during use, effectively preventing the probe from being bent due to excessive force, and ensuring that the probe can accurately and effectively connect the welding point on the PCB and the pin of the chip, ensuring the accuracy of the connection and reducing the test error caused by the probe.

[0028] The utility model has still multiple implementation manners, all technical schemes formed by using equivalent transformation or equivalent transformation fall within the protection scope of the utility model.

Claims

1. A semiconductor testing apparatus, characterized by: The chip mounting assembly (2) is arranged above the PCB (1), and a group of welding points are formed on the PCB (1); the chip mounting assembly (2) at least comprises a buckled upper cover (21) and a base (22), which enclose a space for accommodating a chip (23) and a needle plate (24); a group of needle holes for facilitating the penetration of probes (241) are arranged on the needle plate (24), and the arrangement positions of the needle holes correspond to the positions of the welding points on the PCB (1) and the positions of pins on the chip (23) one by one; after the upper cover (21) and the base (22) are buckled, the probes (241) electrically connect the PCB (1) and the chip (23) to detect the performance of the chip (23).

2. The semiconductor testing apparatus according to claim 1, characterized by: The upper cover (21) and the base (22) are connected through a buckle (3); mounting grooves (220) for mounting the buckle (3) are formed on the two sides of the upper cover (21) and the base (22), and the upper cover (21) is pivotally connected with the buckle (3); a clamping block (221) for buckling the buckle (3) is formed in the mounting groove (220) on the base (22).

3. The semiconductor testing apparatus according to claim 2, characterized by: An elastic member is arranged between the inner wall of the buckle (3) and the groove bottom of the mounting groove (220).

4. The semiconductor testing apparatus of claim 1, wherein: The chip mounting assembly (2) further comprises a pressing block (25); the pressing block (25) is sleeved in the upper cover (21), and the pressing block (25) is hollow with the upper cover (21); the chip (23) is embedded in the pressing plate (25), and the bottom surface of the pressing plate (25) is formed with a limiting structure matched with the chip (23).

5. The semiconductor testing apparatus of claim 1, wherein: The chip mounting assembly (2) further comprises a floating plate (26); the floating plate (26) is located between the chip (23) and the needle plate (24) and is sleeved in the base plate (22); the floating plate (26) is formed with through holes corresponding to the probes (241) one by one.

6. The semiconductor testing apparatus of claim 1, wherein: The length of the PCB (1) is greater than the length of the base (22), and the widths of the two are equivalent; the PCB (1) is formed with openings (10) at both ends; the support plate (11) is bolted with the base (22), and the bolt penetrates the openings (10).

Images