Optical calculation chip and optical calculation device

Through the design of array arrangement and optical domain computing, the optical computing chip achieves efficient parallel processing, solving the problems of complex structure and cumbersome calculation logic of existing optical computing chips, and improving computing efficiency and stability.

CN223711867UActive Publication Date: 2025-12-23SHENZHEN PHOTOSENS SEMICONDUCTOR CO LTD
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Patent Information

Application Number
CN202520200543.1
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-02-08
Publication Date
2025-12-23
Estimated Expiration
2035-02-08

AI Technical Summary

Technical Problem

Existing optical computing chips have complex structures, cumbersome computational logic, and low computational efficiency and stability.

Method used

The system employs an array of transmitters and receivers, with each transmitter containing multiple transmitters that emit spectral signals of the same wavelength. The receiver performs grayscale value superposition calculations and combines modules such as power control, decoding control, and result correction to achieve parallel computing in the optical domain.

Benefits of technology

It improves computational efficiency and stability, simplifies computational steps, increases computational speed and accuracy, reduces signal processing complexity, and enhances the system's fault tolerance and reliability.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model provides an optical computing chip and an optical computing device. The optical computing chip comprises a plurality of transmitting parts and a plurality of receiving parts, each transmitting part comprises a plurality of transmitters, and the transmitters of each transmitting part are suitable for transmitting spectral signals with the same wavelength and are arranged corresponding to the transmitting parts. Each receiving part is used for receiving a plurality of spectral signals with the same wavelength and is suitable for superposing gray values of the spectral signals with the same wavelength to obtain a calculation result, the calculation mode avoids a complex circuit and algorithm in traditional electronic calculation, and the calculation process is directly completed in an optical domain, so that the calculation steps are simplified, and the calculation efficiency is improved. And the calculation speed and precision are improved, the calculation logic is simpler and easy to operate, and the structure of the optical calculation chip is simpler.
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Description

TECHNICAL FIELD

[0001] The present application relates to the field of optical computing, in particular to an optical computing chip and an optical computing device. BACKGROUND

[0002] The optical computing chip generally comprises a light source, an optical waveguide, a modulator, a detector, and an optical switch and distributor. The light source is used to generate a light signal for transmission. The optical waveguide is used to guide the light signal to propagate within the chip. The modulator converts an electrical signal into an optical signal and modulates the light source to carry information. The detector converts the optical signal into an electrical signal again, facilitating the interface with an electronic system. The optical switch and distributor are used to switch and distribute the optical signal. In the related art, the structure and computing logic of the optical computing chip are relatively complex. SUMMARY

[0003] Embodiments of the present application provide an optical computing chip and an optical computing device.

[0004] In a first aspect, embodiments of the present application provide an optical computing chip, comprising:

[0005] a plurality of emitting portions, each of the emitting portions comprising a plurality of emitters, and each of the plurality of emitters of each of the emitting portions being adapted to emit a spectral signal of the same wavelength;

[0006] a plurality of receiving portions, each of the receiving portions being adapted to receive a plurality of the spectral signals of the same wavelength and to superimpose the gray scale values of the spectral signals of the same wavelength to obtain a computing result.

[0007] In an embodiment, the plurality of emitting portions are arranged in an array.

[0008] In an embodiment, the wavelengths of the spectral signals emitted by the emitters of different emitting portions are arranged differently.

[0009] In an embodiment, the plurality of receiving portions are arranged in an array.

[0010] In an embodiment, the receiving portion comprises a spectral chip, the spectral chip being adapted to receive a plurality of the spectral signals of the same wavelength and to superimpose the gray scale values of the plurality of the spectral signals of the same wavelength to obtain a computing result.

[0011] In an embodiment, each of the emitting portions and the corresponding receiving portion has a spacing H, wherein 1 nm≤H≤1 km.

[0012] In an embodiment, the optical computing chip further comprises a power control portion, the power control portion being electrically connected to the plurality of emitters, and the power control portion being adapted to control the power of the plurality of emitters according to a plurality of operands of a data matrix to be computed.

[0013] In an embodiment, the optical computing chip further comprises a decoding control unit electrically connected to the power control unit, the decoding control unit being configured to receive an operation instruction and a plurality of data matrices to be calculated, and being adapted to decode the operation instruction and adjust the plurality of data matrices to be calculated according to the decoding result so that the plurality of data matrices are adapted to perform logical addition operation.

[0014] In an embodiment, the optical computing chip further comprises a result correction unit configured to perform carry correction processing on the calculation results of the plurality of receiving units when overflow occurs.

[0015] In a second aspect, embodiments of the present application provide an optical computing device, comprising:

[0016] The optical computing chip as described above;

[0017] A control module configured to obtain a plurality of data matrices and an operation instruction, and send the plurality of data matrices and the operation instruction to the optical computing chip, and receive the calculation results of the plurality of receiving units.

[0018] The embodiments of the present application have the following beneficial effects:

[0019] In the embodiments of the present application, each transmitting unit contains a plurality of transmitters capable of simultaneously transmitting spectral signals of the same wavelength. This design enables the optical computing chip to process multiple data points in parallel, significantly improving the computing efficiency. The spectral signals transmitted by the same transmitting unit have the same wavelength, which simplifies the processing of signals by the receiving unit. The corresponding receiving unit only needs to receive and process spectral signals of the same wavelength, without the need to distinguish and screen signals of multiple different wavelengths, which reduces the complexity of signal processing and improves the stability and reliability of the optical computing chip. The receiving unit superimposes the gray values of spectral signals of the same wavelength to obtain the calculation result. This calculation method avoids complex circuits and algorithms in traditional electronic calculation, and directly completes the calculation process in the optical domain. This not only simplifies the calculation steps, but also improves the calculation speed and accuracy, and the calculation logic is simpler and easier to operate. Moreover, the structure of the optical computing chip is relatively simple. BRIEF DESCRIPTION OF DRAWINGS

[0020] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0021] Figure 1 is a structural schematic diagram of an optical computing chip provided by the embodiments of the present application.

[0022] Figure 2 is Figure 1 is a structural schematic view of the multiple transmitting units and the multiple receiving units corresponding to each other;

[0023] Figure 3 is a structural schematic view of the multiple transmitting units provided by the embodiment of the present application;

[0024] Figure 4 is a structural schematic view of the multiple receiving units provided by the embodiment of the present application;

[0025] Figure 5 is a structural schematic view of a control module of a hardware running environment involved in the embodiment of the present application.

[0026] Explanation of reference signs:

[0027] 100, optical computing chip; 10, transmitting unit; 11, transmitter; a, spectrum signal; 20, receiving unit; 21, spectrum chip; 30, power control unit; 40, decoding control unit; 50, result correction unit; 60, receiving logic control unit. DETAILED DESCRIPTION

[0028] The technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application. In addition, it should be understood that the specific embodiments described herein are only used to illustrate and explain the present application, and are not used to limit the present application. In the present application, the orientation words such as "upper" and "lower" generally refer to the upper and lower of the device in the actual use or working state, and specifically refer to the direction of the drawing surface in the drawings; and "inner" and "outer" refer to the outline of the device.

[0029] The optical computing chip 100, the optical computing device and the control method thereof of the present application will be described below. Figures 1 to 5 The optical computing chip 100, the optical computing device and the control method thereof of the present application will be described below.

[0030] With reference to Figures 1 to 3 , the optical computing chip 100 includes multiple transmitting units 10 and multiple receiving units 20. Each transmitting unit 10 includes multiple transmitters 11, and the multiple transmitters 11 of each transmitting unit 10 are adapted to emit spectrum signals a of the same wavelength. The multiple transmitting units 10 are provided correspondingly, and each receiving unit 20 is used to receive multiple spectrum signals a of the same wavelength and is adapted to superimpose the gray scale values of the spectrum signals a of the same wavelength to obtain a computing result.

[0031] In the embodiments of the present application, each emitting part 10 contains multiple emitters 11 capable of emitting spectral signals a of the same wavelength simultaneously, which enables the optical computing chip 100 to process multiple data points in parallel, significantly improving the computing efficiency. The spectral signals a emitted by the same emitting part 10 have the same wavelength, which simplifies the processing of signals by the receiving part 20. The corresponding receiving part 20 only needs to receive and process spectral signals a of the same wavelength, without the need to distinguish and screen signals of multiple different wavelengths, which reduces the complexity of signal processing and improves the stability and reliability of the optical computing chip 100. The receiving part 20 superimposes the gray values of spectral signals a of the same wavelength to obtain the calculation result. This calculation method avoids the complex circuits and algorithms in traditional electronic calculation and directly completes the calculation process in the optical domain, which not only simplifies the calculation steps but also improves the calculation speed and accuracy, and the calculation logic is simpler and easier to operate, and the structure of the optical computing chip 100 is relatively simple.

[0032] With reference to Figure 2 and Figure 3 In an embodiment, the multiple emitting parts 10 are arranged in an array, so that the array-arranged emitting parts 10 can process multiple data points in parallel, and each emitting part 10 can independently emit light signals, thereby realizing efficient parallel computing. The array-arranged emitting parts 10 can more easily realize precise control and adjustment of light beams. The array-arranged design makes the optical computing chip 100 more easily expandable and upgradable. As the computing demand increases, the computing capacity of the chip can be expanded by increasing the number of emitting parts 10. The array-arranged emitting parts 10 can be more easily integrated with other optical or electronic elements, and this highly integrated design helps to reduce the volume and weight of the chip, reduce manufacturing costs, and improve the overall performance and reliability of the system. In the array arrangement, even if a certain emitting part 10 fails or fails, other emitting parts 10 can still continue to work, thereby ensuring the normal operation of the optical computing chip 100, which enhances the fault tolerance of the chip and improves the stability and reliability of the optical computing chip 100. The array-arranged emitting parts 10 can make data processing more localized, and each emitting part 10 can be regarded as a small data processing unit, which communicates with each other through short-distance optical interconnection, which reduces the need for long continuous lines, thereby reducing signal delay and power consumption. The array-arranged emitting parts 10 can be locally connected through an optical bus or optical network, reducing the need for global interconnection. Through the array arrangement, the relative positions between the emitting parts 10 can be more compact, thereby reducing the number of long continuous lines. This helps to reduce signal delay and power consumption and improve the overall performance of the system.

[0033] It should be noted that the distance between adjacent emission units 10 is not limited in the present application, and can be set as needed.

[0034] In an embodiment, the wavelengths of the spectral signals a emitted by the emitters 11 of different emission units 10 are set differently, so that spectral signals a of different wavelengths can be more easily distinguished and identified. In an optical communication or optical sensing system, each emission unit 10 uses optical signals of different wavelengths for communication or sensing, which can significantly reduce interference and misjudgment between signals. By adjusting the wavelengths of different emission units 10, a variety of different functions and applications can be achieved. For example, in the optical computing chip 100, optical signals of different wavelengths can be used to perform different computing tasks or implement different logic functions.

[0035] In addition, wavelength diversity can also be used to build complex optical networks to achieve more efficient data transmission and signal processing. In an optical system, a certain emission unit 10 or a certain wavelength of optical signal may be affected by interference or failure. However, since other emission units 10 use different wavelengths for communication or sensing, these interferences or failures will not have a fatal impact on the entire system. This wavelength redundancy design enables the system to continue to operate in the event of partial component failure, improving the stability and reliability of the system. In the optical computing chip 100, the optical bus structure can make the connection between the emission units 10 more flexible and efficient. By optimizing the layout and design of the optical bus, the length and complexity of the connection can be further reduced.

[0036] It should be noted that in other embodiments, the wavelengths of the spectral signals a emitted by the emitters 11 of different emission units 10 can also be set the same or partially the same and partially different, and the present application is not limited in this regard.

[0037] Reference Figure 2 and Figure 4In an embodiment, the plurality of receiving units 20 are arranged in an array, such that the plurality of receiving units 20 can process multiple optical signals in parallel, which means that the chip can handle more data at the same time, and this parallel processing capability can improve the overall performance of the optical computing chip. The arrayed receiving units 20 can be easily expanded by increasing the number of receiving units 20, which can further improve the data processing capability of the optical computing chip 100. The arrayed receiving units 20 can improve the signal-to-noise ratio through spatial diversity, when a certain receiving unit 20 is affected by interference or noise, other receiving units 20 can still receive valid optical signals, thereby improving the overall signal quality. In optical communication, signal loss is an important problem, through the arrayed receiving units 20, the optical signal can be more effectively captured and received, reducing signal loss and bit error rate. The arrayed receiving units 20 can provide higher resolution and clearer images. By receiving optical signals simultaneously through multiple receiving units 20, more detailed image details can be reconstructed. The arrayed receiving units 20 can realize multi-channel communication. Each receiving unit 20 can serve as an independent communication channel for transmitting different data or performing different communication tasks, and this multi-channel communication capability can significantly improve the communication capacity and flexibility of the system.

[0038] In an embodiment, the receiving unit 20 includes a spectrum chip 21, which is used to receive multiple spectrum signals a of the same wavelength, and is adapted to superimpose the gray values corresponding to the multiple spectrum signals a of the same wavelength to obtain the calculation result, such that the spectrum chip 21 can accurately receive and distinguish spectrum signals a of different wavelengths. By superimposing the gray values of multiple spectrum signals a of the same wavelength, random errors can be averaged, thereby improving the accuracy of signal processing. The superposition calculation of gray values is relatively simple, thereby improving the efficiency of signal processing. The spectrum chip 21 has high sensitivity to the wavelength and intensity of optical signals, and can accurately capture and distinguish signals from different sources. In the presence of noise or interference, by superimposing the gray values of multiple spectrum signals a of the same wavelength, the influence of noise can be reduced, and the anti-interference capability of the optical computing chip 100 can be improved.

[0039] It should be noted that the spectral chip 21 can accurately capture and distinguish these signals through its high-precision optoelectronic elements and signal processing circuit. In image processing, the gray value represents the brightness information of the image. For color images, the gray image can be obtained by performing specific processing on the values of the red (R), green (G), and blue (B) channels. The range of gray values is usually 0 to 255, where 0 represents black and 255 represents white. When the spectral chip 21 receives multiple spectral signals a of the same wavelength, it converts these signals into corresponding gray values. Subsequently, the chip performs superposition processing on these gray values. The superposition method can be simple arithmetic averaging or other more complex algorithms. The purpose of superposition is to average random errors and improve the accuracy and stability of signal processing. By superimposing the gray values of multiple spectral signals a of the same wavelength, the influence of noise and interference can be reduced, thereby obtaining more accurate calculation results.

[0040] In an embodiment, each transmitting part 10 and the corresponding receiving part 20 have a spacing H, where 1 nm ≤ H ≤ 1 km. Thus, the spacing H ranges from 1 nanometer (nm) to 1 kilometer (km), covering a wide range from micro to macro. This design allows the spacing between the transmitting part 10 and the receiving part 20 to be flexibly adjusted according to specific application scenarios. Such a wide range of spacing allows the use of various technical means for signal transmission and reception. For example, at the microscale, advanced physical principles such as quantum entanglement and photon tunneling can be used; at the macroscale, optical fiber communication and radio waves can be used. By precisely controlling the spacing H between the transmitting part 10 and the receiving part 20, the attenuation, scattering, and interference problems during signal transmission can be optimized, thereby improving signal quality. At an appropriate spacing, signals can be transmitted at a higher rate and with lower loss. This helps to improve the overall performance and efficiency of the communication system. Reasonable spacing design helps to reduce the impact of external environment on the system, such as electromagnetic interference, temperature changes, etc., thereby improving the stability of the system. In harsh environments, such as high temperature, high pressure, or strong radiation, appropriate spacing can protect the transmitting part 10 and the receiving part 20 from damage, ensuring the continuous and stable operation of the system.

[0041] Referring to Figure 1In some embodiments, the optical computing chip 100 further comprises a power control unit 30 electrically connected to the plurality of emitters 11. The power control unit 30 is configured to control the power of the plurality of emitters 11 according to the plurality of operands of the data matrix to be computed. In this way, the power control unit 30 can adjust the power of the emitters 11 in real time according to the operands in the data matrix. This dynamic adjustment helps to ensure that each emitter 11 outputs the most appropriate power during the computation process, thereby improving the accuracy of the computation. By precisely controlling the power of the emitters 11, the power control unit 30 can avoid unnecessary energy waste, which helps to improve the energy utilization efficiency of the entire optical computing chip 100 and prolong the service life of the device. Under high-power operation, the emitters 11 can generate excessive heat, causing the optical computing chip 100 to overheat. By limiting the power output of the emitters 11, the power control unit 30 can effectively reduce the risk of overheating and protect the hardware of the optical computing chip 100 from damage. When a certain emitter 11 fails or its performance decreases, the power control unit 30 can adjust the power of other emitters 11 to compensate for this defect, thereby improving the fault tolerance and reliability of the entire optical computing chip 100. Different computing tasks and data matrices may require different emitter 11 power configurations. The power control unit 30 can flexibly adjust the power of the emitters 11 to adapt to various algorithm and data processing requirements. When processing large-scale data matrices and complex computing tasks, the power control unit 30 can ensure that the emitters 11 operate at optimal power, thereby improving computing performance and shortening computation time.

[0042] It should be noted that the power control unit 30 includes a microcontroller (MCU), a power regulation circuit, a feedback and monitoring circuit, and other auxiliary components. The MCU, as the core of the power control unit 30, is responsible for receiving and processing the operating numbers from the data matrix, and calculating the required power for each emitter 11 according to these operating numbers. The MCU may contain program space, master-slave I2C controller, digital diagnostic monitoring register, oscillator, temperature sensor, voltage regulator, ADC (analog-to-digital converter) and DAC (digital-to-analog converter) and other components to realize complex control logic and precise power regulation. The power regulation circuit includes a laser diode driver and a digital automatic power control (DAPC) circuit. The laser diode driver is responsible for converting the control signal output by the MCU into a current or voltage signal that can drive the emitter 11 (such as a laser diode). It may contain input stage, amplification stage, output stage, burst control stage and APC (automatic power control) circuit to ensure that the emitter 11 outputs stable power. The digital automatic power control (DAPC) circuit is an advanced power control technology that samples the current of the built-in photodiode of the laser, compares it with the reference voltage, and adjusts the driving bias current through the digital state machine and register control, thereby achieving precise power control. The feedback and monitoring circuit includes a photodiode and an analog-to-digital converter (ADC). The photodiode is used to sample the light signal intensity of the emitter 11 and convert it into a current signal. This current signal is used for feedback and monitoring of the power output of the emitter 11. The ADC is used to convert the analog current signal output by the photodiode into a digital signal for processing and monitoring by the MCU. Other auxiliary components include temperature sensors, voltage regulators, and serial interface circuits. The temperature sensor is used to monitor the temperature of the power control unit 30 and the emitter 11 to ensure that they operate within a safe temperature range. The voltage regulator is used to provide a stable power supply voltage to ensure stable operation of the power control unit 30 and the emitter 11. The serial interface circuit is used for communication between the MCU and other external devices (such as computers, data storage, etc.) to realize data transmission and storage.

[0043] Referring to Figure 1In some embodiments, the optical computing chip 100 further comprises a decoding control unit 40, which is electrically connected to the power control unit 30. The decoding control unit 40 is configured to receive operation instructions and a plurality of data matrices to be calculated, and is adapted to decode the operation instructions and adjust the plurality of data matrices to be calculated according to the decoding results so that the plurality of data matrices are suitable for logical addition operation. Thus, the decoding control unit 40 is a key component in the optical computing chip 100, which is responsible for receiving external operation instructions and a plurality of data matrices to be calculated. These operation instructions are usually transmitted in an encoded form, and the decoding control unit 40 needs to decode them, i.e. convert them into a format or signal that can be recognized by the chip internally. After decoding, the decoding control unit 40 will adjust the plurality of data matrices to be calculated according to the decoding results. This adjustment is to make the format, size or arrangement of the data matrices meet the requirements of logical addition operation. The presence of the decoding control unit 40 enables the optical computing chip 100 to directly receive and process encoded operation instructions and data matrices without additional conversion steps, which greatly improves the operation efficiency of the chip and enables it to complete complex computing tasks faster. Through the adjustment of the data matrices, the decoding control unit 40 can make the optical computing chip 100 process different types and sizes of data matrices. The adjustment of the data matrices by the decoding control unit 40 can also optimize the process of logical addition operation. By ensuring that the format and arrangement of the data matrices meet the operation requirements, it can reduce errors and unnecessary calculation in the operation process, thereby improving the accuracy and efficiency of the operation.

[0044] It should be noted that logical addition operation is a basic mathematical operation, which is usually implemented through the superposition effect of light in optical computing. That is, when two or more beams of light illuminate the same physical space region at the same time, the light intensity of the region is generally the linear superposition of them, thereby realizing arithmetic addition. Further, by setting a suitable threshold between the "sum of n beams" and the "sum of (n-1) beams", and through binaryzation, the "logical and" operation can be realized.

[0045] The decoding control unit 40, as a key component in the optical computing chip 100, can contain multiple sub-components or modules inside to realize its functions. The following is a summary of the components that the decoding control unit 40 can contain: instruction receiving module, decoder, data matrix processing module, control logic module, interface circuit, and storage unit. The instruction receiving module is responsible for receiving external operation instructions. These instructions are usually transmitted in encoded form, and the instruction receiving module needs to be able to accurately capture and store these instructions. The decoder is one of the core components of the decoding control unit 40. It is responsible for decoding the received encoded instructions, i.e., converting them into a format or signal that the chip can recognize. The decoding process may involve parsing, checking, and converting the bit stream of the instructions. The data matrix processing module is responsible for processing multiple data matrices to be calculated. It may contain multiple sub-modules, such as data alignment module, data scaling module, and data rearrangement module, etc. These sub-modules work together to ensure that the format, size, or arrangement of the data matrix meets the requirements of logical addition operation. The control logic module is responsible for generating corresponding control signals according to the decoding results and the processing requirements of the data matrix. These control signals are sent to other parts of the chip (such as the power control unit 30, the logical addition operation unit, etc.) to guide them to perform corresponding operations. The interface circuit is used for communication between the decoding control unit 40 and other components or external devices. It may include serial interface, parallel interface or other types of communication interface to ensure correct transmission and synchronization of data. The storage unit is used to temporarily store decoded instructions, processed data matrices, and control signals generated by the control logic module, etc. This helps to ensure the integrity and traceability of data, and provides fast access when needed.

[0046] It should be noted that in some embodiments, the addition and subtraction logic is decoded into the switches of the transmitter 11 by the control module, so that the addition and subtraction logic can be completed at optical speed in a matrix parallel manner.

[0047] With reference to Figure 1In an embodiment, the optical computing chip 100 further comprises a result correction unit 50, which is used to perform carry correction processing on the calculation results of the plurality of receiving units 20 when overflow occurs. The result correction unit 50 is an important component in the optical computing chip 100, and its main function is to monitor and process the calculation results of the plurality of receiving units 20. When overflow occurs in these calculation results (i.e., the calculation results exceed the preset range or precision), the result correction unit 50 triggers the carry correction processing mechanism. Carry correction processing is a mathematical adjustment method used to restore the correct value of the calculation results when overflow occurs. In optical computing, due to the parallelism and high speed of light, calculation results can be generated very quickly, so the result correction unit 50 needs to have the ability of fast response and accurate correction. Carry correction processing may involve operations such as detection, shifting, adding or subtracting of overflow bits to ensure the accuracy of the final results. The result correction unit 50 is connected to the plurality of receiving units 20 through some form of interface or communication mechanism. The receiving unit 20 is responsible for performing actual calculation tasks and transmitting the calculation results to the result correction unit 50. The result correction unit 50 monitors and analyzes the received calculation results, and triggers the carry correction processing flow when overflow is detected. The presence of the result correction unit 50 can significantly improve the calculation accuracy of the optical computing chip 100. By monitoring and processing overflow in real time, the result correction unit 50 can ensure the correctness of the final results and avoid calculation errors caused by overflow. When performing large-scale or high-precision calculations, the stability of the results is crucial, and the result correction unit 50 helps to enhance the calculation stability of the optical computing chip 100, so that it can maintain stable performance in various application scenarios. Although the result correction unit 50 increases the calculation overhead, the accuracy improvement and stability enhancement it brings can indirectly optimize the overall calculation efficiency by reducing the repeated calculation or error handling time caused by calculation errors, and the result correction unit 50 helps to improve the overall performance of the optical computing chip 100.

[0048] Referring to Figure 1 In an embodiment, the optical computing chip 100 further comprises a receiving logic control unit 60, which is electrically connected to the plurality of receiving units 20. The receiving logic control unit 60 controls which part of the current calculation the data calculated by each receiving unit 20 belongs to, whether the output result is independent or needs to be combined with other receiving units 20 to obtain a complete result; the receiving logic control unit 60 controls the cycle of a calculation, that is, the time to complete a calculation, when a calculation starts, when a calculation ends, and when the output result of the receiving unit 20 is valid.

[0049] In a second aspect, the application also provides an optical computing device, which comprises the optical computing chip 100 and a control module (seeFigure 5 ), the specific structure of the optical computing chip 100 refers to the above-mentioned embodiments, and since the optical computing device adopts all the technical solutions of the above-mentioned embodiments, it at least has all the beneficial effects brought by the technical solutions of the above-mentioned embodiments, which will not be repeated here. The control module is used to obtain a plurality of data matrices and operation instructions, and send the plurality of data matrices and operation instructions to the optical computing chip 100, and receive the calculation results of the plurality of receiving parts 20.

[0050] It should be noted that the control module as the core control unit of the entire optical computing device is first responsible for reading a plurality of data matrices and operation instructions from an external storage device (such as a memory, a hard disk, etc.) or a network communication interface. The data matrix may contain a large amount of numerical data for various mathematical operations or matrix operations; the operation instruction specifies the specific operation to be performed on the data matrix, such as addition, multiplication, convolution, etc. The control module sends the obtained data matrix and operation instruction to the optical computing chip 100 through some form of interface (such as a serial interface, a parallel interface, a high-speed bus, etc.). The optical computing chip 100 completes the operation and the calculation result is sent back to the control module through the same interface or another group of interfaces, and the control module is responsible for receiving these calculation results and further processing or storing as needed. Through the cooperative work of the control module and the optical computing chip 100, the high-speed parallel processing capability of optical computing can be fully utilized. The optical computing chip 100 can simultaneously process multiple data matrices and operation instructions, thereby significantly improving the calculation efficiency and shortening the calculation time. The optical computing chip 100 usually has strong computing power and can process complex mathematical operations and matrix operations. Through the scheduling and management of the control module, the optical computing device can fully exert its computing power and complete various high-difficulty computing tasks.

[0051] In a third aspect, the present application also provides a control method based on the optical computing device as described above, comprising the following steps:

[0052] Step S100, obtaining a plurality of data matrices and operation instructions.

[0053] It should be noted that there are many operation instructions, for example, the operation instruction can include addition, multiplication, convolution, etc.

[0054] Step S200, according to the operation instruction and the plurality of data matrices to be calculated, controlling the plurality of emitters 11 of at least part of the emitting part 10 to emit a plurality of optical spectrum signals a.

[0055] It should be noted that in this step, the optical computing device first receives the operation instruction from the external or internal control module. These instructions explicitly specify the type of calculation to be performed on the data matrix to be calculated. The control module inside the optical computing device is responsible for parsing these instructions and determining the corresponding calculation steps and required data matrix. According to the operation instruction and the size of the data matrix, the control module will select some or all of the emitters 10 to work. Each emitter 11 is configured to be able to emit a specific wavelength of spectral signal a, which will be used in the subsequent calculation process. After receiving the instruction from the control module, the selected emitters 11 begin to emit spectral signals a. The wavelength, intensity, and duration of these signals are precisely controlled to ensure that they can accurately represent the information in the data matrix.

[0056] Step S300, the control receiving part 20 receives a plurality of spectral signals a, and the control receiving part 20 superimposes the gray values corresponding to the plurality of spectral signals a of the same wavelength to obtain a calculation result.

[0057] In this step, after the emitters 10 emit spectral signals a, these signals propagate in space and are received by the receiving part 20 corresponding to the emitters 10. According to the requirements of the operation instruction, the receiving part 20 will superimpose the gray values corresponding to the plurality of spectral signals a of the same wavelength emitted by the same emitter 10. By superimposing the gray values, the receiving part 20 can calculate the total gray value corresponding to each wavelength, which reflects the sum of the intensities of all spectral signals a at that wavelength. After completing the superposition of gray values, the receiving part 20 will generate a calculation result.

[0058] It should be noted that the gray value and the calculation result have a mapping relationship, and when the gray value is obtained, the value of the operation number superposition can be obtained according to the mapping relationship. The mapping relationship between the gray value and the calculation result can be an empirical formula obtained by experimental measurement, or a derivation result based on a mathematical model. Since the establishment of the mapping relationship is mature, this application will not be described here.

[0059] In addition, the gray value is also called gray level or brightness value, which is a numerical value used to describe the brightness of pixels in an image. In a gray image, each pixel is assigned a gray value, which is usually an integer between 0 (black) and 255 (white). The size of the gray value reflects the brightness of the pixel, the larger the value, the brighter, and the smaller the value, the darker.

[0060] In the embodiments of this application, the control method can simultaneously process multiple data matrices and computational instructions. By controlling multiple transmitters 11 of the transmitting unit 10 to emit multiple spectral signals a, parallel data processing is achieved. This parallel computing method significantly improves the speed and efficiency of data processing. The transmission speed of spectral signals a is extremely fast, far exceeding the transmission speed of traditional electronic signals, which makes data transmission in the optical computing device faster and further improves the overall computing efficiency. The control method controls the receiving unit 20 to superimpose the gray values ​​corresponding to multiple spectral signals a with the same wavelength, thereby obtaining accurate calculation results. This superposition method ensures the accuracy and stability of the calculation results and avoids calculation errors caused by signal interference or transmission errors. Optical computing devices typically have high sensitivity and can accurately detect and process weak spectral signals a, which allows the control method to maintain high computational accuracy even when processing low signal-to-noise ratio or weak signals. The control method can flexibly configure the working state of the transmitting unit 10 and the receiving unit 20 according to different computational instructions and data matrices, resulting in low power consumption during data transmission and processing. This helps to reduce energy consumption and carbon emissions, which is in line with the current trend of green computing and sustainable development. Optical computing devices are typically made using environmentally friendly materials, reducing pollution and damage to the environment.

[0061] In one embodiment, the precision of the grayscale value is n, where n is a positive integer. The plurality of data matrices to be calculated include a first data matrix and a second data matrix. The operands of the first data matrix include 'a', and the operands of the second data matrix include 'b', where 0 ≤ a + b ≤ 2. n Thus, a grayscale precision of n means that it can accurately represent values ​​from 0 to 2. n-1 The grayscale levels of the optical computing device are such that when the sum of operands a and b is within the range of 0 to 2n, it ensures that no precision loss occurs due to exceeding the grayscale value representation range during the calculation process. Since the sum of operands a and b does not exceed 2n, this avoids erroneous results caused by data overflow during the calculation process, ensuring the accuracy and reliability of the calculation results. By limiting the sum of operands to the range of 0 to 2n, the grayscale value representation range can be fully utilized, avoiding resource waste (such as unnecessary storage space or calculation time) caused by an excessively large grayscale value range. Limiting the range of the operand sum simplifies the calculation process and reduces computational complexity, which helps improve computational efficiency and reduce computational costs. By limiting the range of the operand sum, the accumulation of errors during the calculation process can be reduced, which helps improve the stability and reliability of the system and ensure the accuracy of the calculation results. Within a certain error range, the optical computing device can tolerate a certain amount of data fluctuation and noise interference, making it more robust and fault-tolerant in complex environments and practical applications.

[0062] In some embodiments, 0≤a≤2 n-1 , and 0≤b≤2 n-1 . In this way, in the optical computing device, the gray scale values are used to represent the intensity or magnitude of data. When the precision of the gray scale values is n, it can represent a series of integer values within the range from 0 to 2 n-1 . Here, a and b represent the operands in the first data matrix and the second data matrix, respectively. 0≤a≤2 n-1 , and 0≤b≤2 n-1 specify the value range of a and b, which is determined based on the representation capability of the gray scale values. Specifically, the lower limit of 0 represents the minimum possible value of data, corresponding to the lowest intensity or smallest number in the gray scale value representation. The upper limit of 2 n-1 represents the maximum possible value of data, corresponding to the highest intensity or largest number in the gray scale value representation. This range ensures that the values of a and b can be accurately represented by the gray scale value system without causing information loss or overflow. By limiting the value range of a and b, it can be ensured that they will not exceed the representation capability of the gray scale value system during any calculation process, which helps to maintain the integrity and accuracy of data and avoid calculation errors or result distortion. When the values of a and b are within the specified range, the calculation process can be more efficient, which reduces the additional calculation steps or resource consumption that may be caused by processing values outside the range. By specifying the value range of a and b, the system design of the optical computing device can be simplified, which allows the designer to focus more on optimizing the calculation efficiency and accuracy, rather than dealing with complex boundary conditions or abnormal values. Limiting the value range of a and b helps to reduce the system instability caused by data overflow or abnormality, which enables the optical computing device to maintain stable performance during long-term operation or processing of large amounts of data.

[0063] Because of device errors, the gray scale values and the operand values may not be one-to-one corresponding, and they can be mapped according to a certain strategy. For example, gray scale values 0-7 correspond to value 0, gray scale values 8-16 correspond to value 1, and gray scale values 1016-1023 correspond to value 127. Then, the emission and reception channels of a single optical spectrum signal can calculate two 7-bit data addition and subtraction operations at a time.

[0064] In the transmitting part 10 and the receiving part 20, each operation number corresponds to an associated gray scale value, and the corresponding relationship can be determined according to specific needs or process conditions. For example, in the transmitting part 10 and the receiving part 20, the values 0, 1, 2, 3, … correspond to the gray scale values 0, 5, 10, 15, …, and due to device errors, the error of the transmitting part 10 is set to + / -1, the value 0 is off and can be accurately controlled, so the transmitting value 0 has a gray scale value of 0, the gray scale value of the transmitting value 1 can be 4, 5, 6, the gray scale value of the value 2 can be 9, 10, 11, the gray scale value of the value 3 can be 14, 15, 16, …, and 1+2, the gray scale value in the receiving part 20 can be 13, 14, 15, 16, 17, that is, the center value 15 corresponding to the value 2 has an error of twice the error of the transmitting part 10. The error range of the receiving part 20 is twice that of the transmitting part 10, that is, the gray scale value of the receiving part 20 is the corresponding gray scale value plus or minus twice the transmitting error, and the difference between the gray scale values corresponding to adjacent values should be large enough to cover the error introduced by multiple transmitters 11 in the same waveband. Assuming that the transmitting error of each transmitter 11 is h, and the number of transmitters 11 in the same waveband is i, then the error of the receiving part 20 is h*i, and the difference between the center values of the gray scales corresponding to adjacent values should be greater than 2*h*i.

[0065] It should be noted that the above-mentioned center value of the gray scale refers to the sum of the gray scale values of adjacent values in the absence of errors. For example, in the absence of errors, the sum of the gray scale values of 1+2 is 15, and when there is an error + / -1, 1+2, the gray scale value in the receiving part 20 can be 13, 14, 15, 16, 17, and 15 here is the center value of the gray scale corresponding to adjacent values.

[0066] The following table shows the calculation in the presence of transmitting errors:

[0067]

[0068] There will be errors between the corresponding values of the gray scale values and the operation numbers, and the error range of the control precision will be x according to different processes, that is, the center value P of the gray scale value corresponding to the operation number value is plus or minus x, that is, [P-x, P+x], for example, the process precision error is 2, and the center values P corresponding to the values 0, 1, 2, 3, … are 4, 9, 14, 19, …, respectively, and the corresponding transmitting precision values can be mapped according to a certain strategy. For example, the gray scale values 0-7 correspond to the value 0, the gray scale values 8-16 correspond to the value 1, and the gray scale values 1016-1023 correspond to the value 127, and then the transmitting and receiving channels of a single spectral signal a can calculate two 7-bit data addition and subtraction operations at a time.

[0069] The transmitting part 10 and the receiving part 20 are synchronized by a synchronization mechanism, and simultaneously transmit and receive, and simultaneously start and end a data calculation, and the gray value 0, 1, 2, …, m*n+n obtained each time can be freely combined into multiple result data according to the calculation requirement. Assuming that the bit width of the current operation number a, b is 8, and the gray value obtained by each receiving unit is 9 bits, if two 32-bit wide operation numbers are to be calculated, the spectrum 0, 1, 2, 3 channels are taken respectively, and the [7:0], [15:8], [23:16], [31:24] bits of the operation numbers a, b are calculated respectively, then four 9-bit gray values can be obtained simultaneously by receiving the spectrum 0, 1, 2, 3, and after calibration such as exposure, a complete 32-bit result can be obtained.

[0070] The device embodiments described above are only schematic, wherein the units shown as separate components can or can not be physically separate, and the components shown as units can or can not be physical units, i.e., can be located in one place or can be distributed on a plurality of network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the embodiments. Those skilled in the art can understand and implement without creative labor.

[0071] Through the description of the above embodiments, those skilled in the art can clearly understand that the embodiments can be realized by means of software and the necessary general hardware platform, and of course can also be realized by hardware. Based on such understanding, the above technical solutions can be embodied in the form of a software product, which can be stored in a computer readable storage medium, such as a ROM / RAM, a magnetic disk, an optical disk, etc., and includes a plurality of instructions to make a computer device (which can be a personal computer, a server, or a network device, etc.) execute the methods of the embodiments or some parts of the embodiments.

[0072] It should be noted that there are many kinds of devices, for example, the device can include medical devices, weapon devices, etc. Specifically, in the embodiments of the present application, the device includes a vehicle or a processing machine. In addition, the type of device can continue to be set as needed, and the present application does not limit this.

[0073] The embodiments of the present application are described in detail above, and the specific examples are applied to the principles and implementation modes of the present application, and the above embodiment descriptions are only used to help understand the method and core idea of the present application; at the same time, for those skilled in the art, according to the idea of the present application, the specific implementation mode and application range will be changed, and the above description should not be understood as limiting the present application.

Claims

1. An optical computing chip, characterized in that, include: Multiple transmitting units, each of which includes multiple transmitters, and the multiple transmitters of each transmitting unit are all adapted to transmit spectral signals with the same wavelength; Multiple receiving units are provided corresponding to multiple transmitting units. Each receiving unit is used to receive multiple spectral signals with the same wavelength and is suitable for superimposing the gray values ​​of spectral signals with the same wavelength to obtain a calculation result.

2. The optical computing chip according to claim 1, characterized in that, Multiple transmitters are arranged in an array.

3. The optical computing chip according to claim 1, characterized in that, The wavelengths of the spectral signals emitted by transmitters from different transmitters are set differently.

4. The optical computing chip according to claim 1, characterized in that, Multiple receivers are arranged in an array.

5. The optical computing chip according to claim 1, characterized in that, The receiving unit includes a spectral chip, which is used to receive multiple spectral signals with the same wavelength, and is adapted to superimpose the gray values ​​corresponding to the multiple spectral signals with the same wavelength to obtain a calculation result.

6. The optical computing chip according to any one of claims 1 to 5, characterized in that, Each of the transmitting units and the corresponding receiving units has a spacing H, where 1nm≤H≤1km.

7. The optical computing chip according to any one of claims 1 to 5, characterized in that, The optical computing chip also includes a power control unit, which is electrically connected to the plurality of transmitters. The power control unit is used to control the power of the plurality of transmitters according to the plurality of operands of the data matrix to be computed.

8. The optical computing chip according to claim 7, characterized in that, The optical computing chip further includes a decoding control unit, which is electrically connected to the power control unit. The decoding control unit is used to receive arithmetic instructions and multiple data matrices to be calculated, and is adapted to decode the arithmetic instructions and adjust the multiple data matrices to be calculated according to the decoding results so that the multiple data matrices are suitable for logical addition operations.

9. The optical computing chip according to any one of claims 1 to 5, characterized in that, The optical computing chip also includes a result correction unit, which is used to perform carry correction processing on the calculation results of multiple receivers when they overflow.

10. An optical computing device, characterized in that, The optical computing device includes: The optical computing chip as described in any one of claims 1 to 9; The control module is used to acquire multiple data matrices and operation instructions, send the multiple data matrices and operation instructions to the optical computing chip, and receive the calculation results of multiple receiving units.